mirror of
https://github.com/linux-msm/laptops-kernel.git
synced 2026-08-13 14:19:53 -07:00
Merge branch 'for-next' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git
# Conflicts: # drivers/clk/qcom/tcsrcc-glymur.c
This commit is contained in:
Mark Brown
@@ -29,7 +29,11 @@ properties:
|
||||
oneOf:
|
||||
- items:
|
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- enum:
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||||
- qcom,glymur-ctcu
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||||
- qcom,kaanapali-ctcu
|
||||
- qcom,qcs8300-ctcu
|
||||
- qcom,sm8750-ctcu
|
||||
- qcom,x1e80100-ctcu
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||||
- const: qcom,sa8775p-ctcu
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||||
- enum:
|
||||
- qcom,sa8775p-ctcu
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||||
|
||||
@@ -22,49 +22,69 @@ description: |
|
||||
|
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select:
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properties:
|
||||
# Select all nodes which have SoC-based compatibles, but not the root
|
||||
# "/" node, because its front compatibles do not follow any SoC patterns
|
||||
$nodename:
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pattern: "[^/]"
|
||||
compatible:
|
||||
oneOf:
|
||||
- pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sar|sc|sd[amx]|sm|x1[ep])[0-9]+.*$"
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- pattern: "^qcom,.*(glymur|milos).*$"
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||||
contains:
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oneOf:
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||||
- pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sar|sc|sd[amx]|sm|x1[ep])[0-9]+.*$"
|
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- pattern: "^qcom,.*(eliza|kaanapali|glymur|hawi|mahua|maili|milos|nord|shikra).*$"
|
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required:
|
||||
- compatible
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||||
|
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properties:
|
||||
compatible:
|
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oneOf:
|
||||
# Preferred naming style for compatibles of SoC components:
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- pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1[ep])[0-9]+(pro)?-.*$"
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||||
- pattern: "^qcom,sar[0-9]+[a-z]?-.*$"
|
||||
- pattern: "^qcom,(sa|sc)8[0-9]+[a-z][a-z]?-.*$"
|
||||
- pattern: "^qcom,(glymur|milos)-.*$"
|
||||
contains:
|
||||
anyOf:
|
||||
# Preferred naming style for compatibles of SoC components:
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- pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1[ep])[0-9]+(pro)?-.*$"
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- pattern: "^qcom,sar[0-9]+[a-z]?-.*$"
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- pattern: "^qcom,(sa|sc)8[0-9]+[a-z][a-z]?-.*$"
|
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- pattern: "^qcom,(eliza|kaanapali|glymur|hawi|mahua|maili|milos|nord|shikra)-.+$"
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||||
|
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# Legacy namings - variations of existing patterns/compatibles are OK,
|
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# but do not add completely new entries to these:
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- pattern: "^qcom,[ak]pss-wdt-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$"
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- pattern: "^qcom,gcc-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$"
|
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- pattern: "^qcom,mmcc-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$"
|
||||
- pattern: "^qcom,pcie-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1[ep])[0-9]+.*$"
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- pattern: "^qcom,rpm-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$"
|
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- pattern: "^qcom,scm-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1[ep])[0-9]+.*$"
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- enum:
|
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- qcom,dsi-ctrl-6g-qcm2290
|
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- qcom,gpucc-sdm630
|
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- qcom,gpucc-sdm660
|
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- qcom,lcc-apq8064
|
||||
- qcom,lcc-ipq8064
|
||||
- qcom,lcc-mdm9615
|
||||
- qcom,lcc-msm8960
|
||||
- qcom,lpass-cpu-apq8016
|
||||
- qcom,usb-ss-ipq4019-phy
|
||||
- qcom,usb-hs-ipq4019-phy
|
||||
- qcom,vqmmc-ipq4019-regulator
|
||||
# Legacy namings - variations of existing patterns/compatibles are OK,
|
||||
# but do not add completely new entries to these:
|
||||
- pattern: "^qcom,[ak]pss-wdt-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1[ep])[0-9]+.*$"
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||||
- pattern: "^qcom,apss-wdt-[a-z]+$" # Codenames variant
|
||||
- pattern: "^qcom,kpss-gcc-(apq|ipq|mdm|msm)[0-9]+.*$"
|
||||
- pattern: "^qcom,gcc-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$"
|
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- pattern: "^qcom,mmcc-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$"
|
||||
- pattern: "^qcom,pcie-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1[ep])[0-9]+.*$"
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||||
- pattern: "^qcom,rpm-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$"
|
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- pattern: "^qcom,rpmcc-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$"
|
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- pattern: "^qcom,rpm(cc)?-[a-z]+$" # Codenames variant
|
||||
- pattern: "^qcom,scm-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sar?|sc|sd[amx]|sm|x1[ep])[0-9]+.*$"
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- pattern: "^qcom,scm-[a-z]+$" # Codenames variant
|
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- pattern: "^qcom,tcsr-(apq|ipq|mdm|msm)[0-9]+.*$"
|
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- pattern: "^qcom,usb-hs-phy-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1[ep])[0-9]+.*$"
|
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- enum:
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- qcom,dsi-ctrl-6g-qcm2290
|
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- qcom,gpucc-sdm630
|
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- qcom,gpucc-sdm660
|
||||
- qcom,lcc-apq8064
|
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- qcom,lcc-ipq8064
|
||||
- qcom,lcc-mdm9615
|
||||
- qcom,lcc-msm8960
|
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- qcom,lpass-cpu-apq8016
|
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- qcom,usb-hs-ipq4019-phy
|
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- qcom,usb-hsic-phy-mdm9615
|
||||
- qcom,usb-hsic-phy-msm8974
|
||||
- qcom,usb-ss-ipq4019-phy
|
||||
- qcom,vqmmc-ipq4019-regulator
|
||||
|
||||
# Legacy compatibles with wild-cards - list cannot grow with new bindings:
|
||||
- enum:
|
||||
- qcom,ipq806x-gmac
|
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- qcom,ipq806x-nand
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||||
- qcom,ipq806x-sata-phy
|
||||
- qcom,ipq806x-usb-phy-ss
|
||||
- qcom,ipq806x-usb-phy-hs
|
||||
# Legacy compatibles with wild-cards - list cannot grow with new bindings:
|
||||
- enum:
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||||
- qcom,ipq806x-ahci
|
||||
- qcom,ipq806x-gmac
|
||||
- qcom,ipq806x-nand
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||||
- qcom,ipq806x-sata-phy
|
||||
- qcom,ipq806x-usb-phy-ss
|
||||
- qcom,ipq806x-usb-phy-hs
|
||||
|
||||
# In general non-SoC Qualcomm devices do not need to be listed here,
|
||||
# however in a few cases they got selected by patterns in "select":
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||||
- pattern: "^qcom,wsa[0-9]+$"
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||||
|
||||
additionalProperties: true
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||||
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||||
File diff suppressed because it is too large
Load Diff
+34
-29
@@ -19,35 +19,40 @@ description: |
|
||||
|
||||
properties:
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||||
compatible:
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||||
enum:
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||||
- qcom,eliza-llcc
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||||
- qcom,glymur-llcc
|
||||
- qcom,hawi-llcc
|
||||
- qcom,ipq5424-llcc
|
||||
- qcom,kaanapali-llcc
|
||||
- qcom,qcs615-llcc
|
||||
- qcom,qcs8300-llcc
|
||||
- qcom,qdu1000-llcc
|
||||
- qcom,sa8775p-llcc
|
||||
- qcom,sar1130p-llcc
|
||||
- qcom,sar2130p-llcc
|
||||
- qcom,sc7180-llcc
|
||||
- qcom,sc7280-llcc
|
||||
- qcom,sc8180x-llcc
|
||||
- qcom,sc8280xp-llcc
|
||||
- qcom,sdm670-llcc
|
||||
- qcom,sdm845-llcc
|
||||
- qcom,shikra-llcc
|
||||
- qcom,sm6350-llcc
|
||||
- qcom,sm7150-llcc
|
||||
- qcom,sm8150-llcc
|
||||
- qcom,sm8250-llcc
|
||||
- qcom,sm8350-llcc
|
||||
- qcom,sm8450-llcc
|
||||
- qcom,sm8550-llcc
|
||||
- qcom,sm8650-llcc
|
||||
- qcom,sm8750-llcc
|
||||
- qcom,x1e80100-llcc
|
||||
oneOf:
|
||||
- enum:
|
||||
- qcom,eliza-llcc
|
||||
- qcom,glymur-llcc
|
||||
- qcom,hawi-llcc
|
||||
- qcom,ipq5424-llcc
|
||||
- qcom,kaanapali-llcc
|
||||
- qcom,qcs615-llcc
|
||||
- qcom,qcs8300-llcc
|
||||
- qcom,qdu1000-llcc
|
||||
- qcom,sa8775p-llcc
|
||||
- qcom,sar1130p-llcc
|
||||
- qcom,sar2130p-llcc
|
||||
- qcom,sc7180-llcc
|
||||
- qcom,sc7280-llcc
|
||||
- qcom,sc8180x-llcc
|
||||
- qcom,sc8280xp-llcc
|
||||
- qcom,sdm670-llcc
|
||||
- qcom,sdm845-llcc
|
||||
- qcom,shikra-llcc
|
||||
- qcom,sm6350-llcc
|
||||
- qcom,sm7150-llcc
|
||||
- qcom,sm8150-llcc
|
||||
- qcom,sm8250-llcc
|
||||
- qcom,sm8350-llcc
|
||||
- qcom,sm8450-llcc
|
||||
- qcom,sm8550-llcc
|
||||
- qcom,sm8650-llcc
|
||||
- qcom,sm8750-llcc
|
||||
- qcom,x1e80100-llcc
|
||||
- items:
|
||||
- enum:
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||||
- qcom,maili-llcc
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||||
- const: qcom,hawi-llcc
|
||||
|
||||
reg:
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||||
minItems: 1
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@@ -25,19 +25,33 @@ properties:
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||||
enum:
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||||
- qcom,gcc-mdm9607
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||||
|
||||
clocks:
|
||||
items:
|
||||
- description: XO source
|
||||
- description: Sleep clock source
|
||||
|
||||
clock-names:
|
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items:
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||||
- const: xo
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||||
- const: sleep_clk
|
||||
|
||||
required:
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- compatible
|
||||
- clocks
|
||||
- clock-names
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||||
- '#power-domain-cells'
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
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||||
- |
|
||||
clock-controller@900000 {
|
||||
clock-controller@1800000 {
|
||||
compatible = "qcom,gcc-mdm9607";
|
||||
reg = <0x900000 0x4000>;
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reg = <0x01800000 0x80000>;
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#clock-cells = <1>;
|
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#reset-cells = <1>;
|
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#power-domain-cells = <1>;
|
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clocks = <&xo_board>, <&sleep_clk>;
|
||||
clock-names = "xo", "sleep_clk";
|
||||
};
|
||||
...
|
||||
|
||||
@@ -7,8 +7,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
title: Qualcomm Global Clock & Reset Controller on MSM8937, MSM8940, MSM8953 and SDM439
|
||||
|
||||
maintainers:
|
||||
- Adam Skladowski <a_skl39@protonmail.com>
|
||||
- Sireesh Kodali <sireeshkodali@protonmail.com>
|
||||
- Barnabas Czeman <barnabas.czeman@mainlining.org>
|
||||
|
||||
description: |
|
||||
|
||||
@@ -0,0 +1,72 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,glymur-evacc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm EVA Clock & Reset Controller on Glymur SoC
|
||||
|
||||
maintainers:
|
||||
- Taniya Das <taniya.das@oss.qualcomm.com>
|
||||
|
||||
description: |
|
||||
Qualcomm EVA clock control module which supports the clocks, resets and
|
||||
power domains for the EVA instances on Glymur SoC.
|
||||
|
||||
See also:
|
||||
- include/dt-bindings/clock/qcom,glymur-evacc.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,glymur-evacc
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Interface clock from GCC
|
||||
- description: Board XO source
|
||||
- description: Sleep clock source
|
||||
|
||||
power-domains:
|
||||
items:
|
||||
- description: MMCX power domain
|
||||
- description: MXC power domain
|
||||
|
||||
required-opps:
|
||||
description:
|
||||
Required OPP nodes for the MMCX and MXC power domains.
|
||||
items:
|
||||
- description: MMCX performance point
|
||||
- description: MXC performance point
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- power-domains
|
||||
- required-opps
|
||||
- '#power-domain-cells'
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,gcc.yaml#
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,glymur-gcc.h>
|
||||
#include <dt-bindings/clock/qcom,rpmh.h>
|
||||
#include <dt-bindings/power/qcom,rpmhpd.h>
|
||||
clock-controller@ab00000 {
|
||||
compatible = "qcom,glymur-evacc";
|
||||
reg = <0x0ab00000 0x10000>;
|
||||
clocks = <&gcc GCC_EVA_AHB_CLK>,
|
||||
<&rpmhcc RPMH_CXO_CLK>,
|
||||
<&sleep_clk>;
|
||||
power-domains = <&rpmhpd RPMHPD_MMCX>,
|
||||
<&rpmhpd RPMHPD_MXC>;
|
||||
required-opps = <&rpmhpd_opp_low_svs>,
|
||||
<&rpmhpd_opp_low_svs>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
...
|
||||
@@ -65,9 +65,15 @@ properties:
|
||||
- description: USB4 PHY 2 pcie pipe clock source
|
||||
- description: USB4 PHY 2 Max pipe clock source
|
||||
|
||||
power-domains:
|
||||
description:
|
||||
A phandle and PM domain specifier for the CX power domain.
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- power-domains
|
||||
- '#power-domain-cells'
|
||||
|
||||
allOf:
|
||||
@@ -78,6 +84,7 @@ unevaluatedProperties: false
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmh.h>
|
||||
#include <dt-bindings/power/qcom-rpmpd.h>
|
||||
clock-controller@100000 {
|
||||
compatible = "qcom,glymur-gcc";
|
||||
reg = <0x100000 0x1f9000>;
|
||||
@@ -113,6 +120,7 @@ examples:
|
||||
<&usb4_phy_0_pcie_pipe>, <&usb4_phy_0_max_pipe>,
|
||||
<&usb4_phy_1_pcie_pipe>, <&usb4_phy_1_max_pipe>,
|
||||
<&usb4_phy_2_pcie_pipe>, <&usb4_phy_2_max_pipe>;
|
||||
power-domains = <&rpmhpd RPMHPD_CX>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
|
||||
@@ -0,0 +1,146 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,glymur-tcsr.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm TCSR Clock Controller on Glymur
|
||||
|
||||
maintainers:
|
||||
- Bjorn Andersson <andersson@kernel.org>
|
||||
- Taniya Das <taniya.das@oss.qualcomm.com>
|
||||
|
||||
description: |
|
||||
Qualcomm TCSR clock control module provides the clocks, resets and
|
||||
power domains on Glymur
|
||||
|
||||
See also:
|
||||
- include/dt-bindings/clock/qcom,glymur-tcsr.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- qcom,glymur-tcsr
|
||||
- qcom,mahua-tcsr
|
||||
- const: syscon
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: TCXO pad clock
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
'#reset-cells':
|
||||
const: 1
|
||||
|
||||
vdda-qrefrpt0-0p9-supply: true
|
||||
vdda-qrefrpt1-0p9-supply: true
|
||||
vdda-qrefrpt2-0p9-supply: true
|
||||
vdda-qrefrpt3-0p9-supply: true
|
||||
vdda-qrefrpt4-0p9-supply: true
|
||||
vdda-qrefrpt5-0p9-supply: true
|
||||
vdda-qrefrx0-0p9-supply: true
|
||||
vdda-qrefrx1-0p9-supply: true
|
||||
vdda-qrefrx2-0p9-supply: true
|
||||
vdda-qrefrx3-0p9-supply: true
|
||||
vdda-qrefrx4-0p9-supply: true
|
||||
vdda-qrefrx5-0p9-supply: true
|
||||
vdda-qreftx0-0p9-supply: true
|
||||
vdda-qreftx0-1p2-supply: true
|
||||
vdda-qreftx1-0p9-supply: true
|
||||
vdda-refgen3-0p9-supply: true
|
||||
vdda-refgen3-1p2-supply: true
|
||||
vdda-refgen4-0p9-supply: true
|
||||
vdda-refgen4-1p2-supply: true
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: qcom,glymur-tcsr
|
||||
then:
|
||||
required:
|
||||
- vdda-qrefrpt0-0p9-supply
|
||||
- vdda-qrefrpt1-0p9-supply
|
||||
- vdda-qrefrpt2-0p9-supply
|
||||
- vdda-qrefrpt3-0p9-supply
|
||||
- vdda-qrefrpt4-0p9-supply
|
||||
- vdda-qrefrx0-0p9-supply
|
||||
- vdda-qrefrx1-0p9-supply
|
||||
- vdda-qrefrx2-0p9-supply
|
||||
- vdda-qrefrx4-0p9-supply
|
||||
- vdda-qrefrx5-0p9-supply
|
||||
- vdda-qreftx0-0p9-supply
|
||||
- vdda-qreftx0-1p2-supply
|
||||
- vdda-qreftx1-0p9-supply
|
||||
- vdda-refgen3-0p9-supply
|
||||
- vdda-refgen3-1p2-supply
|
||||
- vdda-refgen4-0p9-supply
|
||||
- vdda-refgen4-1p2-supply
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: qcom,mahua-tcsr
|
||||
then:
|
||||
required:
|
||||
- vdda-qrefrpt0-0p9-supply
|
||||
- vdda-qrefrpt1-0p9-supply
|
||||
- vdda-qrefrpt2-0p9-supply
|
||||
- vdda-qrefrpt3-0p9-supply
|
||||
- vdda-qrefrpt4-0p9-supply
|
||||
- vdda-qrefrpt5-0p9-supply
|
||||
- vdda-qrefrx1-0p9-supply
|
||||
- vdda-qrefrx2-0p9-supply
|
||||
- vdda-qrefrx3-0p9-supply
|
||||
- vdda-qreftx1-0p9-supply
|
||||
- vdda-refgen3-0p9-supply
|
||||
- vdda-refgen3-1p2-supply
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmh.h>
|
||||
|
||||
soc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
clock-controller@1fd5000 {
|
||||
compatible = "qcom,glymur-tcsr", "syscon";
|
||||
reg = <0x0 0x1fd5000 0x0 0x21000>;
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
vdda-qrefrpt0-0p9-supply = <&vreg_l1a>;
|
||||
vdda-qrefrpt1-0p9-supply = <&vreg_l1a>;
|
||||
vdda-qrefrpt2-0p9-supply = <&vreg_l1a>;
|
||||
vdda-qrefrpt3-0p9-supply = <&vreg_l1a>;
|
||||
vdda-qrefrpt4-0p9-supply = <&vreg_l1a>;
|
||||
vdda-qrefrx0-0p9-supply = <&vreg_l1a>;
|
||||
vdda-qrefrx1-0p9-supply = <&vreg_l1a>;
|
||||
vdda-qrefrx2-0p9-supply = <&vreg_l1a>;
|
||||
vdda-qrefrx4-0p9-supply = <&vreg_l1a>;
|
||||
vdda-qrefrx5-0p9-supply = <&vreg_l1a>;
|
||||
vdda-qreftx0-0p9-supply = <&vreg_l1a>;
|
||||
vdda-qreftx0-1p2-supply = <&vreg_l2a>;
|
||||
vdda-qreftx1-0p9-supply = <&vreg_l1a>;
|
||||
vdda-refgen3-0p9-supply = <&vreg_l1a>;
|
||||
vdda-refgen3-1p2-supply = <&vreg_l2a>;
|
||||
vdda-refgen4-0p9-supply = <&vreg_l1a>;
|
||||
vdda-refgen4-1p2-supply = <&vreg_l2a>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@@ -8,16 +8,21 @@ title: Qualcomm Global Clock & Reset Controller on Hawi
|
||||
|
||||
maintainers:
|
||||
- Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
|
||||
- Taniya Das <taniya.das@oss.qualcomm.com>
|
||||
|
||||
description: |
|
||||
Qualcomm global clock control module provides the clocks, resets and power
|
||||
domains on Hawi.
|
||||
domains on Hawi and Maili.
|
||||
|
||||
See also: include/dt-bindings/clock/qcom,hawi-gcc.h
|
||||
See also:
|
||||
include/dt-bindings/clock/qcom,hawi-gcc.h
|
||||
include/dt-bindings/clock/qcom,maili-gcc.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,hawi-gcc
|
||||
enum:
|
||||
- qcom,hawi-gcc
|
||||
- qcom,maili-gcc
|
||||
|
||||
clocks:
|
||||
items:
|
||||
|
||||
@@ -8,7 +8,6 @@ title: Qualcomm Global Clock & Reset Controller on IPQ9574
|
||||
|
||||
maintainers:
|
||||
- Bjorn Andersson <andersson@kernel.org>
|
||||
- Anusha Rao <quic_anusha@quicinc.com>
|
||||
|
||||
description: |
|
||||
Qualcomm global clock control module provides the clocks, resets and power
|
||||
|
||||
@@ -8,7 +8,6 @@ title: Qualcomm Networking Sub System Clock & Reset Controller on IPQ9574 and IP
|
||||
|
||||
maintainers:
|
||||
- Bjorn Andersson <andersson@kernel.org>
|
||||
- Anusha Rao <quic_anusha@quicinc.com>
|
||||
|
||||
description: |
|
||||
Qualcomm networking sub system clock control module provides the clocks,
|
||||
|
||||
@@ -21,35 +21,41 @@ description: |
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- qcom,rpmcc-apq8060
|
||||
- qcom,rpmcc-apq8064
|
||||
- qcom,rpmcc-ipq806x
|
||||
- qcom,rpmcc-mdm9607
|
||||
- qcom,rpmcc-msm8226
|
||||
- qcom,rpmcc-msm8660
|
||||
- qcom,rpmcc-msm8909
|
||||
- qcom,rpmcc-msm8916
|
||||
- qcom,rpmcc-msm8917
|
||||
- qcom,rpmcc-msm8936
|
||||
- qcom,rpmcc-msm8937
|
||||
- qcom,rpmcc-msm8940
|
||||
- qcom,rpmcc-msm8953
|
||||
- qcom,rpmcc-msm8974
|
||||
- qcom,rpmcc-msm8976
|
||||
- qcom,rpmcc-msm8992
|
||||
- qcom,rpmcc-msm8994
|
||||
- qcom,rpmcc-msm8996
|
||||
- qcom,rpmcc-msm8998
|
||||
- qcom,rpmcc-qcm2290
|
||||
- qcom,rpmcc-qcs404
|
||||
- qcom,rpmcc-sdm429
|
||||
- qcom,rpmcc-sdm660
|
||||
- qcom,rpmcc-sm6115
|
||||
- qcom,rpmcc-sm6125
|
||||
- qcom,rpmcc-sm6375
|
||||
- const: qcom,rpmcc
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,rpmcc-apq8060
|
||||
- qcom,rpmcc-apq8064
|
||||
- qcom,rpmcc-ipq806x
|
||||
- qcom,rpmcc-mdm9607
|
||||
- qcom,rpmcc-msm8226
|
||||
- qcom,rpmcc-msm8660
|
||||
- qcom,rpmcc-msm8909
|
||||
- qcom,rpmcc-msm8916
|
||||
- qcom,rpmcc-msm8917
|
||||
- qcom,rpmcc-msm8936
|
||||
- qcom,rpmcc-msm8937
|
||||
- qcom,rpmcc-msm8940
|
||||
- qcom,rpmcc-msm8953
|
||||
- qcom,rpmcc-msm8974
|
||||
- qcom,rpmcc-msm8976
|
||||
- qcom,rpmcc-msm8992
|
||||
- qcom,rpmcc-msm8994
|
||||
- qcom,rpmcc-msm8996
|
||||
- qcom,rpmcc-msm8998
|
||||
- qcom,rpmcc-qcm2290
|
||||
- qcom,rpmcc-qcs404
|
||||
- qcom,rpmcc-sdm429
|
||||
- qcom,rpmcc-sdm660
|
||||
- qcom,rpmcc-sm6115
|
||||
- qcom,rpmcc-sm6125
|
||||
- qcom,rpmcc-sm6375
|
||||
- const: qcom,rpmcc
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,rpmcc-shikra
|
||||
- const: qcom,rpmcc-qcm2290
|
||||
- const: qcom,rpmcc
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
@@ -126,6 +132,7 @@ allOf:
|
||||
- qcom,rpmcc-qcs404
|
||||
- qcom,rpmcc-sdm429
|
||||
- qcom,rpmcc-sdm660
|
||||
- qcom,rpmcc-shikra
|
||||
- qcom,rpmcc-sm6115
|
||||
- qcom,rpmcc-sm6125
|
||||
|
||||
|
||||
@@ -16,36 +16,41 @@ description: |
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,eliza-rpmh-clk
|
||||
- qcom,glymur-rpmh-clk
|
||||
- qcom,hawi-rpmh-clk
|
||||
- qcom,kaanapali-rpmh-clk
|
||||
- qcom,milos-rpmh-clk
|
||||
- qcom,nord-rpmh-clk
|
||||
- qcom,qcs615-rpmh-clk
|
||||
- qcom,qdu1000-rpmh-clk
|
||||
- qcom,sa8775p-rpmh-clk
|
||||
- qcom,sar2130p-rpmh-clk
|
||||
- qcom,sc7180-rpmh-clk
|
||||
- qcom,sc7280-rpmh-clk
|
||||
- qcom,sc8180x-rpmh-clk
|
||||
- qcom,sc8280xp-rpmh-clk
|
||||
- qcom,sdm670-rpmh-clk
|
||||
- qcom,sdm845-rpmh-clk
|
||||
- qcom,sdx55-rpmh-clk
|
||||
- qcom,sdx65-rpmh-clk
|
||||
- qcom,sdx75-rpmh-clk
|
||||
- qcom,sm4450-rpmh-clk
|
||||
- qcom,sm6350-rpmh-clk
|
||||
- qcom,sm8150-rpmh-clk
|
||||
- qcom,sm8250-rpmh-clk
|
||||
- qcom,sm8350-rpmh-clk
|
||||
- qcom,sm8450-rpmh-clk
|
||||
- qcom,sm8550-rpmh-clk
|
||||
- qcom,sm8650-rpmh-clk
|
||||
- qcom,sm8750-rpmh-clk
|
||||
- qcom,x1e80100-rpmh-clk
|
||||
oneOf:
|
||||
- enum:
|
||||
- qcom,eliza-rpmh-clk
|
||||
- qcom,glymur-rpmh-clk
|
||||
- qcom,hawi-rpmh-clk
|
||||
- qcom,kaanapali-rpmh-clk
|
||||
- qcom,milos-rpmh-clk
|
||||
- qcom,nord-rpmh-clk
|
||||
- qcom,qcs615-rpmh-clk
|
||||
- qcom,qdu1000-rpmh-clk
|
||||
- qcom,sa8775p-rpmh-clk
|
||||
- qcom,sar2130p-rpmh-clk
|
||||
- qcom,sc7180-rpmh-clk
|
||||
- qcom,sc7280-rpmh-clk
|
||||
- qcom,sc8180x-rpmh-clk
|
||||
- qcom,sc8280xp-rpmh-clk
|
||||
- qcom,sdm670-rpmh-clk
|
||||
- qcom,sdm845-rpmh-clk
|
||||
- qcom,sdx55-rpmh-clk
|
||||
- qcom,sdx65-rpmh-clk
|
||||
- qcom,sdx75-rpmh-clk
|
||||
- qcom,sm4450-rpmh-clk
|
||||
- qcom,sm6350-rpmh-clk
|
||||
- qcom,sm8150-rpmh-clk
|
||||
- qcom,sm8250-rpmh-clk
|
||||
- qcom,sm8350-rpmh-clk
|
||||
- qcom,sm8450-rpmh-clk
|
||||
- qcom,sm8550-rpmh-clk
|
||||
- qcom,sm8650-rpmh-clk
|
||||
- qcom,sm8750-rpmh-clk
|
||||
- qcom,x1e80100-rpmh-clk
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,maili-rpmh-clk
|
||||
- const: qcom,hawi-rpmh-clk
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
@@ -0,0 +1,70 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,shikra-gcc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Global Clock & Reset Controller on Qualcomm Shikra SoC
|
||||
|
||||
maintainers:
|
||||
- Imran Shaik <imran.shaik@oss.qualcomm.com>
|
||||
- Taniya Das <taniya.das@oss.qualcomm.com>
|
||||
|
||||
description: |
|
||||
Global clock control module provides the clocks, resets and power
|
||||
domains on Qualcomm Shikra SoC platform.
|
||||
|
||||
See also: include/dt-bindings/clock/qcom,shikra-gcc.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,shikra-gcc
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Board XO source
|
||||
- description: Sleep clock source
|
||||
- description: EMAC0 sgmiiphy mac rclk source
|
||||
- description: EMAC0 sgmiiphy mac tclk source
|
||||
- description: EMAC1 sgmiiphy mac rclk source
|
||||
- description: EMAC1 sgmiiphy mac tclk source
|
||||
- description: PCIE Pipe clock source
|
||||
- description: USB3 phy wrapper pipe clock source
|
||||
|
||||
power-domains:
|
||||
items:
|
||||
- description: CX domain
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- power-domains
|
||||
- '#power-domain-cells'
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,gcc.yaml#
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
#include <dt-bindings/power/qcom-rpmpd.h>
|
||||
clock-controller@1400000 {
|
||||
compatible = "qcom,shikra-gcc";
|
||||
reg = <0x01400000 0x1f0000>;
|
||||
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
|
||||
<&sleep_clk>,
|
||||
<&emac0_sgmiiphy_rclk>,
|
||||
<&emac0_sgmiiphy_tclk>,
|
||||
<&emac1_sgmiiphy_rclk>,
|
||||
<&emac1_sgmiiphy_tclk>,
|
||||
<&pcie_pipe_clk>,
|
||||
<&usb3_phy_wrapper_gcc_usb30_pipe_clk>;
|
||||
power-domains = <&rpmpd RPMPD_VDDCX>;
|
||||
#clock-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
...
|
||||
@@ -70,13 +70,11 @@ allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,kaanapali-cambistmclkcc
|
||||
- qcom,kaanapali-camcc
|
||||
- qcom,sc8280xp-camcc
|
||||
- qcom,sm8450-camcc
|
||||
- qcom,sm8550-camcc
|
||||
not:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8475-camcc
|
||||
- qcom,sm8650-camcc
|
||||
then:
|
||||
required:
|
||||
- required-opps
|
||||
|
||||
@@ -16,6 +16,7 @@ description: |
|
||||
|
||||
See also:
|
||||
include/dt-bindings/clock/qcom,glymur-videocc.h
|
||||
include/dt-bindings/clock/qcom,hawi-videocc.h
|
||||
include/dt-bindings/clock/qcom,kaanapali-videocc.h
|
||||
include/dt-bindings/clock/qcom,sm8450-videocc.h
|
||||
include/dt-bindings/clock/qcom,sm8650-videocc.h
|
||||
@@ -26,6 +27,7 @@ properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,glymur-videocc
|
||||
- qcom,hawi-videocc
|
||||
- qcom,kaanapali-videocc
|
||||
- qcom,sm8450-videocc
|
||||
- qcom,sm8475-videocc
|
||||
@@ -65,14 +67,11 @@ allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,glymur-videocc
|
||||
- qcom,kaanapali-videocc
|
||||
- qcom,sm8450-videocc
|
||||
- qcom,sm8550-videocc
|
||||
- qcom,sm8750-videocc
|
||||
- qcom,x1p42100-videocc
|
||||
not:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8475-videocc
|
||||
- qcom,sm8650-videocc
|
||||
then:
|
||||
required:
|
||||
- required-opps
|
||||
|
||||
@@ -16,7 +16,6 @@ description: |
|
||||
|
||||
See also:
|
||||
- include/dt-bindings/clock/qcom,eliza-tcsr.h
|
||||
- include/dt-bindings/clock/qcom,glymur-tcsr.h
|
||||
- include/dt-bindings/clock/qcom,hawi-tcsrcc.h
|
||||
- include/dt-bindings/clock/qcom,nord-tcsrcc.h
|
||||
- include/dt-bindings/clock/qcom,sm8550-tcsr.h
|
||||
@@ -25,20 +24,25 @@ description: |
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- qcom,eliza-tcsr
|
||||
- qcom,glymur-tcsr
|
||||
- qcom,hawi-tcsrcc
|
||||
- qcom,kaanapali-tcsr
|
||||
- qcom,milos-tcsr
|
||||
- qcom,nord-tcsrcc
|
||||
- qcom,sar2130p-tcsr
|
||||
- qcom,sm8550-tcsr
|
||||
- qcom,sm8650-tcsr
|
||||
- qcom,sm8750-tcsr
|
||||
- qcom,x1e80100-tcsr
|
||||
- const: syscon
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,eliza-tcsr
|
||||
- qcom,hawi-tcsrcc
|
||||
- qcom,kaanapali-tcsr
|
||||
- qcom,milos-tcsr
|
||||
- qcom,nord-tcsrcc
|
||||
- qcom,sar2130p-tcsr
|
||||
- qcom,sm8550-tcsr
|
||||
- qcom,sm8650-tcsr
|
||||
- qcom,sm8750-tcsr
|
||||
- qcom,x1e80100-tcsr
|
||||
- const: syscon
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,maili-tcsrcc
|
||||
- const: qcom,hawi-tcsrcc
|
||||
- const: syscon
|
||||
|
||||
clocks:
|
||||
items:
|
||||
|
||||
@@ -8,12 +8,14 @@ title: Qualcomm Camera Clock & Reset Controller on x1e80100
|
||||
|
||||
maintainers:
|
||||
- Bryan O'Donoghue <bryan.odonoghue@linaro.org>
|
||||
- Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
|
||||
|
||||
description: |
|
||||
Qualcomm camera clock control module provides the clocks, resets and power
|
||||
domains on x1e80100.
|
||||
|
||||
See also:
|
||||
include/dt-bindings/clock/qcom,glymur-camcc.h
|
||||
include/dt-bindings/clock/qcom,x1e80100-camcc.h
|
||||
|
||||
allOf:
|
||||
@@ -22,6 +24,7 @@ allOf:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,glymur-camcc
|
||||
- qcom,x1e80100-camcc
|
||||
- qcom,x1p42100-camcc
|
||||
|
||||
|
||||
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
title: Samsung Exynos Auto v9 SoC clock controller
|
||||
|
||||
maintainers:
|
||||
- Chanho Park <chanho61.park@samsung.com>
|
||||
- Alim Akhtar <alim.akhtar@samsung.com>
|
||||
- Chanwoo Choi <cw00.choi@samsung.com>
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
- Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
|
||||
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Reference in New Issue
Block a user