This commit is contained in:
Mark Brown
2026-07-31 14:44:44 +01:00
36 changed files with 472 additions and 56 deletions
+1 -1
View File
@@ -366,7 +366,7 @@
* to NAND block 1 (NAND block 0 is not used by default)".
* The same doc mentions that for ROM "Silicon Revision 2.1",
* "Updated NAND boot mode to offer boot from block 0 or block 1".
* However the limitaion is left here by default for compatibility
* However the limitation is left here by default for compatibility
* with older silicon and because it needs new boot pin settings
* not possible in stock LCDK.
*/
+4
View File
@@ -88,6 +88,9 @@ dtb-$(CONFIG_ARCH_OMAP4) += \
am335x-bonegreen-hdmi-00a0-dtbs := am335x-bonegreen-eco.dtb \
am335x-bone-hdmi-00a0.dtbo
am335x-icev2-prueth-dtbs := am335x-icev2.dtb \
am335x-icev2-prueth-overlay.dtbo
dtb-$(CONFIG_SOC_AM33XX) += \
am335x-baltos-ir2110.dtb \
am335x-baltos-ir3220.dtb \
@@ -106,6 +109,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-evmsk.dtb \
am335x-guardian.dtb \
am335x-icev2.dtb \
am335x-icev2-prueth.dtb \
am335x-lxm.dtb \
am335x-mba335x.dtb \
am335x-moxa-uc-2101.dtb \
@@ -0,0 +1,156 @@
// SPDX-License-Identifier: GPL-2.0
/*
* DT overlay for IDK AM335x
*
* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
*/
/*
* AM335x ICE V2 board
* http://www.ti.com/tool/tmdsice3359
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/bus/ti-sysc.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/am33xx.h>
#include <dt-bindings/clock/am3.h>
&{/} {
/* Dual-MAC Ethernet application node on PRU-ICSS */
pruss_eth: pruss-eth {
compatible = "ti,am3359-prueth";
ti,prus = <&pru0>, <&pru1>;
sram = <&ocmcram>;
ti,mii-rt = <&pruss_mii_rt>;
ti,iep = <&pruss_iep>;
ti,ecap = <&pruss_ecap>;
interrupts = <20 2 2>, <21 3 3>;
interrupt-names = "rx_hp", "rx_lp";
interrupt-parent = <&pruss_intc>;
pinctrl-0 = <&pruss_eth_default>;
pinctrl-names = "default";
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
pruss_emac0: ethernet-port@0 {
reg = <0>;
phy-handle = <&pruss_eth0_phy>;
phy-mode = "mii";
interrupts = <20 2 2>, <26 6 6>, <23 6 6>;
interrupt-names = "rx", "emac_ptp_tx",
"hsr_ptp_tx";
/* Filled in by bootloader */
local-mac-address = [00 00 00 00 00 00];
};
pruss_emac1: ethernet-port@1 {
reg = <1>;
phy-handle = <&pruss_eth1_phy>;
phy-mode = "mii";
interrupts = <21 3 3>, <27 9 7>, <24 9 7>;
interrupt-names = "rx", "emac_ptp_tx",
"hsr_ptp_tx";
/* Filled in by bootloader */
local-mac-address = [00 00 00 00 00 00];
};
};
};
};
&am33xx_pinmux {
/* MDIO node for PRU-ICSS */
pruss_mdio_default: pruss-mdio-default-pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x88c, PIN_OUTPUT | MUX_MODE5) /* (V12) gpmc_clk.pr1_mdio_mdclk */
AM33XX_IOPAD(0x888, PIN_INPUT | MUX_MODE5) /* (T13) gpmc_csn3.pr1_mdio_data */
>;
};
/* Pinmux configuration for PRU-ICSS */
pruss_eth_default: pruss-eth-default-pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8a0, PIN_INPUT | MUX_MODE2) /* (R1) lcd_data0.pr1_mii_mt0_clk */
AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE2) /* (T2) lcd_data5.pr1_mii0_txd0 */
AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE2) /* (T1) lcd_data4.pr1_mii0_txd1 */
AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE2) /* (R4) lcd_data3.pr1_mii0_txd2 */
AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE2) /* (R3) lcd_data2.pr1_mii0_txd3 */
AM33XX_IOPAD(0x8cc, PIN_INPUT | MUX_MODE5) /* (U4) lcd_data11.pr1_mii0_rxd0 */
AM33XX_IOPAD(0x8c8, PIN_INPUT | MUX_MODE5) /* (U3) lcd_data10.pr1_mii0_rxd1 */
AM33XX_IOPAD(0x8c4, PIN_INPUT | MUX_MODE5) /* (U2) lcd_data9.pr1_mii0_rxd2 */
AM33XX_IOPAD(0x8c0, PIN_INPUT | MUX_MODE5) /* (U1) lcd_data8.pr1_mii0_rxd3 */
AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE2) /* (R2) lcd_data1.pr1_mii0_txen */
AM33XX_IOPAD(0x8d8, PIN_INPUT | MUX_MODE5) /* (V4) lcd_data14.pr1_mii_mr0_clk */
AM33XX_IOPAD(0x8dc, PIN_INPUT | MUX_MODE5) /* (T5) lcd_data15.pr1_mii0_rxdv */
AM33XX_IOPAD(0x8d4, PIN_INPUT | MUX_MODE5) /* (V3) lcd_data13.pr1_mii0_rxer */
AM33XX_IOPAD(0x8d0, PIN_INPUT | MUX_MODE5) /* (V2) lcd_data12.pr1_mii0_rxlink */
AM33XX_IOPAD(0x8e8, PIN_INPUT | MUX_MODE2) /* (V5) lcd_pclk.pr1_mii0_crs */
AM33XX_IOPAD(0x840, PIN_INPUT | MUX_MODE5) /* (R13) gpmc_a0.pr1_mii_mt1_clk */
AM33XX_IOPAD(0x850, PIN_OUTPUT | MUX_MODE5) /* (R14) gpmc_a4.pr1_mii1_txd0 */
AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE5) /* (T14) gpmc_a3.pr1_mii1_txd1 */
AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE5) /* (U14) gpmc_a2.pr1_mii1_txd2 */
AM33XX_IOPAD(0x844, PIN_OUTPUT | MUX_MODE5) /* (V14) gpmc_a1.pr1_mii1_txd3 */
AM33XX_IOPAD(0x860, PIN_INPUT | MUX_MODE5) /* (V16) gpmc_a8.pr1_mii1_rxd0 */
AM33XX_IOPAD(0x85c, PIN_INPUT | MUX_MODE5) /* (T15) gpmc_a7.pr1_mii1_rxd1 */
AM33XX_IOPAD(0x858, PIN_INPUT | MUX_MODE5) /* (U15) gpmc_a6.pr1_mii1_rxd2 */
AM33XX_IOPAD(0x854, PIN_INPUT | MUX_MODE5) /* (V15) gpmc_a5.pr1_mii1_rxd3 */
AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE5) /* (U17) gpmc_wpn.pr1_mii1_txen */
AM33XX_IOPAD(0x864, PIN_INPUT | MUX_MODE5) /* (U16) gpmc_a9.pr1_mii_mr1_clk */
AM33XX_IOPAD(0x868, PIN_INPUT | MUX_MODE5) /* (T16) gpmc_a10.pr1_mii1_rxdv */
AM33XX_IOPAD(0x86c, PIN_INPUT | MUX_MODE5) /* (V17) gpmc_a11.pr1_mii1_rxer */
AM33XX_IOPAD(0x878, PIN_INPUT | MUX_MODE5) /* (U18) gpmc_be1n.pr1_mii1_rxlink */
AM33XX_IOPAD(0x8ec, PIN_INPUT | MUX_MODE2) /* (R6) lcd_ac_bias_en.pr1_mii1_crs */
>;
};
};
&gpio3 {
mux-mii-hog {
status = "disabled";
};
mux-mii-hog-0 {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
/* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
output-low;
line-name = "MUX_MII_CTL1";
};
};
/*
* Disable CPSW switch node and
* MDIO configuration to prevent
* conflict with PRU-ICSS
*/
&mac_sw {
status = "disabled";
};
&davinci_mdio_sw {
status = "disabled";
};
/* PRU-ICSS MDIO configuration */
&pruss_mdio {
pinctrl-0 = <&pruss_mdio_default>;
pinctrl-names = "default";
reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
reset-delay-us = <2>; /* PHY datasheet states 1uS min */
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
pruss_eth0_phy: ethernet-phy@1 {
reg = <1>;
};
pruss_eth1_phy: ethernet-phy@3 {
reg = <3>;
};
};
+13 -2
View File
@@ -308,7 +308,7 @@
};
scm_conf: scm_conf@0 {
compatible = "syscon", "simple-bus";
compatible = "ti,am3352-scm-conf", "syscon", "simple-bus";
reg = <0x0 0x800>;
#address-cells = <1>;
#size-cells = <1>;
@@ -896,6 +896,17 @@
reg = <0x32000 0x58>;
};
pruss_iep: iep@2e000 {
compatible = "ti,am3356-icss-iep";
reg = <0x2e000 0x31c>;
clocks = <&pruss_iepclk_mux>;
};
pruss_ecap: ecap@30000 {
compatible = "ti,pruss-ecap";
reg = <0x30000 0x60>;
};
pruss_intc: interrupt-controller@20000 {
compatible = "ti,pruss-intc";
reg = <0x20000 0x2000>;
@@ -1859,7 +1870,7 @@
gpio2: gpio@0 {
compatible = "ti,omap4-gpio";
gpio-ranges = <&am33xx_pinmux 0 34 18>,
gpio-ranges = <&am33xx_pinmux 0 34 18>,
<&am33xx_pinmux 18 77 4>,
<&am33xx_pinmux 22 56 10>;
gpio-controller;
+1 -1
View File
@@ -213,7 +213,7 @@
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
clock-frequency = <400000>;
/* User DIP swithes [1:8] / User LEDS [1:2] */
/* User DIP switches [1:8] / User LEDS [1:2] */
tca6416: gpio@21 {
compatible = "ti,tca6416";
reg = <0x21>;
+11
View File
@@ -476,6 +476,17 @@
reg = <0x32000 0x58>;
};
pruss1_iep: iep@2e000 {
compatible = "ti,am4376-icss-iep";
reg = <0x2e000 0x31c>;
clocks = <&pruss1_iepclk_mux>;
};
pruss1_ecap: ecap@30000 {
compatible = "ti,pruss-ecap";
reg = <0x30000 0x60>;
};
pruss1_intc: interrupt-controller@20000 {
compatible = "ti,pruss-intc";
reg = <0x20000 0x2000>;
+102 -1
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@@ -168,6 +168,48 @@
default-state = "off";
};
};
/* Dual-MAC Ethernet application node on PRU-ICSS1 */
pruss1_eth: pruss1-eth {
compatible = "ti,am4376-prueth";
ti,prus = <&pru1_0>, <&pru1_1>;
sram = <&ocmcram>;
ti,mii-rt = <&pruss1_mii_rt>;
ti,iep = <&pruss1_iep>;
ti,ecap = <&pruss1_ecap>;
interrupts = <20 2 2>, <21 3 3>;
interrupt-names = "rx_hp", "rx_lp";
interrupt-parent = <&pruss1_intc>;
pinctrl-0 = <&pruss1_eth_default>;
pinctrl-names = "default";
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
pruss1_emac0: ethernet-port@0 {
reg = <0>;
phy-handle = <&pruss1_eth0_phy>;
phy-mode = "mii";
interrupts = <20 2 2>, <26 6 6>, <23 6 6>;
interrupt-names = "rx", "emac_ptp_tx",
"hsr_ptp_tx";
/* Filled in by bootloader */
local-mac-address = [00 00 00 00 00 00];
};
pruss1_emac1: ethernet-port@1 {
reg = <1>;
phy-handle = <&pruss1_eth1_phy>;
phy-mode = "mii";
interrupts = <21 3 3>, <27 9 5>, <24 9 5>;
interrupt-names = "rx", "emac_ptp_tx",
"hsr_ptp_tx";
/* Filled in by bootloader */
local-mac-address = [00 00 00 00 00 00];
};
};
};
};
&am43xx_pinmux {
@@ -303,6 +345,52 @@
>;
};
pruss1_mdio_default: pruss1-mdio-default-pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x88c, PIN_OUTPUT | MUX_MODE5) /* (A12) gpmc_clk.pr1_mdio_mdclk */
AM4372_IOPAD(0xa70, PIN_INPUT | MUX_MODE8) /* (D24) xdma_event_intr0.pr1_mdio_data */
AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE7) /* (AD23) cam1_data6.gpio4[20] */
>;
};
pruss1_eth_default: pruss1-eth-default-pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x8a0, PIN_INPUT | MUX_MODE2) /* (B22) dss_data0.pr1_mii_mt0_clk */
AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE2) /* (B20) dss_data5.pr1_mii0_txd0 */
AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE2) /* (A20) dss_data4.pr1_mii0_txd1 */
AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE2) /* (C21) dss_data3.pr1_mii0_txd2 */
AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE2) /* (B21) dss_data2.pr1_mii0_txd3 */
AM4372_IOPAD(0x8cc, PIN_INPUT | MUX_MODE5) /* (B18) dss_data11.pr1_mii0_rxd0 */
AM4372_IOPAD(0x8c8, PIN_INPUT | MUX_MODE5) /* (A18) dss_data10.pr1_mii0_rxd1 */
AM4372_IOPAD(0x8c4, PIN_INPUT | MUX_MODE5) /* (B19) dss_data9.pr1_mii0_rxd2 */
AM4372_IOPAD(0x8c0, PIN_INPUT | MUX_MODE5) /* (A19) dss_data8.pr1_mii0_rxd3 */
AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE2) /* (A21) dss_data1.pr1_mii0_txen */
AM4372_IOPAD(0x8d8, PIN_INPUT | MUX_MODE5) /* (C17) dss_data14.pr1_mii_mr0_clk */
AM4372_IOPAD(0x8dc, PIN_INPUT | MUX_MODE5) /* (D17) dss_data15.pr1_mii0_rxdv */
AM4372_IOPAD(0x8d4, PIN_INPUT | MUX_MODE5) /* (D19) dss_data13.pr1_mii0_rxer */
AM4372_IOPAD(0x8d0, PIN_INPUT | MUX_MODE5) /* (C19) dss_data12.pr1_mii0_rxlink */
AM4372_IOPAD(0xa40, PIN_INPUT | MUX_MODE5) /* (G20) gpio5_10.pr1_mii0_crs */
AM4372_IOPAD(0xa38, PIN_INPUT | MUX_MODE5) /* (D25) gpio5_8.pr1_mii0_col */
AM4372_IOPAD(0x858, PIN_INPUT | MUX_MODE5) /* (E8) gpmc_a6.pr1_mii_mt1_clk */
AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE5) /* (E7) gpmc_a5.pr1_mii1_txd0 */
AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE5) /* (D7) gpmc_a4.pr1_mii1_txd1 */
AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE5) /* (A4) gpmc_a3.pr1_mii1_txd2 */
AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE5) /* (C6) gpmc_a2.pr1_mii1_txd3 */
AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE5) /* (D8) gpmc_a11.pr1_mii1_rxd0 */
AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE5) /* (G8) gpmc_a10.pr1_mii1_rxd1 */
AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE5) /* (B4) gpmc_a9.pr1_mii1_rxd2 */
AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE5) /* (F7) gpmc_a8.pr1_mii1_rxd3 */
AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE5) /* (C3) gpmc_a0.pr1_mii1_txen */
AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE5) /* (F6) gpmc_a7.pr1_mii_mr1_clk */
AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE5) /* (C5) gpmc_a1.pr1_mii1_rxdv */
AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE5) /* (B3) gpmc_wpn.pr1_mii1_rxer */
AM4372_IOPAD(0xa4c, PIN_INPUT | MUX_MODE5) /* (E24) gpio5_13.pr1_mii1_rxlink */
AM4372_IOPAD(0xa44, PIN_INPUT | MUX_MODE5) /* (F23) gpio5_11.pr1_mii1_crs */
AM4372_IOPAD(0x878, PIN_INPUT | MUX_MODE5) /* (A3) gpmc_be1n.pr1_mii1_col */
>;
};
qspi_pins_default: qspi-default-pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */
@@ -539,5 +627,18 @@
};
&pruss1_mdio {
status = "disabled";
pinctrl-0 = <&pruss1_mdio_default>;
pinctrl-names = "default";
status = "okay";
reset-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
reset-delay-us = <2>; /* PHY datasheet states 1uS min */
pruss1_eth0_phy: ethernet-phy@0 {
reg = <0>;
};
pruss1_eth1_phy: ethernet-phy@1 {
reg = <1>;
};
};
+1 -1
View File
@@ -301,7 +301,7 @@
};
scm_conf: scm_conf@0 {
compatible = "syscon", "simple-bus";
compatible = "ti,am4372-scm-conf", "syscon", "simple-bus";
reg = <0x0 0x800>;
#address-cells = <1>;
#size-cells = <1>;
+11
View File
@@ -170,6 +170,17 @@
};
};
pruss2_iep: iep@2e000 {
compatible = "ti,am5728-icss-iep";
reg = <0x2e000 0x31c>;
clocks = <&pruss2_iepclk_mux>;
};
pruss2_ecap: ecap@30000 {
compatible = "ti,pruss-ecap";
reg = <0x30000 0x60>;
};
pruss2_mii_rt: mii-rt@32000 {
compatible = "ti,pruss-mii", "syscon";
reg = <0x32000 0x58>;
+7 -1
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@@ -214,5 +214,11 @@
};
&pruss2_mdio {
status = "disabled";
reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
reset-delay-us = <2>; /* PHY datasheet states 1uS min */
};
&pruss2_eth {
ti,pruss-gp-mux-sel = <4>, /* MII2, needed for PRUSS1_MII0 */
<4>; /* MII2, needed for PRUSS1_MII1 */
};
@@ -420,7 +420,7 @@
st,mod-12b = <1>; /* 12-bit ADC */
st,ref-sel = <0>; /* internal ADC reference */
st,adc-freq = <1>; /* 3.25 MHz ADC clock speed */
st,sample-time = <4>; /* ADC converstion time: 80 clocks */
st,sample-time = <4>; /* ADC conversion time: 80 clocks */
stmpe_adc {
compatible = "st,stmpe-adc";
+6 -4
View File
@@ -28,10 +28,12 @@
pinctrl-2 = <&mmc2_pins_ddr_rev20>;
};
&pruss1_mdio {
status = "disabled";
&pruss2_eth0_phy {
reset-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
reset-assert-us = <2>; /* PHY datasheet states 1uS min */
};
&pruss2_mdio {
status = "disabled";
&pruss2_eth1_phy {
reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
reset-assert-us = <2>; /* PHY datasheet states 1uS min */
};
+6 -4
View File
@@ -40,10 +40,12 @@
status = "okay";
};
&pruss1_mdio {
status = "disabled";
&pruss2_eth0_phy {
reset-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
reset-assert-us = <2>; /* PHY datasheet states 1uS min */
};
&pruss2_mdio {
status = "disabled";
&pruss2_eth1_phy {
reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
reset-assert-us = <2>; /* PHY datasheet states 1uS min */
};
@@ -155,6 +155,52 @@
compatible = "fixed-clock";
clock-frequency = <20000000>;
};
/* Dual-MAC Ethernet application node on PRU-ICSS2 */
pruss2_eth: pruss2-eth {
compatible = "ti,am57-prueth";
ti,prus = <&pru2_0>, <&pru2_1>;
sram = <&ocmcram1>;
ti,mii-rt = <&pruss2_mii_rt>;
ti,iep = <&pruss2_iep>;
ti,ecap = <&pruss2_ecap>;
interrupts = <20 2 2>, <21 3 3>;
interrupt-names = "rx_hp", "rx_lp";
interrupt-parent = <&pruss2_intc>;
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
pruss2_emac0: ethernet-port@0 {
reg = <0>;
phy-handle = <&pruss2_eth0_phy>;
phy-mode = "mii";
interrupts = <20 2 2>, <26 6 6>, <23 6 6>;
interrupt-names = "rx", "emac_ptp_tx",
"hsr_ptp_tx";
/* Filled in by bootloader */
local-mac-address = [00 00 00 00 00 00];
};
pruss2_emac1: ethernet-port@1 {
reg = <1>;
phy-handle = <&pruss2_eth1_phy>;
phy-mode = "mii";
interrupts = <21 3 3>, <27 9 7>, <24 9 7>;
interrupt-names = "rx", "emac_ptp_tx",
"hsr_ptp_tx";
/* Filled in by bootloader */
local-mac-address = [00 00 00 00 00 00];
};
};
};
};
&pruss2_iep {
interrupt-parent = <&pruss2_intc>;
interrupts = <7 7 8>;
interrupt-names = "iep_cap_cmp";
};
&dra7_pmx_core {
@@ -606,3 +652,18 @@
};
};
};
&pruss2_mdio {
status = "okay";
pruss2_eth0_phy: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&gpio3>;
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
};
pruss2_eth1_phy: ethernet-phy@1 {
reg = <1>;
interrupt-parent = <&gpio3>;
interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
};
};
+2 -2
View File
@@ -99,7 +99,7 @@
};
&mmc1 {
status = "disabled";
status = "disabled";
};
&mmc2 {
@@ -111,7 +111,7 @@
};
&mmc3 {
status = "disabled";
status = "disabled";
};
&pincntl {
+1 -1
View File
@@ -432,7 +432,7 @@
ranges = <0 0x140000 0x20000>;
scm_conf: scm_conf@0 {
compatible = "syscon", "simple-bus";
compatible = "ti,dm814-scm-conf", "syscon", "simple-bus";
reg = <0x0 0x800>;
#address-cells = <1>;
#size-cells = <1>;
+1 -1
View File
@@ -177,7 +177,7 @@
compatible = "ti,gate-clock";
clocks = <&sysclk2_ck>;
ti,bit-shift = <1>;
reg = <0x15dc>;
reg = <0x15dc>;
};
audio_pll_a_ck: audio_pll_a_ck@35c {
+1 -1
View File
@@ -100,7 +100,7 @@
/* Device Configuration Registers */
scm_conf: syscon@600 {
compatible = "syscon", "simple-bus";
compatible = "ti,dm8168-scm-conf", "syscon", "simple-bus";
reg = <0x600 0x110>;
#address-cells = <1>;
#size-cells = <1>;
+2 -2
View File
@@ -64,7 +64,7 @@
ranges = <0 0 0x2000>;
scm_conf: scm_conf@0 {
compatible = "syscon", "simple-bus";
compatible = "ti,dra7-scm-conf", "syscon", "simple-bus";
reg = <0x0 0x1400>;
#address-cells = <1>;
#size-cells = <1>;
@@ -1695,9 +1695,9 @@
reg = <0x0 0x100>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
status = "disabled";
dmas = <&sdma_xbar 55>, <&sdma_xbar 56>;
dma-names = "tx", "rx";
status = "disabled";
};
};
@@ -91,22 +91,22 @@
};
&cpu_alert0 {
temperature = <80000>; /* millicelsius */
temperature = <80000>; /* millicelsius */
};
&cpu0 {
/*
/*
* Note that the 1.2GiHz mode is enabled for all SoC variants for
* the Motorola Android Linux v3.0.8 based kernel.
*/
operating-points = <
/* kHz uV */
operating-points = <
/* kHz uV */
300000 1025000
600000 1200000
800000 1313000
1008000 1375000
1200000 1375000
>;
>;
};
&dss {

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