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accel/tcg: Replace CPUState.env_ptr with cpu_env()

Browse Source 
Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
2023-10-04 11:03:54 -07:00
parent ad75a51e84
commit b77af26e97
58 changed files with 152 additions and 155 deletions
Download Patch File Download Diff File Expand all files Collapse all files
accel/tcg/cpu-exec.c
+4 -4
View File
@@ -222,7 +222,7 @@ static TranslationBlock *tb_htable_lookup(CPUState *cpu, vaddr pc,
struct tb_desc desc;
uint32_t h;
desc.env = cpu->env_ptr;
desc.env = cpu_env(cpu);
desc.cs_base = cs_base;
desc.flags = flags;
desc.cflags = cflags;
@@ -444,7 +444,7 @@ const void *HELPER(lookup_tb_ptr)(CPUArchState *env)
static inline TranslationBlock * QEMU_DISABLE_CFI
cpu_tb_exec(CPUState *cpu, TranslationBlock *itb, int *tb_exit)
{
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
uintptr_t ret;
TranslationBlock *last_tb;
const void *tb_ptr = itb->tc.ptr;
@@ -565,7 +565,7 @@ static void cpu_exec_longjmp_cleanup(CPUState *cpu)
void cpu_exec_step_atomic(CPUState *cpu)
{
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
TranslationBlock *tb;
vaddr pc;
uint64_t cs_base;
@@ -976,7 +976,7 @@ cpu_exec_loop(CPUState *cpu, SyncClocks *sc)
uint64_t cs_base;
uint32_t flags, cflags;
cpu_get_tb_cpu_state(cpu->env_ptr, &pc, &cs_base, &flags);
cpu_get_tb_cpu_state(cpu_env(cpu), &pc, &cs_base, &flags);
/*
* When requested, use an exact setting for cflags for the next
accel/tcg/cputlb.c
+10 -10
View File
@@ -274,7 +274,7 @@ static inline void tlb_n_used_entries_dec(CPUArchState *env, uintptr_t mmu_idx)
void tlb_init(CPUState *cpu)
{
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
int64_t now = get_clock_realtime();
int i;
@@ -290,7 +290,7 @@ void tlb_init(CPUState *cpu)
void tlb_destroy(CPUState *cpu)
{
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
int i;
qemu_spin_destroy(&env_tlb(env)->c.lock);
@@ -328,7 +328,7 @@ void tlb_flush_counts(size_t *pfull, size_t *ppart, size_t *pelide)
size_t full = 0, part = 0, elide = 0;
CPU_FOREACH(cpu) {
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
full += qatomic_read(&env_tlb(env)->c.full_flush_count);
part += qatomic_read(&env_tlb(env)->c.part_flush_count);
@@ -341,7 +341,7 @@ void tlb_flush_counts(size_t *pfull, size_t *ppart, size_t *pelide)
static void tlb_flush_by_mmuidx_async_work(CPUState *cpu, run_on_cpu_data data)
{
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
uint16_t asked = data.host_int;
uint16_t all_dirty, work, to_clean;
int64_t now = get_clock_realtime();
@@ -523,7 +523,7 @@ static void tlb_flush_page_by_mmuidx_async_0(CPUState *cpu,
vaddr addr,
uint16_t idxmap)
{
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
int mmu_idx;
assert_cpu_is_self(cpu);
@@ -769,7 +769,7 @@ typedef struct {
static void tlb_flush_range_by_mmuidx_async_0(CPUState *cpu,
TLBFlushRangeData d)
{
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
int mmu_idx;
assert_cpu_is_self(cpu);
@@ -1032,7 +1032,7 @@ void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length)
int mmu_idx;
env = cpu->env_ptr;
env = cpu_env(cpu);
qemu_spin_lock(&env_tlb(env)->c.lock);
for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {
unsigned int i;
@@ -1064,7 +1064,7 @@ static inline void tlb_set_dirty1_locked(CPUTLBEntry *tlb_entry,
so that it is no longer dirty */
void tlb_set_dirty(CPUState *cpu, vaddr addr)
{
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
int mmu_idx;
assert_cpu_is_self(cpu);
@@ -1137,7 +1137,7 @@ static inline void tlb_set_compare(CPUTLBEntryFull *full, CPUTLBEntry *ent,
void tlb_set_page_full(CPUState *cpu, int mmu_idx,
vaddr addr, CPUTLBEntryFull *full)
{
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
CPUTLB *tlb = env_tlb(env);
CPUTLBDesc *desc = &tlb->d[mmu_idx];
MemoryRegionSection *section;
@@ -1662,7 +1662,7 @@ tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, vaddr addr,
bool tlb_plugin_lookup(CPUState *cpu, vaddr addr, int mmu_idx,
bool is_store, struct qemu_plugin_hwaddr *data)
{
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
CPUTLBEntry *tlbe = tlb_entry(env, mmu_idx, addr);
uintptr_t index = tlb_index(env, mmu_idx, addr);
MMUAccessType access_type = is_store ? MMU_DATA_STORE : MMU_DATA_LOAD;
accel/tcg/plugin-gen.c
+1 -1
View File
@@ -849,7 +849,7 @@ void plugin_gen_insn_start(CPUState *cpu, const DisasContextBase *db)
} else {
if (ptb->vaddr2 == -1) {
ptb->vaddr2 = TARGET_PAGE_ALIGN(db->pc_first);
get_page_addr_code_hostp(cpu->env_ptr, ptb->vaddr2, &ptb->haddr2);
get_page_addr_code_hostp(cpu_env(cpu), ptb->vaddr2, &ptb->haddr2);
}
pinsn->haddr = ptb->haddr2 + pinsn->vaddr - ptb->vaddr2;
}
accel/tcg/translate-all.c
+2 -2
View File
@@ -288,7 +288,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
vaddr pc, uint64_t cs_base,
uint32_t flags, int cflags)
{
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
TranslationBlock *tb, *existing_tb;
tb_page_addr_t phys_pc, phys_p2;
tcg_insn_unit *gen_code_buf;
@@ -580,7 +580,7 @@ void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr)
} else {
/* The exception probably happened in a helper. The CPU state should
have been saved before calling it. Fetch the PC from there. */
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
vaddr pc;
uint64_t cs_base;
tb_page_addr_t addr;
bsd-user/main.c
+1 -1
View File
@@ -462,7 +462,7 @@ int main(int argc, char **argv)
ac->init_machine(NULL);
}
cpu = cpu_create(cpu_type);
env = cpu->env_ptr;
env = cpu_env(cpu);
cpu_reset(cpu);
thread_cpu = cpu;
bsd-user/signal.c
+4 -5
View File
@@ -351,8 +351,8 @@ static int core_dump_signal(int sig)
static G_NORETURN
void dump_core_and_abort(int target_sig)
{
CPUArchState *env = thread_cpu->env_ptr;
CPUState *cpu = env_cpu(env);
CPUState *cpu = thread_cpu;
CPUArchState *env = cpu_env(cpu);
TaskState *ts = cpu->opaque;
int core_dumped = 0;
int host_sig;
@@ -457,7 +457,7 @@ static int fatal_signal(int sig)
void force_sig_fault(int sig, int code, abi_ulong addr)
{
CPUState *cpu = thread_cpu;
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
target_siginfo_t info = {};
info.si_signo = sig;
@@ -469,8 +469,7 @@ void force_sig_fault(int sig, int code, abi_ulong addr)
static void host_signal_handler(int host_sig, siginfo_t *info, void *puc)
{
CPUArchState *env = thread_cpu->env_ptr;
CPUState *cpu = env_cpu(env);
CPUState *cpu = thread_cpu;
TaskState *ts = cpu->opaque;
target_siginfo_t tinfo;
ucontext_t *uc = puc;
gdbstub/gdbstub.c
+2 -2
View File
@@ -423,7 +423,7 @@ static const char *get_feature_xml(const char *p, const char **newp,
static int gdb_read_register(CPUState *cpu, GByteArray *buf, int reg)
{
CPUClass *cc = CPU_GET_CLASS(cpu);
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
GDBRegisterState *r;
if (reg < cc->gdb_num_core_regs) {
@@ -441,7 +441,7 @@ static int gdb_read_register(CPUState *cpu, GByteArray *buf, int reg)
static int gdb_write_register(CPUState *cpu, uint8_t *mem_buf, int reg)
{
CPUClass *cc = CPU_GET_CLASS(cpu);
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
GDBRegisterState *r;
if (reg < cc->gdb_num_core_regs) {
gdbstub/user-target.c
+1 -1
View File
@@ -310,7 +310,7 @@ void gdb_handle_v_file_open(GArray *params, void *user_ctx)
uint64_t mode = get_param(params, 2)->val_ull;
#ifdef CONFIG_LINUX
int fd = do_guest_openat(gdbserver_state.g_cpu->env_ptr, 0, filename,
int fd = do_guest_openat(cpu_env(gdbserver_state.g_cpu), 0, filename,
flags, mode, false);
#else
int fd = open(filename, flags, mode);
hw/i386/kvm/clock.c
+1 -1
View File
@@ -66,7 +66,7 @@ struct pvclock_vcpu_time_info {
static uint64_t kvmclock_current_nsec(KVMClockState *s)
{
CPUState *cpu = first_cpu;
CPUX86State *env = cpu->env_ptr;
CPUX86State *env = cpu_env(cpu);
hwaddr kvmclock_struct_pa;
uint64_t migration_tsc = env->tsc;
struct pvclock_vcpu_time_info time;
hw/intc/mips_gic.c
+1 -1
View File
@@ -423,7 +423,7 @@ static void mips_gic_realize(DeviceState *dev, Error **errp)
/* Register the env for all VPs with the GIC */
for (i = 0; i < s->num_vps; i++) {
if (cs != NULL) {
s->vps[i].env = cs->env_ptr;
s->vps[i].env = cpu_env(cs);
cs = CPU_NEXT(cs);
} else {
error_setg(errp,
hw/intc/riscv_aclint.c
+6 -6
View File
@@ -131,7 +131,7 @@ static uint64_t riscv_aclint_mtimer_read(void *opaque, hwaddr addr,
size_t hartid = mtimer->hartid_base +
((addr - mtimer->timecmp_base) >> 3);
CPUState *cpu = cpu_by_arch_id(hartid);
CPURISCVState *env = cpu ? cpu->env_ptr : NULL;
CPURISCVState *env = cpu ? cpu_env(cpu) : NULL;
if (!env) {
qemu_log_mask(LOG_GUEST_ERROR,
"aclint-mtimer: invalid hartid: %zu", hartid);
@@ -174,7 +174,7 @@ static void riscv_aclint_mtimer_write(void *opaque, hwaddr addr,
size_t hartid = mtimer->hartid_base +
((addr - mtimer->timecmp_base) >> 3);
CPUState *cpu = cpu_by_arch_id(hartid);
CPURISCVState *env = cpu ? cpu->env_ptr : NULL;
CPURISCVState *env = cpu ? cpu_env(cpu) : NULL;
if (!env) {
qemu_log_mask(LOG_GUEST_ERROR,
"aclint-mtimer: invalid hartid: %zu", hartid);
@@ -233,7 +233,7 @@ static void riscv_aclint_mtimer_write(void *opaque, hwaddr addr,
/* Check if timer interrupt is triggered for each hart. */
for (i = 0; i < mtimer->num_harts; i++) {
CPUState *cpu = cpu_by_arch_id(mtimer->hartid_base + i);
CPURISCVState *env = cpu ? cpu->env_ptr : NULL;
CPURISCVState *env = cpu ? cpu_env(cpu) : NULL;
if (!env) {
continue;
}
@@ -375,7 +375,7 @@ DeviceState *riscv_aclint_mtimer_create(hwaddr addr, hwaddr size,
for (i = 0; i < num_harts; i++) {
CPUState *cpu = cpu_by_arch_id(hartid_base + i);
RISCVCPU *rvcpu = RISCV_CPU(cpu);
CPURISCVState *env = cpu ? cpu->env_ptr : NULL;
CPURISCVState *env = cpu ? cpu_env(cpu) : NULL;
riscv_aclint_mtimer_callback *cb =
g_new0(riscv_aclint_mtimer_callback, 1);
@@ -409,7 +409,7 @@ static uint64_t riscv_aclint_swi_read(void *opaque, hwaddr addr,
if (addr < (swi->num_harts << 2)) {
size_t hartid = swi->hartid_base + (addr >> 2);
CPUState *cpu = cpu_by_arch_id(hartid);
CPURISCVState *env = cpu ? cpu->env_ptr : NULL;
CPURISCVState *env = cpu ? cpu_env(cpu) : NULL;
if (!env) {
qemu_log_mask(LOG_GUEST_ERROR,
"aclint-swi: invalid hartid: %zu", hartid);
@@ -432,7 +432,7 @@ static void riscv_aclint_swi_write(void *opaque, hwaddr addr, uint64_t value,
if (addr < (swi->num_harts << 2)) {
size_t hartid = swi->hartid_base + (addr >> 2);
CPUState *cpu = cpu_by_arch_id(hartid);
CPURISCVState *env = cpu ? cpu->env_ptr : NULL;
CPURISCVState *env = cpu ? cpu_env(cpu) : NULL;
if (!env) {
qemu_log_mask(LOG_GUEST_ERROR,
"aclint-swi: invalid hartid: %zu", hartid);
hw/intc/riscv_imsic.c
+1 -1
View File
@@ -333,7 +333,7 @@ static void riscv_imsic_realize(DeviceState *dev, Error **errp)
RISCVIMSICState *imsic = RISCV_IMSIC(dev);
RISCVCPU *rcpu = RISCV_CPU(cpu_by_arch_id(imsic->hartid));
CPUState *cpu = cpu_by_arch_id(imsic->hartid);
CPURISCVState *env = cpu ? cpu->env_ptr : NULL;
CPURISCVState *env = cpu ? cpu_env(cpu) : NULL;
if (!kvm_irqchip_in_kernel()) {
imsic->num_eistate = imsic->num_pages * imsic->num_irqs;
hw/ppc/e500.c
+2 -2
View File
@@ -373,7 +373,7 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,
MachineState *machine = MACHINE(pms);
unsigned int smp_cpus = machine->smp.cpus;
const PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(pms);
CPUPPCState *env = first_cpu->env_ptr;
CPUPPCState *env = cpu_env(first_cpu);
int ret = -1;
uint64_t mem_reg_property[] = { 0, cpu_to_be64(machine->ram_size) };
int fdt_size;
@@ -499,7 +499,7 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,
if (cpu == NULL) {
continue;
}
env = cpu->env_ptr;
env = cpu_env(cpu);
cpu_name = g_strdup_printf("/cpus/PowerPC,8544@%x", i);
qemu_fdt_add_subnode(fdt, cpu_name);
hw/ppc/spapr.c
+1 -1
View File
@@ -1125,7 +1125,7 @@ static void spapr_dt_hypervisor(SpaprMachineState *spapr, void *fdt)
* Older KVM versions with older guest kernels were broken
* with the magic page, don't allow the guest to map it.
*/
if (!kvmppc_get_hypercall(first_cpu->env_ptr, hypercall,
if (!kvmppc_get_hypercall(cpu_env(first_cpu), hypercall,
sizeof(hypercall))) {
_FDT(fdt_setprop(fdt, hypervisor, "hcall-instructions",
hypercall, sizeof(hypercall)));
include/exec/cpu-all.h
-1
View File
@@ -431,7 +431,6 @@ int cpu_exec(CPUState *cpu);
*/
static inline void cpu_set_cpustate_pointers(ArchCPU *cpu)
{
cpu->parent_obj.env_ptr = &cpu->env;
}
/* Validate correct placement of CPUArchState. */
include/hw/core/cpu.h
+6 -3
View File
@@ -427,7 +427,6 @@ struct qemu_work_item;
* @num_ases: number of CPUAddressSpaces in @cpu_ases
* @as: Pointer to the first AddressSpace, for the convenience of targets which
* only have a single AddressSpace
* @env_ptr: Pointer to subclass-specific CPUArchState field.
* @gdb_regs: Additional GDB registers.
* @gdb_num_regs: Number of total registers accessible to GDB.
* @gdb_num_g_regs: Number of registers in GDB 'g' packets.
@@ -501,8 +500,6 @@ struct CPUState {
AddressSpace *as;
MemoryRegion *memory;
CPUArchState *env_ptr;
CPUJumpCache *tb_jmp_cache;
struct GDBRegisterState *gdb_regs;
@@ -582,6 +579,12 @@ struct CPUState {
QEMU_BUILD_BUG_ON(offsetof(CPUState, neg) !=
sizeof(CPUState) - sizeof(CPUNegativeOffsetState));
static inline CPUArchState *cpu_env(CPUState *cpu)
{
/* We validate that CPUArchState follows CPUState in cpu-all.h. */
return (CPUArchState *)(cpu + 1);
}
typedef QTAILQ_HEAD(CPUTailQ, CPUState) CPUTailQ;
extern CPUTailQ cpus;
linux-user/elfload.c
+2 -2
View File
@@ -593,7 +593,7 @@ const char *elf_hwcap2_str(uint32_t bit)
static const char *get_elf_platform(void)
{
CPUARMState *env = thread_cpu->env_ptr;
CPUARMState *env = cpu_env(thread_cpu);
#if TARGET_BIG_ENDIAN
# define END "b"
@@ -4430,7 +4430,7 @@ static int fill_note_info(struct elf_note_info *info,
if (cpu == thread_cpu) {
continue;
}
fill_thread_info(info, cpu->env_ptr);
fill_thread_info(info, cpu_env(cpu));
}
}
linux-user/i386/cpu_loop.c
+1 -1
View File
@@ -323,7 +323,7 @@ void cpu_loop(CPUX86State *env)
static void target_cpu_free(void *obj)
{
CPUArchState *env = ((CPUState *)obj)->env_ptr;
CPUArchState *env = cpu_env(obj);
target_munmap(env->gdt.base, sizeof(uint64_t) * TARGET_GDT_ENTRIES);
g_free(obj);
}
linux-user/main.c
+2 -2
View File
@@ -229,7 +229,7 @@ CPUArchState *cpu_copy(CPUArchState *env)
{
CPUState *cpu = env_cpu(env);
CPUState *new_cpu = cpu_create(cpu_type);
CPUArchState *new_env = new_cpu->env_ptr;
CPUArchState *new_env = cpu_env(new_cpu);
CPUBreakpoint *bp;
/* Reset non arch specific state */
@@ -794,7 +794,7 @@ int main(int argc, char **argv, char **envp)
ac->init_machine(NULL);
}
cpu = cpu_create(cpu_type);
env = cpu->env_ptr;
env = cpu_env(cpu);
cpu_reset(cpu);
thread_cpu = cpu;
linux-user/signal.c
+7 -8
View File
@@ -618,7 +618,7 @@ void signal_init(void)
void force_sig(int sig)
{
CPUState *cpu = thread_cpu;
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
target_siginfo_t info = {};
info.si_signo = sig;
@@ -636,7 +636,7 @@ void force_sig(int sig)
void force_sig_fault(int sig, int code, abi_ulong addr)
{
CPUState *cpu = thread_cpu;
CPUArchState *env = cpu->env_ptr;
CPUArchState *env = cpu_env(cpu);
target_siginfo_t info = {};
info.si_signo = sig;
@@ -695,10 +695,9 @@ void cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr,
/* abort execution with signal */
static G_NORETURN
void dump_core_and_abort(CPUArchState *cpu_env, int target_sig)
void dump_core_and_abort(CPUArchState *env, int target_sig)
{
CPUState *cpu = thread_cpu;
CPUArchState *env = cpu->env_ptr;
CPUState *cpu = env_cpu(env);
TaskState *ts = (TaskState *)cpu->opaque;
int host_sig, core_dumped = 0;
struct sigaction act;
@@ -724,7 +723,7 @@ void dump_core_and_abort(CPUArchState *cpu_env, int target_sig)
target_sig, strsignal(host_sig), "core dumped" );
}
preexit_cleanup(cpu_env, 128 + target_sig);
preexit_cleanup(env, 128 + target_sig);
/* The proper exit code for dying from an uncaught signal is
* -<signal>. The kernel doesn't allow exit() or _exit() to pass
@@ -783,8 +782,8 @@ static inline void rewind_if_in_safe_syscall(void *puc)
static void host_signal_handler(int host_sig, siginfo_t *info, void *puc)
{
CPUArchState *env = thread_cpu->env_ptr;
CPUState *cpu = env_cpu(env);
CPUState *cpu = thread_cpu;
CPUArchState *env = cpu_env(cpu);
TaskState *ts = cpu->opaque;
target_siginfo_t tinfo;
host_sigcontext *uc = puc;

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