izzy/xemu
0
0
Fork 0
mirror of https://github.com/izzy2lost/xemu.git synced 2026-07-06 00:20:22 -07:00
Code Issues Packages Projects Releases Wiki Activity

Merge tag 'pull-tcg-20251019' of https://gitlab.com/rth7680/qemu into staging

Browse Source 
tcg: Remove support for 32-bit mips/ppc hosts

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmj1LRUdHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8+pAf/VBeBnMEuGlc+nrJS
# VEYSVsyWeKy8ezRphc502HYrzeiJ/h7L5wwHG2Yt41GbiQ9M+2H02hQAQTwsft4H
# vQ1iUM7rurY75gYzbBCgUDGqG8y0VRAyAafheMWiaKk/r6QMCmIX5yClZKH6Yzvg
# ZDwSx9FgaWbXwW11tG/0Cl5p9PtWAhGy3NecnNprMqJ1Hqv2zxT9U8v9yN1U6oiH
# FHlJmsfPqWQhU0jLZ78LHc802Iys8qF6DQJNYVQ7Xkbu24pTC9HoR3z7MqoI1hQF
# ELrH8fZmFiWbkx85paWFsSP/Y3Ff+lcG5hrv91KPoX2uB3ymNLJ0qYG0S8Cvt/VX
# JSeH9Q==
# =qyo5
# -----END PGP SIGNATURE-----
# gpg: Signature made Sun 19 Oct 2025 11:25:25 AM PDT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]

* tag 'pull-tcg-20251019' of https://gitlab.com/rth7680/qemu:
  tcg/ppc: Remove support for 32-bit hosts
  tcg/ppc: Remove dead cases from tcg_target_op_def
  buildsys: Remove support for 32-bit PPC hosts
  tcg/mips: Remove ALIAS_PADD, ALIAS_PADDI
  tcg/mips: Remove support for 32-bit hosts
  tcg/mips: Remove support for O32 and N32 ABIs
  kvm/mips: Remove support for 32-bit hosts
  buildsys: Remove support for 32-bit MIPS hosts
  gitlab: Stop cross-testing for 32-bit MIPS hosts

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
2025-10-19 11:29:13 -07:00
parent c85ba2d7a4 5c1ec5a1ee
commit aa2c42057e
16 changed files with 154 additions and 714 deletions
Download Patch File Download Diff File Expand all files Collapse all files
.gitlab-ci.d/container-cross.yml
-6
View File
@@ -52,12 +52,6 @@ mips64el-debian-cross-container:
variables:
NAME: debian-mips64el-cross
mipsel-debian-cross-container:
extends: .container_job_template
stage: containers
variables:
NAME: debian-mipsel-cross
ppc64el-debian-cross-container:
extends: .container_job_template
stage: containers
.gitlab-ci.d/crossbuilds.yml
-14
View File
@@ -68,20 +68,6 @@ cross-i686-tci:
# would otherwise be using a parallelism of 9.
MAKE_CHECK_ARGS: check check-tcg -j2
cross-mipsel-system:
extends: .cross_system_build_job
needs:
- job: mipsel-debian-cross-container
variables:
IMAGE: debian-mipsel-cross
cross-mipsel-user:
extends: .cross_user_build_job
needs:
- job: mipsel-debian-cross-container
variables:
IMAGE: debian-mipsel-cross
cross-mips64el-system:
extends: .cross_system_build_job
needs:
common-user/host/mips/safe-syscall.inc.S
-35
View File
@@ -30,15 +30,9 @@
* arguments being syscall arguments (also 'long').
*/
#if _MIPS_SIM == _ABIO32
/* 8 * 4 = 32 for outgoing parameters; 1 * 4 for s0 save; 1 * 4 for align. */
#define FRAME 40
#define OFS_S0 32
#else
/* 1 * 8 for s0 save; 1 * 8 for align. */
#define FRAME 16
#define OFS_S0 0
#endif
NESTED(safe_syscall_base, FRAME, ra)
@@ -47,34 +41,6 @@ NESTED(safe_syscall_base, FRAME, ra)
.cfi_adjust_cfa_offset FRAME
REG_S s0, OFS_S0(sp)
.cfi_rel_offset s0, OFS_S0
#if _MIPS_SIM == _ABIO32
/*
* The syscall calling convention is nearly the same as C:
* we enter with a0 == &signal_pending
* a1 == syscall number
* a2, a3, stack == syscall arguments
* and return the result in a0
* and the syscall instruction needs
* v0 == syscall number
* a0 ... a3, stack == syscall arguments
* and returns the result in v0
* Shuffle everything around appropriately.
*/
move s0, a0 /* signal_pending pointer */
move v0, a1 /* syscall number */
move a0, a2 /* syscall arguments */
move a1, a3
lw a2, FRAME+16(sp)
lw a3, FRAME+20(sp)
lw t4, FRAME+24(sp)
lw t5, FRAME+28(sp)
lw t6, FRAME+32(sp)
lw t7, FRAME+40(sp)
sw t4, 16(sp)
sw t5, 20(sp)
sw t6, 24(sp)
sw t7, 28(sp)
#else
/*
* The syscall calling convention is nearly the same as C:
* we enter with a0 == &signal_pending
@@ -95,7 +61,6 @@ NESTED(safe_syscall_base, FRAME, ra)
move a3, a5
move a4, a6
move a5, a7
#endif
/*
* This next sequence of code works in conjunction with the
configure
Vendored
+5 -21
View File
@@ -391,21 +391,15 @@ elif check_define __sparc__ ; then
else
cpu="sparc"
fi
elif check_define _ARCH_PPC ; then
if check_define _ARCH_PPC64 ; then
if check_define _LITTLE_ENDIAN ; then
cpu="ppc64le"
else
cpu="ppc64"
fi
elif check_define _ARCH_PPC64 ; then
if check_define _LITTLE_ENDIAN ; then
cpu="ppc64le"
else
cpu="ppc"
cpu="ppc64"
fi
elif check_define __mips__ ; then
if check_define __mips64 ; then
cpu="mips64"
else
cpu="mips"
fi
elif check_define __s390__ ; then
if check_define __s390x__ ; then
@@ -473,17 +467,7 @@ case "$cpu" in
host_arch=mips
linux_arch=mips
;;
mips*)
cpu=mips
host_arch=mips
linux_arch=mips
;;
ppc)
host_arch=ppc
linux_arch=powerpc
CPU_CFLAGS="-m32"
;;
ppc64)
host_arch=ppc64
linux_arch=powerpc
@@ -1478,7 +1462,7 @@ probe_target_compiler() {
container_image=debian-all-test-cross
container_cross_prefix=mips64-linux-gnuabi64-
;;
ppc|ppc64|ppc64le)
ppc64|ppc64le)
container_image=debian-all-test-cross
container_cross_prefix=powerpc${target_arch#ppc}-linux-gnu-
;;
disas/disas-host.c
+1 -3
View File
@@ -56,11 +56,9 @@ static void initialize_debug_host(CPUDebug *s)
s->info.cap_mode = CS_MODE_64;
s->info.cap_insn_unit = 1;
s->info.cap_insn_split = 8;
#elif defined(_ARCH_PPC)
#elif defined(_ARCH_PPC64)
s->info.cap_arch = CS_ARCH_PPC;
# ifdef _ARCH_PPC64
s->info.cap_mode = CS_MODE_64;
# endif
#elif defined(__riscv)
#if defined(_ILP32) || (__riscv_xlen == 32)
s->info.print_insn = print_insn_riscv32;
docs/about/deprecated.rst
+5 -8
View File
@@ -172,17 +172,14 @@ This argument has always been ignored.
Host Architectures
------------------
Big endian MIPS since 7.2; 32-bit little endian MIPS since 9.2, MIPS since 11.0
'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
MIPS (since 11.0)
'''''''''''''''''
As Debian 10 ("Buster") moved into LTS the big endian 32 bit version of
MIPS moved out of support making it hard to maintain our
cross-compilation CI tests of the architecture. As we no longer have
CI coverage support may bitrot away before the deprecation process
MIPS is not supported by Debian 13 ("Trixie") and newer, making it hard to
maintain our cross-compilation CI tests of the architecture. As we no longer
have CI coverage support may bitrot away before the deprecation process
completes.
Likewise, MIPS is not supported by Debian 13 ("Trixie") and newer.
System emulation on 32-bit x86 hosts (since 8.0)
''''''''''''''''''''''''''''''''''''''''''''''''
docs/about/removed-features.rst
+6
View File
@@ -896,6 +896,12 @@ work around the atomicity issues in system mode by running all vCPUs
in a single thread context; in user mode atomicity was simply broken.
From 10.0, QEMU has disabled configuration of 64-bit guests on 32-bit hosts.
32-bit MIPS (since 11.0)
''''''''''''''''''''''''
Debian 12 "Bookworm" removed support for 32-bit MIPS, making it hard to
maintain our cross-compilation CI tests of the architecture.
Guest Emulator ISAs
-------------------
include/qemu/timer.h
+1 -12
View File
@@ -850,12 +850,11 @@ static inline int64_t get_clock(void)
/*******************************************/
/* host CPU ticks (if available) */
#if defined(_ARCH_PPC)
#if defined(_ARCH_PPC64)
static inline int64_t cpu_get_host_ticks(void)
{
int64_t retval;
#ifdef _ARCH_PPC64
/* This reads timebase in one 64bit go and includes Cell workaround from:
http://ozlabs.org/pipermail/linuxppc-dev/2006-October/027052.html
*/
@@ -863,16 +862,6 @@ static inline int64_t cpu_get_host_ticks(void)
"cmpwi %0,0\n\t"
"beq- $-8"
: "=r" (retval));
#else
/* http://ozlabs.org/pipermail/linuxppc-dev/1999-October/003889.html */
unsigned long junk;
__asm__ __volatile__ ("mfspr %1,269\n\t" /* mftbu */
"mfspr %L0,268\n\t" /* mftb */
"mfspr %0,269\n\t" /* mftbu */
"cmpw %0,%1\n\t"
"bne $-16"
: "=r" (retval), "=r" (junk));
#endif
return retval;
}
meson.build
-2
View File
@@ -295,8 +295,6 @@ elif cpu == 'ppc'
kvm_targets = ['ppc-softmmu']
elif cpu == 'ppc64'
kvm_targets = ['ppc-softmmu', 'ppc64-softmmu']
elif cpu == 'mips'
kvm_targets = ['mips-softmmu', 'mipsel-softmmu']
elif cpu == 'mips64'
kvm_targets = ['mips-softmmu', 'mipsel-softmmu', 'mips64-softmmu', 'mips64el-softmmu']
elif cpu == 'riscv32'
tcg/mips/tcg-target-has.h
-2
View File
@@ -39,11 +39,9 @@ extern bool use_mips32r2_instructions;
#endif
/* optional instructions */
#if TCG_TARGET_REG_BITS == 64
#define TCG_TARGET_HAS_extr_i64_i32 1
#define TCG_TARGET_HAS_ext32s_i64 1
#define TCG_TARGET_HAS_ext32u_i64 1
#endif
/* optional instructions detected at runtime */
#define TCG_TARGET_HAS_qemu_ldst_i128 0
tcg/mips/tcg-target-reg-bits.h
+3 -5
View File
@@ -7,12 +7,10 @@
#ifndef TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS_H
#if _MIPS_SIM == _ABIO32
# define TCG_TARGET_REG_BITS 32
#elif _MIPS_SIM == _ABIN32 || _MIPS_SIM == _ABI64
# define TCG_TARGET_REG_BITS 64
#else
#if !defined(_MIPS_SIM) || _MIPS_SIM != _ABI64
# error "Unknown ABI"
#endif
#define TCG_TARGET_REG_BITS 64
#endif
tcg/mips/tcg-target.c.inc
+52 -279
View File
File diff suppressed because it is too large Load Diff
tcg/ppc/tcg-target-has.h
+1 -4
View File
@@ -17,12 +17,9 @@
#define have_vsx (cpuinfo & CPUINFO_VSX)
/* optional instructions */
#if TCG_TARGET_REG_BITS == 64
#define TCG_TARGET_HAS_extr_i64_i32 0
#endif
#define TCG_TARGET_HAS_qemu_ldst_i128 \
(TCG_TARGET_REG_BITS == 64 && have_isa_2_07)
#define TCG_TARGET_HAS_qemu_ldst_i128 have_isa_2_07
#define TCG_TARGET_HAS_tst 1
tcg/ppc/tcg-target-reg-bits.h
+4 -4
View File
@@ -7,10 +7,10 @@
#ifndef TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS_H
#ifdef _ARCH_PPC64
# define TCG_TARGET_REG_BITS 64
#else
# define TCG_TARGET_REG_BITS 32
#ifndef _ARCH_PPC64
# error Expecting 64-bit host architecture
#endif
#define TCG_TARGET_REG_BITS 64
#endif
tcg/ppc/tcg-target.c.inc
+74 -317
View File
File diff suppressed because it is too large Load Diff
util/cacheflush.c
+2 -2
View File
@@ -153,7 +153,7 @@ static void arch_cache_info(int *isize, int *dsize)
}
}
#elif defined(_ARCH_PPC) && defined(__linux__)
#elif defined(_ARCH_PPC64) && defined(__linux__)
# include "elf.h"
static void arch_cache_info(int *isize, int *dsize)
@@ -187,7 +187,7 @@ static void fallback_cache_info(int *isize, int *dsize)
} else if (*dsize) {
*isize = *dsize;
} else {
#if defined(_ARCH_PPC)
#if defined(_ARCH_PPC64)
/*
* For PPC, we're going to use the cache sizes computed for
* flush_idcache_range. Which means that we must use the