Henrik Rydgård
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2a74a0b98a
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Merge pull request #17893 from unknownbrackets/riscv-blocklink
riscv: Enable block linking
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2023-08-13 12:40:39 +02:00 |
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Ethan O'Brien
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8426b35a80
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Cleanup emscripten libretro build target
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2023-08-12 14:38:35 -05:00 |
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Unknown W. Brackets
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81f67c717c
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riscv: Fix block link for prev blocks.
Oops, was just reversed so never linking.
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2023-08-12 10:48:39 -07:00 |
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Unknown W. Brackets
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fcc90095f7
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riscv: Enable block linking.
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2023-08-12 09:37:02 -07:00 |
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Unknown W. Brackets
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247788806a
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irjit: Add direct helper for start PC.
It's annoying always fetching length too.
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2023-08-12 09:37:02 -07:00 |
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Unknown W. Brackets
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b3cdf06c5a
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riscv: Write fixup on block invalidation.
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2023-08-12 09:37:02 -07:00 |
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Unknown W. Brackets
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3757ebca2d
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irjit: Invalidate/finalize target blocks.
Doesn't actually do anything yet, but adds plumbing.
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2023-08-12 09:37:02 -07:00 |
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Henrik Rydgård
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1ea11c233c
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Remove "SwapBuffers" from the GraphicsContext interface.
Buildfixes
More buildfix
headless buildfix
One more buildfix
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2023-08-11 01:57:02 +02:00 |
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Henrik Rydgård
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7c60022979
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Fix hang after exiting a game. After running a game, coreState is POWERDOWN which counts as stepping.
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2023-08-10 23:52:24 +02:00 |
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Henrik Rydgård
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779a156251
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PortManager warning fix. The #pragma pack stuff was redundant anyway
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2023-08-10 17:15:57 +02:00 |
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Henrik Rydgård
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4b0ac494d0
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Even more simplification
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2023-08-10 17:15:57 +02:00 |
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Henrik Rydgård
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0477ba8c78
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Core.cpp: Some slight simplifications
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2023-08-10 17:15:56 +02:00 |
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Henrik Rydgård
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be708e3e02
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Move KeepScreenAwake to platform specific code.
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2023-08-10 16:12:12 +02:00 |
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Henrik Rydgård
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50ea506b6a
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Revert "Regression experiment: Temporarily revert to returning 0 from bad achievement memory accesses."
This reverts commit a044d8ccc2.
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2023-08-09 16:16:39 +02:00 |
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Henrik Rydgård
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2342c4522c
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Merge pull request #17875 from unknownbrackets/riscv-jit
RISC-V: Implement a few more ops
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2023-08-09 09:30:15 +02:00 |
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Henrik Rydgård
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bac4e8d42d
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Merge pull request #17874 from unknownbrackets/irjit-exits
IR: Simplify exits to ExitToConst when viable
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2023-08-09 09:11:52 +02:00 |
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Henrik Rydgård
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6758675054
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Merge pull request #17873 from unknownbrackets/irjit-shuffle
IR: Fix vqmul / Vec4Shuffle overlap
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2023-08-09 09:10:03 +02:00 |
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Unknown W. Brackets
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2c13b6d973
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riscv: Implement vc2i.
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2023-08-08 23:17:32 -07:00 |
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Unknown W. Brackets
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28c58c1d24
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irjit: Allow more forms of vmidt.
Mildly worth it.
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2023-08-08 23:17:32 -07:00 |
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Unknown W. Brackets
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4b9011e475
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riscv: Reduce call bloat using temps.
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2023-08-08 23:17:32 -07:00 |
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Unknown W. Brackets
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ddf3d02a3c
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riscv: Implement vi2uc.
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2023-08-08 23:17:32 -07:00 |
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Unknown W. Brackets
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268adf1aa1
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riscv: Implement scaled float/int convert.
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2023-08-08 23:17:32 -07:00 |
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Unknown W. Brackets
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0b4e7d60f9
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riscv: Implement ReverseBits in jit.
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2023-08-08 23:17:32 -07:00 |
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Unknown W. Brackets
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ad4cbbab8e
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riscv: Don't cache mipState on backend.
Bad sign if we're trying to use it, anyway.
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2023-08-08 23:17:32 -07:00 |
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Unknown W. Brackets
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31ff23746c
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irjit: Prefer ExitToConst over ExitToReg.
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2023-08-08 23:14:01 -07:00 |
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