Unknown W. Brackets
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739e474957
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irjit: Improve dot and store vec4 interaction.
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2023-09-01 22:35:59 -07:00 |
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Unknown W. Brackets
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2ca638868c
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irjit: Remove Vec4Scale/Vec4Dot aliasing in pass.
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2023-09-01 22:35:59 -07:00 |
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Unknown W. Brackets
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96c90c19c6
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irjit: Reduce unnecessary shuffles.
If it's never used as a Vec4 again, it's often not worth it.
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2023-09-01 22:35:59 -07:00 |
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Unknown W. Brackets
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5f84887dea
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irjit: Add a pass to keep Vec4s in Vec4s.
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2023-09-01 22:35:59 -07:00 |
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Henrik Rydgård
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ae0af175de
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Merge pull request #18004 from unknownbrackets/x86-jit-minor
x86jit: Small cleanup and tweaks, downcountInRegster, GetFPRLaneCount bugfix
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2023-08-29 08:01:47 +02:00 |
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Unknown W. Brackets
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14d871730f
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x86jit: Optimize slow memory.
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2023-08-28 21:16:38 -07:00 |
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Unknown W. Brackets
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8e8605935e
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irjit: Detect subtract-to-zero as constant.
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2023-08-28 21:09:56 -07:00 |
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Unknown W. Brackets
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4e90bd5070
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x86jit: Use NEG more automatically for Sub x,0,y.
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2023-08-28 21:09:56 -07:00 |
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Unknown W. Brackets
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f263698897
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irjit: Cleanup temp purging on exit.
We were sometimes considering it read by exit and not purging.
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2023-08-27 12:26:05 -07:00 |
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Unknown W. Brackets
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552cd88938
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irjit: Skip some work in PurgeTemps.
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2023-08-20 08:59:47 -07:00 |
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Unknown W. Brackets
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57123e8f9e
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irjit: Reserve some arrays that churn.
Improves IR compile time by around 20-30%.
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2023-08-20 08:59:47 -07:00 |
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Henrik Rydgård
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2cdcc413b7
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Merge pull request #17898 from unknownbrackets/irjit-vfputemps
irjit: Cleanup/purge FPU/VFPU temps
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2023-08-13 21:08:00 +02:00 |
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Unknown W. Brackets
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2b36e0a625
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irjit: ZeroFpCond -> FpCondFromReg.
We already have a zero reg, so this is more useful and symmetrical.
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2023-08-13 10:40:47 -07:00 |
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Unknown W. Brackets
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fa53b80574
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irjit: Cleanup/purge FPU/VFPU temps.
A lot of cases are followed by an FMov that just moved the temp to a
regular register, from VFPU instructions playing safe about overlaps.
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2023-08-13 10:14:10 -07:00 |
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Unknown W. Brackets
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31ff23746c
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irjit: Prefer ExitToConst over ExitToReg.
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2023-08-08 23:14:01 -07:00 |
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Unknown W. Brackets
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3f97545f99
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irjit: Reduce exits from constants.
This reduces bloat a bit, and may help with common funcs that enter short
loops.
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2023-08-08 23:05:14 -07:00 |
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Unknown W. Brackets
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5f9a8fd1a1
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irjit: Rename IRRegCache to IRImmRegCache.
For clarity, since it's not a native regcache.
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2023-08-08 23:05:14 -07:00 |
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Henrik Rydgård
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e9431d0d1e
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Merge pull request #17859 from unknownbrackets/irjit-vec4
irjit: Use Vec4 a bit more
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2023-08-06 23:05:33 +02:00 |
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Unknown W. Brackets
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79ca880ac7
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irjit: Implement vqmul, add Vec4Blend.
Should be useful more places.
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2023-08-06 13:38:00 -07:00 |
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Unknown W. Brackets
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a32889d3ca
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irjit: Consistently dirty vfpuctrl in IR.
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2023-08-06 08:36:19 -07:00 |
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Unknown W. Brackets
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b03398a46c
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Merge pull request #17815 from unknownbrackets/riscv-jit
riscv: Spill registers more intelligently
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2023-07-30 14:49:37 -07:00 |
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Unknown W. Brackets
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f870271011
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riscv: Spill registers more intelligently.
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2023-07-30 14:24:12 -07:00 |
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Unknown W. Brackets
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5db6b11ef2
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irjit: Cleanup self-fmovs.
These were sometimes getting emitted.
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2023-07-30 14:16:17 -07:00 |
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Henrik Rydgård
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180bda6f6b
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Merge pull request #17799 from unknownbrackets/irjit-lsu
Add ll/sc to IR and x86jit
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2023-07-30 09:15:55 +02:00 |
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Unknown W. Brackets
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e228748449
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irjit: Add FCvtScaledSW to safely scale vi2f.
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2023-07-29 18:30:15 -07:00 |
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