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x86jit: Handle breakpoints.
Otherwise, we don't actually break until later, which isn't great. Could be more optimal, "rewinding" regcache state.
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@@ -23,6 +23,7 @@
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#include "Core/HLE/HLE.h"
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#include "Core/HLE/ReplaceTables.h"
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#include "Core/MemMap.h"
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#include "Core/MIPS/IR/IRInterpreter.h"
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#include "Core/MIPS/x86/X64IRJit.h"
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#include "Core/MIPS/x86/X64IRRegCache.h"
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@@ -88,10 +89,26 @@ void X64JitBackend::CompIR_Breakpoint(IRInst inst) {
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switch (inst.op) {
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case IROp::Breakpoint:
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case IROp::MemoryCheck:
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CompIR_Generic(inst);
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FlushAll();
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// Note: the constant could be a delay slot.
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ABI_CallFunctionC((const void *)&IRRunBreakpoint, inst.constant);
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TEST(32, R(EAX), R(EAX));
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J_CC(CC_NZ, dispatcherCheckCoreState_, true);
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break;
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case IROp::MemoryCheck:
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{
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X64Reg addrBase = regs_.MapGPR(inst.src1);
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FlushAll();
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LEA(32, addrBase, MDisp(addrBase, inst.constant));
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MovFromPC(SCRATCH1);
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LEA(32, SCRATCH1, MDisp(SCRATCH1, inst.dest));
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ABI_CallFunctionRR((const void *)&IRRunMemCheck, SCRATCH1, addrBase);
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TEST(32, R(EAX), R(EAX));
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J_CC(CC_NZ, dispatcherCheckCoreState_, true);
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break;
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}
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default:
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INVALIDOP;
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break;
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