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Merge pull request #3138 from unknownbrackets/gpu-thread

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Use atomic operations on a few more platforms
This commit is contained in:
Henrik Rydgård
2013-08-12 08:56:53 -07:00
parent 64e3fd71bf c480bbb679
commit 2e6f1e0a41
7 changed files with 37 additions and 12 deletions
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2
Core/Config.cpp
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@@ -90,7 +90,7 @@ void Config::Load(const char *iniFileName)
cpu->Get("Jit", &bJit, true);
#endif
cpu->Get("SeparateCPUThread", &bSeparateCPUThread, false);
cpu->Get("SeparateIOThread", &bSeparateIOThread, true);
cpu->Get("SeparateIOThread", &bSeparateIOThread, false);
cpu->Get("FastMemory", &bFastMemory, false);
cpu->Get("CPUSpeed", &iLockedCPUSpeed, false);

2
Core/CoreTiming.cpp
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@@ -74,7 +74,7 @@ volatile u32 hasTsEvents = false;
// as we can already reach that structure through a register.
int slicelength;
s64 globalTimer;
MEMORY_ALIGNED16(s64) globalTimer;
s64 idledCycles;
static std::recursive_mutex externalEventSection;

2
Core/MIPS/MIPSAnalyst.cpp
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@@ -141,7 +141,7 @@ namespace MIPSAnalyst
int rd = MIPS_GET_RD(op);
if (
((info & IN_RS) && !(info & IN_RS_ADDR) && (rs == reg)) ||
((info & IN_RS) && (info & IN_RS_ADDR) == IN_RS && (rs == reg)) ||
((info & IN_RT) && (rt == reg)))
{
if (regAnal[reg].firstRead == -1)

3
Core/MIPS/MIPSCodeUtils.cpp
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@@ -114,6 +114,9 @@ namespace MIPSCodeUtils
sure = _RS == 0;
takeBranch = false;
break;
default:
sure = false;
}
if (sure && takeBranch)

2
GPU/GPUCommon.cpp
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@@ -558,7 +558,7 @@ void GPUCommon::ProcessEvent(GPUEvent ev) {
break;
default:
ERROR_LOG(G3D, "Unexpected GPU event type: %d", ev);
ERROR_LOG(G3D, "Unexpected GPU event type: %d", (int)ev);
}
}

36
GPU/GPUCommon.h
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@@ -1,8 +1,16 @@
#pragma once
#include "Common/Common.h"
#include "Core/ThreadEventQueue.h"
#include "GPU/GPUInterface.h"
#if defined(ANDROID)
#include <atomic>
#elif defined(_M_SSE)
#include <xmmintrin.h>
#pragma warning(disable:4799)
#endif
typedef ThreadEventQueue<GPUInterface, GPUEvent, GPUEventType, GPU_EVENT_INVALID, GPU_EVENT_SYNC_THREAD, GPU_EVENT_FINISH_EVENT_LOOP> GPUThreadEventQueue;
class GPUCommon : public GPUThreadEventQueue
@@ -37,10 +45,15 @@ public:
virtual void ReapplyGfxState();
virtual u64 GetTickEstimate() {
#ifndef _M_X64
lock_guard guard(curTickEstLock_);
#endif
#if defined(_M_X64) || defined(ANDROID)
return curTickEst_;
#elif defined(_M_SSE)
__m64 result = *(__m64 *)&curTickEst_;
return *(u64 *)&result;
#else
lock_guard guard(curTickEstLock_);
return curTickEst_;
#endif
}
protected:
@@ -94,14 +107,23 @@ protected:
bool interruptsEnabled_;
// For CPU/GPU sync.
volatile u64 curTickEst_;
#ifdef ANDROID
std::atomic<u64> curTickEst_;
#else
volatile MEMORY_ALIGNED16(u64) curTickEst_;
recursive_mutex curTickEstLock_;
#endif
virtual void UpdateTickEstimate(u64 value) {
#ifndef _M_X64
lock_guard guard(curTickEstLock_);
#endif
#if defined(_M_X64) || defined(ANDROID)
curTickEst_ = value;
#elif defined(_M_SSE)
__m64 result = *(__m64 *)&value;
*(__m64 *)&curTickEst_ = result;
#else
lock_guard guard(curTickEstLock_);
curTickEst_ = value;
#endif
}
public:

2
ext/disarm.cpp
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@@ -142,7 +142,7 @@ bool DisasmVFP(uint32_t op, char *text) {
if ((op & 0xFFF) != 0xA10)
break;
if (op == 0xEEF1FA10) {
sprintf(text, "VMRS APSR", cond);
sprintf(text, "VMRS%s APSR", cond);
} else {
sprintf(text, "VMRS%s r%i", cond, (op >> 12) & 0xF);
}