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Android project - Fixed an error when the recompiler requested the reset function during game play on iR5900(recResetRaw), iR3000A(recResetIOP).

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This commit is contained in:
k2154
2025-11-20 21:17:25 +09:00
parent a1ac39012a
commit baeab9d325
5 changed files with 55 additions and 49 deletions
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app/src/main/cpp/pcsx2/R5900.cpp
+1 -1
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@@ -439,7 +439,7 @@ __fi void _cpuEventTest_Shared()
// ---- Schedule Next Event Test --------------
#if defined(ANDROID)
const s32 nextIopEventDeta = (psxRegs.iopNextEventCycle - psxRegs.cycle);
const s32 nextIopEventDeta = (psxRegs.iopNextEventCycle - psxRegs.cycle) << 3;
#else
const float mutiplier = static_cast<float>(PS2CLK) / static_cast<float>(PSXCLK);
const s32 nextIopEventDeta = ((psxRegs.iopNextEventCycle - psxRegs.cycle) * mutiplier);
app/src/main/cpp/pcsx2/x86/iR3000A.cpp
+14 -11
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@@ -349,12 +349,12 @@ void _psxMoveGPRtoR(const a64::Register& to, int fromgpr)
}
}
void _psxMoveGPRtoM(uptr to, int fromgpr)
void _psxMoveGPRtoM(const a64::MemOperand& to, int fromgpr)
{
if (PSX_IS_CONST1(fromgpr))
{
// xMOV(ptr32[(u32*)(to)], g_psxConstRegs[fromgpr]);
armStorePtr(g_psxConstRegs[fromgpr], (u32*)(to));
armStorePtr(g_psxConstRegs[fromgpr], to);
}
else
{
@@ -362,14 +362,14 @@ void _psxMoveGPRtoM(uptr to, int fromgpr)
if (reg >= 0)
{
// xMOV(ptr32[(u32*)(to)], xRegister32(reg));
armAsm->Str(a64::WRegister(reg), armMemOperandPtr((u32*)(to)));
armAsm->Str(a64::WRegister(reg), to);
}
else
{
// xMOV(eax, ptr[&psxRegs.GPR.r[fromgpr]]);
armLoad(EAX, PTR_CPU(psxRegs.GPR.r[fromgpr]));
// xMOV(ptr32[(u32*)(to)], eax);
armAsm->Str(EAX, armMemOperandPtr((u32*)(to)));
armAsm->Str(EAX, to);
}
}
}
@@ -942,7 +942,7 @@ void recResetIOP()
DevCon.WriteLn("iR3000A Recompiler reset.");
// xSetPtr(SysMemory::GetIOPRec());
armSetAsmPtr(recPtr, recPtrEnd - recPtr, nullptr);
armSetAsmPtr(SysMemory::GetIOPRec(), _4kb, nullptr);
armStartBlock();
_DynGen_Dispatchers();
@@ -1110,7 +1110,7 @@ static __fi u32 psxRecClearMem(u32 pc)
static __fi void recClearIOP(u32 Addr, u32 Size)
{
u32 pc = Addr;
while (pc < Addr + Size * 4)
while (pc < Addr + (Size << 2)) // Size * 4
pc += PSXREC_CLEARM(pc);
}
@@ -1125,14 +1125,16 @@ void psxSetBranchReg(u32 reg)
if (!swap)
{
const int wbreg = _allocX86reg(X86TYPE_PCWRITEBACK, 0, MODE_WRITE | MODE_CALLEESAVED);
_psxMoveGPRtoR(a64::WRegister(wbreg), reg);
auto reg32 = a64::WRegister(wbreg);
_psxMoveGPRtoR(reg32, reg);
psxRecompileNextInstruction(true, false);
if (x86regs[wbreg].inuse && x86regs[wbreg].type == X86TYPE_PCWRITEBACK)
{
// xMOV(ptr32[&psxRegs.pc], xRegister32(wbreg));
armStore(PTR_CPU(psxRegs.pc), a64::WRegister(wbreg));
armStore(PTR_CPU(psxRegs.pc), reg32);
x86regs[wbreg].inuse = 0;
}
else
@@ -1153,7 +1155,7 @@ void psxSetBranchReg(u32 reg)
}
else
{
_psxMoveGPRtoM((uptr)&psxRegs.pc, reg);
_psxMoveGPRtoM(PTR_CPU(psxRegs.pc), reg);
}
}
}
@@ -1173,6 +1175,7 @@ void psxSetBranchImm(u32 imm)
// end the current block
// xMOV(ptr32[&psxRegs.pc], imm);
armStore(PTR_CPU(psxRegs.pc), imm);
_psxFlushCall(FLUSH_EVERYTHING);
iPsxBranchTest(imm, imm <= psxpc);
@@ -1469,7 +1472,7 @@ static void psxRecMemcheck(u32 op, u32 bits, bool store)
// xMOV(edx, ecx);
armAsm->Mov(EDX, ECX);
// xADD(edx, bits / 8);
armAsm->Add(EDX, EDX, bits / 8);
armAsm->Add(EDX, EDX, bits >> 3); // bits / 8
// ecx = access address
// edx = access address+size
@@ -1706,7 +1709,7 @@ static void iopRecRecompile(const u32 startpc)
}
// xSetPtr(recPtr);
armSetAsmPtr(recPtr, recPtrEnd - recPtr, nullptr);
armSetAsmPtr(recPtr, _256kb, nullptr);
// recPtr = xGetAlignedCallTarget();
recPtr = armStartBlock();
app/src/main/cpp/pcsx2/x86/iR3000A.h
+1 -1
View File
@@ -32,7 +32,7 @@ void _psxFlushAllDirty();
void _psxOnWriteReg(int reg);
void _psxMoveGPRtoR(const a64::Register& to, int fromgpr);
void _psxMoveGPRtoM(uptr to, int fromgpr);
void _psxMoveGPRtoM(const a64::MemOperand& to, int fromgpr);
extern u32 psxpc; // recompiler pc
extern int psxbranch; // set for branch
app/src/main/cpp/pcsx2/x86/iR3000Atables.cpp
+1 -1
View File
@@ -1812,7 +1812,7 @@ static void rpsxJALR()
}
else
{
_psxMoveGPRtoM((uptr)&psxRegs.pc, _Rs_);
_psxMoveGPRtoM(PTR_CPU(psxRegs.pc), _Rs_);
}
}
app/src/main/cpp/pcsx2/x86/ix86-32/iR5900.cpp
+38 -35
View File
@@ -644,7 +644,7 @@ static void recResetRaw()
EE::Profiler.Reset();
// xSetPtr(SysMemory::GetEERec());
armSetAsmPtr(recPtr, recPtrEnd - recPtr, nullptr);
armSetAsmPtr(SysMemory::GetEERec(), _4kb, nullptr);
armStartBlock();
_DynGen_Dispatchers();
@@ -901,15 +901,17 @@ void SetBranchReg(u32 reg)
if (!swap)
{
const int wbreg = _allocX86reg(X86TYPE_PCWRITEBACK, 0, MODE_WRITE | MODE_CALLEESAVED);
_eeMoveGPRtoR(a64::WRegister(wbreg), reg);
auto reg32 = a64::WRegister(wbreg);
_eeMoveGPRtoR(reg32, reg);
if (EmuConfig.Gamefixes.GoemonTlbHack)
{
// xMOV(ecx, xRegister32(wbreg));
armAsm->Mov(ECX, a64::WRegister(wbreg));
armAsm->Mov(ECX, reg32);
vtlb_DynV2P();
// xMOV(xRegister32(wbreg), eax);
armAsm->Mov(a64::WRegister(wbreg), EAX);
armAsm->Mov(reg32, EAX);
}
recompileNextInstruction(true, false);
@@ -918,7 +920,7 @@ void SetBranchReg(u32 reg)
if (x86regs[wbreg].inuse && x86regs[wbreg].type == X86TYPE_PCWRITEBACK)
{
// xMOV(ptr[&cpuRegs.pc], xRegister32(wbreg));
armStore(PTR_CPU(cpuRegs.pc), a64::WRegister(wbreg));
armStore(PTR_CPU(cpuRegs.pc), reg32);
x86regs[wbreg].inuse = 0;
}
else
@@ -974,7 +976,7 @@ u8* recBeginThunk()
eeRecNeedsReset = true;
// xSetPtr(recPtr);
armSetAsmPtr(recPtr, recPtrEnd - recPtr, nullptr);
armSetAsmPtr(recPtr, _4kb, nullptr);
// recPtr = xGetAlignedCallTarget();
recPtr = armStartBlock();
@@ -1686,7 +1688,7 @@ void recMemcheck(u32 op, u32 bits, bool store)
// xMOV(edx, eax);
armAsm->Mov(EDX, EAX);
// xADD(edx, bits / 8);
armAsm->Add(EDX, EDX, bits / 8);
armAsm->Add(EDX, EDX, bits >> 3); // bits / 8
// ecx = access address
// edx = access address+size
@@ -1828,34 +1830,35 @@ void recompileNextInstruction(bool delayslot, bool swapped_delay_slot)
g_pCurInstInfo++;
// pc might be past s_nEndBlock if the last instruction in the block is a DI.
if (pc <= s_nEndBlock && (g_pCurInstInfo + (s_nEndBlock - pc) / 4 + 1) <= s_pInstCache + s_nInstCacheSize)
{
int count;
for (u32 i = 0; i < iREGCNT_GPR; ++i)
{
if (x86regs[i].inuse)
{
count = _recIsRegReadOrWritten(g_pCurInstInfo, (s_nEndBlock - pc) / 4 + 1, x86regs[i].type, x86regs[i].reg);
if (count > 0)
x86regs[i].counter = 1000 - count;
else
x86regs[i].counter = 0;
}
}
// pc might be past s_nEndBlock if the last instruction in the block is a DI.
u32 s_nEndBlock_pc = (s_nEndBlock - pc) / 4 + 1;
if (pc <= s_nEndBlock && (g_pCurInstInfo + s_nEndBlock_pc) <= s_pInstCache + s_nInstCacheSize)
{
int i, count;
for (i = 0; i < iREGCNT_GPR; ++i)
{
if (x86regs[i].inuse)
{
count = _recIsRegReadOrWritten(g_pCurInstInfo, s_nEndBlock_pc, x86regs[i].type, x86regs[i].reg);
if (count > 0)
x86regs[i].counter = 1000 - count;
else
x86regs[i].counter = 0;
}
}
for (u32 i = 0; i < iREGCNT_XMM; ++i)
{
if (xmmregs[i].inuse)
{
count = _recIsRegReadOrWritten(g_pCurInstInfo, (s_nEndBlock - pc) / 4 + 1, xmmregs[i].type, xmmregs[i].reg);
if (count > 0)
xmmregs[i].counter = 1000 - count;
else
xmmregs[i].counter = 0;
}
}
}
for (i = 0; i < iREGCNT_XMM; ++i)
{
if (xmmregs[i].inuse)
{
count = _recIsRegReadOrWritten(g_pCurInstInfo, s_nEndBlock_pc, xmmregs[i].type, xmmregs[i].reg);
if (count > 0)
xmmregs[i].counter = 1000 - count;
else
xmmregs[i].counter = 0;
}
}
}
if (g_pCurInstInfo->info & EEINST_COP2_FLUSH_VU0_REGISTERS)
{
@@ -2365,7 +2368,7 @@ static void recRecompile(const u32 startpc)
}
// xSetPtr(recPtr);
armSetAsmPtr(recPtr, recPtrEnd - recPtr, nullptr);
armSetAsmPtr(recPtr, _256kb, nullptr);
// recPtr = xGetAlignedCallTarget();
recPtr = armStartBlock();