GpioV2DataConvert.py tool assumes the data value defined in .h file
using decimal format. This enhancement adds hex format support.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Explicit cast added to resolve a build error with VS2022 caused by
bitwise ORing different enum types.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
Make sure your VS2022 , has following directory:
C:\Program Files (x86)\Microsoft Visual Studio\2022\Professional
Signed-off-by: Yugendran Sreetharan <yugendran.sreetharan@intel.com>
BTL-S Hybrid shares its CPUID with ADL-S, but 12P parts introduce a
new CPUID. Added support to GetCpuSkuInfo() to detect this new ID.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
ARLUH FSP:0D00E610
ARLS FSP:0D00E520
Microcode:ArrowLake/m_80_b0650_0000000a.pdb
Microcode:ArrowLake/m_82_c0662_00000118.pdb
VBT update to 1062.
Update SBL version to 1.1
Signed-off-by: Randy <randy.lin@intel.com>
BIOS version is IoT RPL-PS MR1 (5276_01) FSP
FSP version is 0C01EC40
platform version is 1.1
Microcode Files are: ['m_e0_b06a2_00004129.pdb', 'm_80_906a3_00000435.pdb']
Signed-off-by: samihahkasim <samihah.kasim@intel.com>
BIOS version is Raptor Lake-S IPU2025.3 FSP
FSP version is 0C.00.F9.20
Microcode Files are: ['m_32_b0671_0000012f.pdb']
Signed-off-by: samihahkasim <samihah.kasim@intel.com>
This commit addresses the issue of hard dependency on the SblOpen folder,
allowing stitching to proceed without it.
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
When changing a boot option from a non-RAW type to RAW, the boot command
does not set the valid field of the LbaImage.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
This commit corrects the SaveAndDisableSpiPrefetchCache by applying the
correct offset (3:2) and value (b'01) to disable Prefetching and Caching.
Additionally, the following improvements were made:
1. Aligned V_SPI_BCR_SRC_PREF_DIS_CACHE_DIS with EDS.
2. Enhanced performance and reliability by switching from MmioAndThenOr32 to
MmioAndThenOr8.
3. Introduced N_SPI_BCR_SRC (the offset)
4. Removed unused constants: V_SPI_BCR_SRC_PREF_EN_CACHE_EN,
V_SPI_BCR_SRC_PREF_DIS_CACHE_EN, N_SPI_BCR_SYNC_SS, and B_SPI_BCR_SYNC_SS
Verified with TGL RVP, EHL CRB, and TWL CRB
Discussion: https://groups.io/g/slimbootloader/topic/spi_write_and_read_cycle/113260279
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
Michał Żygowski
Guo Dong
Bejean Mosher
Yugendran Sreetharan
samihahkasim
Randy
Sachin Kamat
Vincent Chen
Fernando Silva
ramesh chandra perni
Stanley Chang
Kevin Tsai