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Signed-off-by: Kevin Tsai <kevin.tsai@intel.com>
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Kevin Tsai
2024-11-15 16:29:43 -07:00
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9 changed files with 834 additions and 4 deletions

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@@ -30,7 +30,7 @@ Build Tools Download - Ubuntu
Install required packages on Ubuntu::
$ sudo apt-get install -y build-essential python uuid-dev openssl gcc-multilib qemu git
$ sudo apt install -y build-essential python3 uuid-dev openssl gcc-multilib qemu-system git iasl nasm
Build using Dockers (Optional)
@@ -133,6 +133,8 @@ LLVM 15.0.7
**Require:** Install to C:\\LLVM
.. note::
Add an environment variable: CLANG_BIN=C:\LLVM\bin\
Openssl (latest)

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@@ -0,0 +1,124 @@
.. MTL-MCL-board:
|MTL-MCL| Board
---------------------------------
The Intel McLaren Island Reference Design Board (|mtl-mcl|) is an x86 maker board based on Intel platform Meteor Lake. The boards are used in IoT, industrial automation, digital signage areas, etc.
Prerequisites
^^^^^^^^^^^^^^^^
|SPN| supports |Intel McLaren Island Reference Design Board|. To start developing |SPN|, the following equipment, software and environments are required:
* |Intel McLaren Island Reference Design Board|
* DediProg SF600 programmer
* Linux host or windows host (see :ref:`running-on-linux` or :ref:`running-on-windows` for details)
* Internet access
.. |Intel McLaren Island Reference Design Board| raw:: html
<a href="https://www.seavo.com/en/products/products-info_itemid_558.html" target="_blank">Intel McLaren Island Reference Design Board</a>
.. |instructions| raw:: html
<a href="https://wiki.up-community.org/BIOS_chip_flashing_on_UP_Squared" target="_blank">instructions</a>
Board Setup
^^^^^^^^^^^^^^^^^
.. image:: /images/mcl-setup.jpg
:width: 600
:alt: |MTL-MCL| Board Setup
:align: center
Before You Start
^^^^^^^^^^^^^^^^^
.. warning:: As you plan to reprogram the SPI flash, it's a good idea to backup the pre-installed BIOS image first.
Boot the board and enter BIOS setup menu to get familiar with the board features and settings.
Debug UART
^^^^^^^^^^^
Serial port connector is the micro-usb connector, the location is near the sata port.
.. note:: Configure host PuTTY or minicom to 115200bps, 8N1, no hardware flow control.
Building
^^^^^^^^^^
|Intel McLaren Island Reference Design Board| is based on Intel |MTL|. To build::
python BuildLoader.py build mtl
The output images are generated under ``Outputs`` directory.
Stitching
^^^^^^^^^^
Stitch |SPN| images with factory BIOS image using the stitch tool::
python Platform/MeteorlakeBoardPkg/Script/StitchLoader.py -i <BIOS_IMAGE_NAME> -s Outputs/mtl/SlimBootloader.bin -o <SBL_IFWI_IMAGE_NAME> -p 0xAA00001F
<BIOS_IMAGE> : Input file. Factory BIOS extracted from McLaren Island board.
<SBL_IFWI_IMAGE> : Output file. New IFWI image with SBL in BIOS region.
-p <value> : 4-byte platform data for platform ID (e.g. 1F) and debug UART port index (e.g. 00).
See :ref:`stitch-tool` on how to stitch the IFWI image with |SPN|.
Stitch SBL images with IFWI ingredients::
python Platform/MeteorlakeBoardPkg/Script/StitchIfwi.py -b fvme
-s Outputs/mtl/Stitch_Components.zip
-c Platform/MeteorlakeBoardPkg/Script/StitchIfwiConfig_mcl.py
-w /Stitchifwi_components_mtl -p mtlp -d 0xAA00001F
.. Note:: StitchLoader.py script works only if Boot Guard in the base image is not enabled, and the silicon is not fused with Boot Guard enabled.
If Boot Guard is enabled, please use StitchIfwi.py script instead.
Slimbootloader binary for capsule
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
The Slimbootloader.bin image generated from the build steps above can be used to create a capsule image.
Please refer to :ref:`build-tool` on generating |SPN| image.
For all |MTL| platforms, the below command can be used::
python ./BootloaderCorePkg/Tools/GenCapsuleFirmware.py -p BIOS Outputs/<plat>/SlimBootloader.bin -k <Keys> -o FwuImage.bin
For more details on generating capsule image, please refer :ref:`generate-capsule`.
Triggering Firmware Update
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Please refer to :ref:`firmware-update` on how to trigger firmware update flow.
Below is an example:
To trigger firmware update in |SPN| shell:
1. Copy ``FwuImage.bin`` into root directory on FAT partition of a USB key
2. Boot and press any key to enter |SPN| shell
3. Type command ``fwupdate`` from shell
Observe |SPN| resets the platform and performs update flow. It resets *multiple* times to complete the update process.
Flashing
^^^^^^^^^
Flash the generated SBL_IFWI_IMAGE_NAME to the target board using a DediProg SF600 programmer.
.. note:: Refer the table above to identify the connector on the target board for SPI flash programmer. When using such device, please ensure:
#. The alignment/polarity when connecting Dediprog to the board.
#. The power to the board is turned **off** while the programmer is connected (even when not in use).
#. The programmer is set to update the flash from offset 0x0.
**Good Luck!**

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@@ -0,0 +1,153 @@
.. _upx12-13th-board:
|UPX12RPLP| Board
---------------------
The |UP Xtreme i12 13th board| (|UPX12RPLP|) is an x86 maker board based on Intel platform Raptor Lake-P. The UP boards are used in IoT, industrial automation, digital signage areas, etc.
Prerequisites
^^^^^^^^^^^^^^^^
|SPN| supports |UPX12RPLP| maker board. To start developing |SPN|, the following equipment, software and environments are required:
* |UP Xtreme i12 13th board|
* Custom SPI flashing cable (|instructions|).
* |USB 2.0 pin header cable| for debug uart output. OR `Make your own <upx12-debug-uart-pinout_>`_.
* DediProg SF100 or SF600 programmer
* Linux host (see :ref:`running-on-linux` for details)
* Internet access
.. |UP Xtreme i12 13th board| raw:: html
<a href="https://www.aaeon.com/en/p/up-board-up-squared-i12" target="_blank">UP Xtreme i12 13th board</a>
.. |instructions| raw:: html
<a href="https://wiki.up-community.org/BIOS_chip_flashing_on_UP_Squared" target="_blank">instructions</a>
.. |USB 2.0 pin header cable| raw:: html
<a href="https://up-shop.org/usb-2-0-pin-header-cable.html" target="_blank">USB 2.0 pin header cable</a>
Board Setup
^^^^^^^^^^^^^^^^^
.. image:: /images/upxi12rplp_setup.jpg
:width: 600
:alt: |UPX12RPLP| Board Setup
:align: center
Before You Start
^^^^^^^^^^^^^^^^^
.. warning:: As you plan to reprogram the SPI flash, it's a good idea to backup the pre-installed BIOS image first.
Boot the board and enter BIOS setup menu to get familiar with the board features and settings.
.. _upx12-debug-uart-pinout:
Early boot serial debug console can be reached via UART1 located on CN9 header on the |UPX12RPLP| board. Make sure you can observe serial output message running the factory BIOS first.
.. note:: To make your own UART debug adapter by direct wiring, refer to CN9 Header Pinout for UART1:
+--------+--------------+
| Pin | Signal |
+--------+--------------+
| 8 | GND |
+--------+--------------+
| 9 | UART_RX |
+--------+--------------+
| 10 | UART_TX |
+--------+--------------+
Building
^^^^^^^^^^
|UPX12RPLP| board is based on Intel |RPLP|. To build::
python BuildLoader.py build rplp
The output images are generated under ``Outputs`` directory.
Stitching
^^^^^^^^^^
Stitch |SPN| images with factory BIOS image using the stitch tool::
python Platform/AlderlakeBoardPkg/Script/StitchLoader.py -i <BIOS_IMAGE_NAME> -s Outputs/rplp/SlimBootloader.bin -o <SBL_IFWI_IMAGE_NAME> -p 0xAA000114
<BIOS_IMAGE> : Input file. Factory BIOS extracted from UP Xtreme i12 13th board.
<SBL_IFWI_IMAGE> : Output file. New IFWI image with SBL in BIOS region.
-p <value> : 4-byte platform data for platform ID (e.g. 14) and debug UART port index (e.g. 01).
.. Note:: StitchLoader.py script works only if Boot Guard in the base image is not enabled, and the silicon is not fused with Boot Guard enabled.
If Boot Guard is enabled, please use StitchIfwi.py script instead.
See :ref:`stitch-tool` on how to stitch the IFWI image with |SPN|.
Slimbootloader binary for capsule
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
A capsule image could ecapsulate a Slimbootloader image to be used in firmware update mechanism. More information is described in :ref:`firmware-update`.
For the process running properly, an IFWI image programmed on board with TOP SWAP size configuration is required.
.. note:: Enabling TOP SWAP size configuration requires additional firmware components and tools.
Creating Slimbootloader binary for capsule image requires the following steps:
Build |SPN| for |UPX12RPLP|::
python BuildLoader.py build rplp
Edit the 4-byte platform data in Slimbootloader image by *Hexedit* or equivalent hexdecimal editor.
Go to top of TOP SWAP A at address 0xCFFFF4, edit ``14 01 00 AA`` as below
::
00CFFFF0 90 90 EB B9 14 01 00 AA A4 50 FF FF 00 50 FF FF ................
Go to top of TOP SWAP B at address 0xC7FFF4, edit ``14 01 00 AA`` as below
::
00C7FFF0 90 90 EB B9 14 01 00 AA A4 50 FF FF 00 50 FF FF ................
For more details on TOP SWAP regions, please refer :ref:`flash-layout`
Generate capsule update image ``FwuImage.bin``::
python BootloaderCorePkg/Tools/GenCapsuleFirmware.py -p BIOS Outputs/rplp/SlimBootloader.bin -k KEY_ID_FIRMWAREUPDATE_RSA3072 -o FwuImage.bin
For more details on generating capsule image, please refer :ref:`generate-capsule`.
Triggering Firmware Update
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Please refer to :ref:`firmware-update` on how to trigger firmware update flow.
Below is an example:
To trigger firmware update in |SPN| shell:
1. Copy ``FwuImage.bin`` into root directory on FAT partition of a USB key
2. Boot and press any key to enter |SPN| shell
3. Type command ``fwupdate`` from shell
Observe |SPN| resets the platform and performs update flow. It resets *multiple* times to complete the update process.
Flashing
^^^^^^^^^
Flash the IFWI image to |UPX12RPLP| board using a SPI programmer. Header CN19 on the board should be used, see |BIOS_CHIP_FLASHING| for additional details.
.. |BIOS_CHIP_FLASHING| raw:: html
<a href="https://wiki.up-community.org/BIOS_chip_flashing_on_UP_Squared" target="_blank">instructions</a>
**Good Luck!**

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@@ -123,7 +123,7 @@
<section id="build-tools-download-ubuntu">
<h2>Build Tools Download - Ubuntu<a class="headerlink" href="#build-tools-download-ubuntu" title="Permalink to this heading"></a></h2>
<p>Install required packages on Ubuntu:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span>$ sudo apt-get install -y build-essential python uuid-dev openssl gcc-multilib qemu git
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span>$ sudo apt install -y build-essential python3 uuid-dev openssl gcc-multilib qemu-system git iasl nasm
</pre></div>
</div>
<section id="build-using-dockers-optional">
@@ -183,6 +183,10 @@ Please ensure to install <strong>Dekstop Development with C++</strong> along wit
<p>LLVM 15.0.7</p>
<p><a href="https://github.com/llvm/llvm-project/releases/tag/llvmorg-15.0.7/" target="_blank">https://github.com/llvm/llvm-project/releases/tag/llvmorg-15.0.7/</a></p>
<p><strong>Require:</strong> Install to C:\LLVM</p>
<div class="admonition note">
<p class="admonition-title">Note</p>
<p>Add an environment variable: CLANG_BIN=C:\LLVM\bin\</p>
</div>
<p>Openssl (latest)</p>
<p>Download latest win64 version from <a href="https://wiki.openssl.org/index.php/Binaries" target="_blank">https://wiki.openssl.org/index.php/Binaries</a>)</p>
<p><strong>Require:</strong> Install to C:\Openssl</p>
@@ -217,7 +221,7 @@ For example: set OPENSSL_PATH=C:\Openssl\bin</p>
<div role="contentinfo">
<p>&#169; Copyright 2018 - 2024, Intel Corporation.
<span class="lastupdated">Last updated on Jun 07, 2024.
<span class="lastupdated">Last updated on Nov 15, 2024.
</span></p>
</div>

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@@ -59,6 +59,7 @@
<li class="toctree-l2"><a class="reference internal" href="cml-rvp.html">Comet Lake RVP Board</a></li>
<li class="toctree-l2"><a class="reference internal" href="ehl-crb.html">Elkhart Lake CRB Board</a></li>
<li class="toctree-l2"><a class="reference internal" href="icdx-crb.html">Ice Lake -D CRB Boards</a></li>
<li class="toctree-l2"><a class="reference internal" href="mtl-mcl.html">McLaren Island Board</a></li>
<li class="toctree-l2"><a class="reference internal" href="mtl-rvp.html">Meteor Lake Platforms</a></li>
<li class="toctree-l2"><a class="reference internal" href="qemu.html">QEMU Virtual Platform</a></li>
<li class="toctree-l2"><a class="reference internal" href="qsp.html">Simics® QSP Virtual Platform</a></li>
@@ -70,6 +71,7 @@
<li class="toctree-l2"><a class="reference internal" href="upxtreme.html">UP Xtreme Board</a></li>
<li class="toctree-l2"><a class="reference internal" href="upxtremei11.html">UP Xtreme i11 Board</a></li>
<li class="toctree-l2"><a class="reference internal" href="upxtremei12.html">UP Xtreme i12 Board</a></li>
<li class="toctree-l2"><a class="reference internal" href="upxtremei12rplp.html">UP Xtreme i12 13th Board</a></li>
<li class="toctree-l2"><a class="reference internal" href="whl-crb.html">Whiskey Lake CRB Board</a></li>
</ul>
</li>
@@ -116,6 +118,7 @@
<li class="toctree-l1"><a class="reference internal" href="cml-rvp.html">Comet Lake RVP Board</a></li>
<li class="toctree-l1"><a class="reference internal" href="ehl-crb.html">Elkhart Lake CRB Board</a></li>
<li class="toctree-l1"><a class="reference internal" href="icdx-crb.html">Ice Lake -D CRB Boards</a></li>
<li class="toctree-l1"><a class="reference internal" href="mtl-mcl.html">McLaren Island Board</a></li>
<li class="toctree-l1"><a class="reference internal" href="mtl-rvp.html">Meteor Lake Platforms</a></li>
<li class="toctree-l1"><a class="reference internal" href="qemu.html">QEMU Virtual Platform</a></li>
<li class="toctree-l1"><a class="reference internal" href="qsp.html">Simics® QSP Virtual Platform</a></li>
@@ -127,6 +130,7 @@
<li class="toctree-l1"><a class="reference internal" href="upxtreme.html">UP Xtreme Board</a></li>
<li class="toctree-l1"><a class="reference internal" href="upxtremei11.html">UP Xtreme i11 Board</a></li>
<li class="toctree-l1"><a class="reference internal" href="upxtremei12.html">UP Xtreme i12 Board</a></li>
<li class="toctree-l1"><a class="reference internal" href="upxtremei12rplp.html">UP Xtreme i12 13th Board</a></li>
<li class="toctree-l1"><a class="reference internal" href="whl-crb.html">Whiskey Lake CRB Board</a></li>
</ul>
</div>
@@ -144,7 +148,7 @@
<div role="contentinfo">
<p>&#169; Copyright 2018 - 2024, Intel Corporation.
<span class="lastupdated">Last updated on Jun 07, 2024.
<span class="lastupdated">Last updated on Nov 15, 2024.
</span></p>
</div>

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@@ -0,0 +1,263 @@
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<section id="mtl-mcl-board">
<h1>McLaren Island Board<a class="headerlink" href="#mtl-mcl-board" title="Link to this heading"></a></h1>
<p>The Intel McLaren Island Reference Design Board (McLaren Island) is an x86 maker board based on Intel platform Meteor Lake. The boards are used in IoT, industrial automation, digital signage areas, etc.</p>
<section id="prerequisites">
<h2>Prerequisites<a class="headerlink" href="#prerequisites" title="Link to this heading"></a></h2>
<p>SBL supports <a href="https://www.seavo.com/en/products/products-info_itemid_558.html" target="_blank">Intel McLaren Island Reference Design Board</a>. To start developing SBL, the following equipment, software and environments are required:</p>
<ul class="simple">
<li><p><a href="https://www.seavo.com/en/products/products-info_itemid_558.html" target="_blank">Intel McLaren Island Reference Design Board</a></p></li>
<li><p>DediProg SF600 programmer</p></li>
<li><p>Linux host or windows host (see <a class="reference internal" href="../getting-started/build-host-setup.html#running-on-linux"><span class="std std-ref">Building on Linux</span></a> or <a class="reference internal" href="../getting-started/build-host-setup.html#running-on-windows"><span class="std std-ref">Building on Windows</span></a> for details)</p></li>
<li><p>Internet access</p></li>
</ul>
</section>
<section id="board-setup">
<h2>Board Setup<a class="headerlink" href="#board-setup" title="Link to this heading"></a></h2>
<a class="reference internal image-reference" href="../_images/mcl-setup.jpg"><img alt="|MTL-MCL| Board Setup" class="align-center" src="../_images/mcl-setup.jpg" style="width: 600px;" />
</a>
</section>
<section id="before-you-start">
<h2>Before You Start<a class="headerlink" href="#before-you-start" title="Link to this heading"></a></h2>
<div class="admonition warning">
<p class="admonition-title">Warning</p>
<p>As you plan to reprogram the SPI flash, its a good idea to backup the pre-installed BIOS image first.</p>
</div>
<p>Boot the board and enter BIOS setup menu to get familiar with the board features and settings.</p>
</section>
<section id="debug-uart">
<h2>Debug UART<a class="headerlink" href="#debug-uart" title="Link to this heading"></a></h2>
<p>Serial port connector is the micro-usb connector, the location is near the sata port.</p>
<div class="admonition note">
<p class="admonition-title">Note</p>
<p>Configure host PuTTY or minicom to 115200bps, 8N1, no hardware flow control.</p>
</div>
</section>
<section id="building">
<h2>Building<a class="headerlink" href="#building" title="Link to this heading"></a></h2>
<p><a href="https://www.seavo.com/en/products/products-info_itemid_558.html" target="_blank">Intel McLaren Island Reference Design Board</a> is based on Intel Meteor Lake. To build:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">python</span> <span class="n">BuildLoader</span><span class="o">.</span><span class="n">py</span> <span class="n">build</span> <span class="n">mtl</span>
</pre></div>
</div>
<p>The output images are generated under <code class="docutils literal notranslate"><span class="pre">Outputs</span></code> directory.</p>
</section>
<section id="stitching">
<h2>Stitching<a class="headerlink" href="#stitching" title="Link to this heading"></a></h2>
<p>Stitch SBL images with factory BIOS image using the stitch tool:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">python</span> <span class="n">Platform</span><span class="o">/</span><span class="n">MeteorlakeBoardPkg</span><span class="o">/</span><span class="n">Script</span><span class="o">/</span><span class="n">StitchLoader</span><span class="o">.</span><span class="n">py</span> <span class="o">-</span><span class="n">i</span> <span class="o">&lt;</span><span class="n">BIOS_IMAGE_NAME</span><span class="o">&gt;</span> <span class="o">-</span><span class="n">s</span> <span class="n">Outputs</span><span class="o">/</span><span class="n">mtl</span><span class="o">/</span><span class="n">SlimBootloader</span><span class="o">.</span><span class="n">bin</span> <span class="o">-</span><span class="n">o</span> <span class="o">&lt;</span><span class="n">SBL_IFWI_IMAGE_NAME</span><span class="o">&gt;</span> <span class="o">-</span><span class="n">p</span> <span class="mh">0xAA00001F</span>
<span class="o">&lt;</span><span class="n">BIOS_IMAGE</span><span class="o">&gt;</span> <span class="p">:</span> <span class="n">Input</span> <span class="n">file</span><span class="o">.</span> <span class="n">Factory</span> <span class="n">BIOS</span> <span class="n">extracted</span> <span class="kn">from</span> <span class="nn">McLaren</span> <span class="n">Island</span> <span class="n">board</span><span class="o">.</span>
<span class="o">&lt;</span><span class="n">SBL_IFWI_IMAGE</span><span class="o">&gt;</span> <span class="p">:</span> <span class="n">Output</span> <span class="n">file</span><span class="o">.</span> <span class="n">New</span> <span class="n">IFWI</span> <span class="n">image</span> <span class="k">with</span> <span class="n">SBL</span> <span class="ow">in</span> <span class="n">BIOS</span> <span class="n">region</span><span class="o">.</span>
<span class="o">-</span><span class="n">p</span> <span class="o">&lt;</span><span class="n">value</span><span class="o">&gt;</span> <span class="p">:</span> <span class="mi">4</span><span class="o">-</span><span class="n">byte</span> <span class="n">platform</span> <span class="n">data</span> <span class="k">for</span> <span class="n">platform</span> <span class="n">ID</span> <span class="p">(</span><span class="n">e</span><span class="o">.</span><span class="n">g</span><span class="o">.</span> <span class="mi">1</span><span class="n">F</span><span class="p">)</span> <span class="ow">and</span> <span class="n">debug</span> <span class="n">UART</span> <span class="n">port</span> <span class="n">index</span> <span class="p">(</span><span class="n">e</span><span class="o">.</span><span class="n">g</span><span class="o">.</span> <span class="mi">00</span><span class="p">)</span><span class="o">.</span>
</pre></div>
</div>
<p>See <a class="reference internal" href="../tools/StitchTool.html#stitch-tool"><span class="std std-ref">Stitch Tool</span></a> on how to stitch the IFWI image with SBL.</p>
<p>Stitch SBL images with IFWI ingredients:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">python</span> <span class="n">Platform</span><span class="o">/</span><span class="n">MeteorlakeBoardPkg</span><span class="o">/</span><span class="n">Script</span><span class="o">/</span><span class="n">StitchIfwi</span><span class="o">.</span><span class="n">py</span> <span class="o">-</span><span class="n">b</span> <span class="n">fvme</span>
<span class="o">-</span><span class="n">s</span> <span class="n">Outputs</span><span class="o">/</span><span class="n">mtl</span><span class="o">/</span><span class="n">Stitch_Components</span><span class="o">.</span><span class="n">zip</span>
<span class="o">-</span><span class="n">c</span> <span class="n">Platform</span><span class="o">/</span><span class="n">MeteorlakeBoardPkg</span><span class="o">/</span><span class="n">Script</span><span class="o">/</span><span class="n">StitchIfwiConfig_mcl</span><span class="o">.</span><span class="n">py</span>
<span class="o">-</span><span class="n">w</span> <span class="o">/</span><span class="n">Stitchifwi_components_mtl</span> <span class="o">-</span><span class="n">p</span> <span class="n">mtlp</span> <span class="o">-</span><span class="n">d</span> <span class="mh">0xAA00001F</span>
</pre></div>
</div>
<div class="admonition note">
<p class="admonition-title">Note</p>
<p>StitchLoader.py script works only if Boot Guard in the base image is not enabled, and the silicon is not fused with Boot Guard enabled.
If Boot Guard is enabled, please use StitchIfwi.py script instead.</p>
</div>
</section>
<section id="slimbootloader-binary-for-capsule">
<h2>Slimbootloader binary for capsule<a class="headerlink" href="#slimbootloader-binary-for-capsule" title="Link to this heading"></a></h2>
<p>The Slimbootloader.bin image generated from the build steps above can be used to create a capsule image.
Please refer to <a class="reference internal" href="../tools/BuildTool.html#build-tool"><span class="std std-ref">Build Tool</span></a> on generating SBL image.</p>
<p>For all Meteor Lake platforms, the below command can be used:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">python</span> <span class="o">./</span><span class="n">BootloaderCorePkg</span><span class="o">/</span><span class="n">Tools</span><span class="o">/</span><span class="n">GenCapsuleFirmware</span><span class="o">.</span><span class="n">py</span> <span class="o">-</span><span class="n">p</span> <span class="n">BIOS</span> <span class="n">Outputs</span><span class="o">/&lt;</span><span class="n">plat</span><span class="o">&gt;/</span><span class="n">SlimBootloader</span><span class="o">.</span><span class="n">bin</span> <span class="o">-</span><span class="n">k</span> <span class="o">&lt;</span><span class="n">Keys</span><span class="o">&gt;</span> <span class="o">-</span><span class="n">o</span> <span class="n">FwuImage</span><span class="o">.</span><span class="n">bin</span>
</pre></div>
</div>
<p>For more details on generating capsule image, please refer <a class="reference internal" href="../security/firmware-update.html#generate-capsule"><span class="std std-ref">Generating capsule</span></a>.</p>
</section>
<section id="triggering-firmware-update">
<h2>Triggering Firmware Update<a class="headerlink" href="#triggering-firmware-update" title="Link to this heading"></a></h2>
<p>Please refer to <a class="reference internal" href="../security/firmware-update.html#firmware-update"><span class="std std-ref">Firmware Update</span></a> on how to trigger firmware update flow.
Below is an example:</p>
<p>To trigger firmware update in SBL shell:</p>
<ol class="arabic">
<li><p>Copy <code class="docutils literal notranslate"><span class="pre">FwuImage.bin</span></code> into root directory on FAT partition of a USB key</p></li>
<li><p>Boot and press any key to enter SBL shell</p></li>
<li><p>Type command <code class="docutils literal notranslate"><span class="pre">fwupdate</span></code> from shell</p>
<p>Observe SBL resets the platform and performs update flow. It resets <em>multiple</em> times to complete the update process.</p>
</li>
</ol>
</section>
<section id="flashing">
<h2>Flashing<a class="headerlink" href="#flashing" title="Link to this heading"></a></h2>
<p>Flash the generated SBL_IFWI_IMAGE_NAME to the target board using a DediProg SF600 programmer.</p>
<div class="admonition note">
<p class="admonition-title">Note</p>
<p>Refer the table above to identify the connector on the target board for SPI flash programmer. When using such device, please ensure:</p>
<ol class="arabic simple">
<li><p>The alignment/polarity when connecting Dediprog to the board.</p></li>
<li><p>The power to the board is turned <strong>off</strong> while the programmer is connected (even when not in use).</p></li>
<li><p>The programmer is set to update the flash from offset 0x0.</p></li>
</ol>
</div>
<p><strong>Good Luck!</strong></p>
</section>
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<li class="toctree-l2 current"><a class="current reference internal" href="#">UP Xtreme i12 13th Board</a><ul>
<li class="toctree-l3"><a class="reference internal" href="#prerequisites">Prerequisites</a></li>
<li class="toctree-l3"><a class="reference internal" href="#board-setup">Board Setup</a></li>
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<li class="toctree-l3"><a class="reference internal" href="#triggering-firmware-update">Triggering Firmware Update</a></li>
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<section id="upx12rplp-board">
<span id="upx12-13th-board"></span><h1>UP Xtreme i12 13th Board<a class="headerlink" href="#upx12rplp-board" title="Link to this heading"></a></h1>
<p>The <a href="https://www.aaeon.com/en/p/up-board-up-squared-i12" target="_blank">UP Xtreme i12 13th board</a> (UP Xtreme i12 13th) is an x86 maker board based on Intel platform Raptor Lake-P. The UP boards are used in IoT, industrial automation, digital signage areas, etc.</p>
<section id="prerequisites">
<h2>Prerequisites<a class="headerlink" href="#prerequisites" title="Link to this heading"></a></h2>
<p>SBL supports UP Xtreme i12 13th maker board. To start developing SBL, the following equipment, software and environments are required:</p>
<ul class="simple">
<li><p><a href="https://www.aaeon.com/en/p/up-board-up-squared-i12" target="_blank">UP Xtreme i12 13th board</a></p></li>
<li><p>Custom SPI flashing cable (<a href="https://wiki.up-community.org/BIOS_chip_flashing_on_UP_Squared" target="_blank">instructions</a>).</p></li>
<li><p><a href="https://up-shop.org/usb-2-0-pin-header-cable.html" target="_blank">USB 2.0 pin header cable</a> for debug uart output. OR <a class="reference internal" href="#upx12-debug-uart-pinout">Make your own</a>.</p></li>
<li><p>DediProg SF100 or SF600 programmer</p></li>
<li><p>Linux host (see <a class="reference internal" href="../getting-started/build-host-setup.html#running-on-linux"><span class="std std-ref">Building on Linux</span></a> for details)</p></li>
<li><p>Internet access</p></li>
</ul>
</section>
<section id="board-setup">
<h2>Board Setup<a class="headerlink" href="#board-setup" title="Link to this heading"></a></h2>
<a class="reference internal image-reference" href="../_images/upxi12rplp_setup.jpg"><img alt="|UPX12RPLP| Board Setup" class="align-center" src="../_images/upxi12rplp_setup.jpg" style="width: 600px;" />
</a>
</section>
<section id="before-you-start">
<h2>Before You Start<a class="headerlink" href="#before-you-start" title="Link to this heading"></a></h2>
<div class="admonition warning">
<p class="admonition-title">Warning</p>
<p>As you plan to reprogram the SPI flash, its a good idea to backup the pre-installed BIOS image first.</p>
</div>
<p>Boot the board and enter BIOS setup menu to get familiar with the board features and settings.</p>
<p id="upx12-debug-uart-pinout">Early boot serial debug console can be reached via UART1 located on CN9 header on the UP Xtreme i12 13th board. Make sure you can observe serial output message running the factory BIOS first.</p>
<div class="admonition note">
<p class="admonition-title">Note</p>
<p>To make your own UART debug adapter by direct wiring, refer to CN9 Header Pinout for UART1:</p>
<table class="docutils align-default">
<tbody>
<tr class="row-odd"><td><p>Pin</p></td>
<td><p>Signal</p></td>
</tr>
<tr class="row-even"><td><p>8</p></td>
<td><p>GND</p></td>
</tr>
<tr class="row-odd"><td><p>9</p></td>
<td><p>UART_RX</p></td>
</tr>
<tr class="row-even"><td><p>10</p></td>
<td><p>UART_TX</p></td>
</tr>
</tbody>
</table>
</div>
</section>
<section id="building">
<h2>Building<a class="headerlink" href="#building" title="Link to this heading"></a></h2>
<p>UP Xtreme i12 13th board is based on Intel Raptor Lake-P. To build:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">python</span> <span class="n">BuildLoader</span><span class="o">.</span><span class="n">py</span> <span class="n">build</span> <span class="n">rplp</span>
</pre></div>
</div>
<p>The output images are generated under <code class="docutils literal notranslate"><span class="pre">Outputs</span></code> directory.</p>
</section>
<section id="stitching">
<h2>Stitching<a class="headerlink" href="#stitching" title="Link to this heading"></a></h2>
<p>Stitch SBL images with factory BIOS image using the stitch tool:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">python</span> <span class="n">Platform</span><span class="o">/</span><span class="n">AlderlakeBoardPkg</span><span class="o">/</span><span class="n">Script</span><span class="o">/</span><span class="n">StitchLoader</span><span class="o">.</span><span class="n">py</span> <span class="o">-</span><span class="n">i</span> <span class="o">&lt;</span><span class="n">BIOS_IMAGE_NAME</span><span class="o">&gt;</span> <span class="o">-</span><span class="n">s</span> <span class="n">Outputs</span><span class="o">/</span><span class="n">rplp</span><span class="o">/</span><span class="n">SlimBootloader</span><span class="o">.</span><span class="n">bin</span> <span class="o">-</span><span class="n">o</span> <span class="o">&lt;</span><span class="n">SBL_IFWI_IMAGE_NAME</span><span class="o">&gt;</span> <span class="o">-</span><span class="n">p</span> <span class="mh">0xAA000114</span>
<span class="o">&lt;</span><span class="n">BIOS_IMAGE</span><span class="o">&gt;</span> <span class="p">:</span> <span class="n">Input</span> <span class="n">file</span><span class="o">.</span> <span class="n">Factory</span> <span class="n">BIOS</span> <span class="n">extracted</span> <span class="kn">from</span> <span class="nn">UP</span> <span class="n">Xtreme</span> <span class="n">i12</span> <span class="mi">13</span><span class="n">th</span> <span class="n">board</span><span class="o">.</span>
<span class="o">&lt;</span><span class="n">SBL_IFWI_IMAGE</span><span class="o">&gt;</span> <span class="p">:</span> <span class="n">Output</span> <span class="n">file</span><span class="o">.</span> <span class="n">New</span> <span class="n">IFWI</span> <span class="n">image</span> <span class="k">with</span> <span class="n">SBL</span> <span class="ow">in</span> <span class="n">BIOS</span> <span class="n">region</span><span class="o">.</span>
<span class="o">-</span><span class="n">p</span> <span class="o">&lt;</span><span class="n">value</span><span class="o">&gt;</span> <span class="p">:</span> <span class="mi">4</span><span class="o">-</span><span class="n">byte</span> <span class="n">platform</span> <span class="n">data</span> <span class="k">for</span> <span class="n">platform</span> <span class="n">ID</span> <span class="p">(</span><span class="n">e</span><span class="o">.</span><span class="n">g</span><span class="o">.</span> <span class="mi">14</span><span class="p">)</span> <span class="ow">and</span> <span class="n">debug</span> <span class="n">UART</span> <span class="n">port</span> <span class="n">index</span> <span class="p">(</span><span class="n">e</span><span class="o">.</span><span class="n">g</span><span class="o">.</span> <span class="mi">01</span><span class="p">)</span><span class="o">.</span>
</pre></div>
</div>
<div class="admonition note">
<p class="admonition-title">Note</p>
<p>StitchLoader.py script works only if Boot Guard in the base image is not enabled, and the silicon is not fused with Boot Guard enabled.
If Boot Guard is enabled, please use StitchIfwi.py script instead.</p>
</div>
<p>See <a class="reference internal" href="../tools/StitchTool.html#stitch-tool"><span class="std std-ref">Stitch Tool</span></a> on how to stitch the IFWI image with SBL.</p>
</section>
<section id="slimbootloader-binary-for-capsule">
<h2>Slimbootloader binary for capsule<a class="headerlink" href="#slimbootloader-binary-for-capsule" title="Link to this heading"></a></h2>
<p>A capsule image could ecapsulate a Slimbootloader image to be used in firmware update mechanism. More information is described in <a class="reference internal" href="../security/firmware-update.html#firmware-update"><span class="std std-ref">Firmware Update</span></a>.</p>
<p>For the process running properly, an IFWI image programmed on board with TOP SWAP size configuration is required.</p>
<div class="admonition note">
<p class="admonition-title">Note</p>
<p>Enabling TOP SWAP size configuration requires additional firmware components and tools.</p>
</div>
<p>Creating Slimbootloader binary for capsule image requires the following steps:</p>
<p>Build SBL for UP Xtreme i12 13th:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">python</span> <span class="n">BuildLoader</span><span class="o">.</span><span class="n">py</span> <span class="n">build</span> <span class="n">rplp</span>
</pre></div>
</div>
<p>Edit the 4-byte platform data in Slimbootloader image by <em>Hexedit</em> or equivalent hexdecimal editor.</p>
<p>Go to top of TOP SWAP A at address 0xCFFFF4, edit <code class="docutils literal notranslate"><span class="pre">14</span> <span class="pre">01</span> <span class="pre">00</span> <span class="pre">AA</span></code> as below</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="mi">00</span><span class="n">CFFFF0</span> <span class="mi">90</span> <span class="mi">90</span> <span class="n">EB</span> <span class="n">B9</span> <span class="mi">14</span> <span class="mi">01</span> <span class="mi">00</span> <span class="n">AA</span> <span class="n">A4</span> <span class="mi">50</span> <span class="n">FF</span> <span class="n">FF</span> <span class="mi">00</span> <span class="mi">50</span> <span class="n">FF</span> <span class="n">FF</span> <span class="o">................</span>
</pre></div>
</div>
<p>Go to top of TOP SWAP B at address 0xC7FFF4, edit <code class="docutils literal notranslate"><span class="pre">14</span> <span class="pre">01</span> <span class="pre">00</span> <span class="pre">AA</span></code> as below</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="mi">00</span><span class="n">C7FFF0</span> <span class="mi">90</span> <span class="mi">90</span> <span class="n">EB</span> <span class="n">B9</span> <span class="mi">14</span> <span class="mi">01</span> <span class="mi">00</span> <span class="n">AA</span> <span class="n">A4</span> <span class="mi">50</span> <span class="n">FF</span> <span class="n">FF</span> <span class="mi">00</span> <span class="mi">50</span> <span class="n">FF</span> <span class="n">FF</span> <span class="o">................</span>
</pre></div>
</div>
<p>For more details on TOP SWAP regions, please refer <a class="reference internal" href="../developer-guides/flashmap.html#flash-layout"><span class="std std-ref">Flash Layout</span></a></p>
<p>Generate capsule update image <code class="docutils literal notranslate"><span class="pre">FwuImage.bin</span></code>:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">python</span> <span class="n">BootloaderCorePkg</span><span class="o">/</span><span class="n">Tools</span><span class="o">/</span><span class="n">GenCapsuleFirmware</span><span class="o">.</span><span class="n">py</span> <span class="o">-</span><span class="n">p</span> <span class="n">BIOS</span> <span class="n">Outputs</span><span class="o">/</span><span class="n">rplp</span><span class="o">/</span><span class="n">SlimBootloader</span><span class="o">.</span><span class="n">bin</span> <span class="o">-</span><span class="n">k</span> <span class="n">KEY_ID_FIRMWAREUPDATE_RSA3072</span> <span class="o">-</span><span class="n">o</span> <span class="n">FwuImage</span><span class="o">.</span><span class="n">bin</span>
</pre></div>
</div>
<p>For more details on generating capsule image, please refer <a class="reference internal" href="../security/firmware-update.html#generate-capsule"><span class="std std-ref">Generating capsule</span></a>.</p>
</section>
<section id="triggering-firmware-update">
<h2>Triggering Firmware Update<a class="headerlink" href="#triggering-firmware-update" title="Link to this heading"></a></h2>
<p>Please refer to <a class="reference internal" href="../security/firmware-update.html#firmware-update"><span class="std std-ref">Firmware Update</span></a> on how to trigger firmware update flow.
Below is an example:</p>
<p>To trigger firmware update in SBL shell:</p>
<ol class="arabic">
<li><p>Copy <code class="docutils literal notranslate"><span class="pre">FwuImage.bin</span></code> into root directory on FAT partition of a USB key</p></li>
<li><p>Boot and press any key to enter SBL shell</p></li>
<li><p>Type command <code class="docutils literal notranslate"><span class="pre">fwupdate</span></code> from shell</p>
<p>Observe SBL resets the platform and performs update flow. It resets <em>multiple</em> times to complete the update process.</p>
</li>
</ol>
</section>
<section id="flashing">
<h2>Flashing<a class="headerlink" href="#flashing" title="Link to this heading"></a></h2>
<p>Flash the IFWI image to UP Xtreme i12 13th board using a SPI programmer. Header CN19 on the board should be used, see <a href="https://wiki.up-community.org/BIOS_chip_flashing_on_UP_Squared" target="_blank">instructions</a> for additional details.</p>
<p><strong>Good Luck!</strong></p>
</section>
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