Commit Graph

  • f007f812df Merge pull request #1537 from trabucayre/fix_windows_build enjoy-digital 2022-12-15 09:40:26 +01:00
  • d17041e076 build/nextpnr_wrapper,yosys_nextpnr_toolchain,yosys_wrapper: fix LF for windows (#1536) Gwenhael Goavec-Merou 2022-12-14 21:46:08 +01:00
  • cb85a8caf1 tools/litex_cli: Fix --write. Florent Kermarrec 2022-12-12 11:26:37 +01:00
  • 30d68ce152 Merge pull request #1535 from Icenowy/c906-extcsr enjoy-digital 2022-12-12 11:23:47 +01:00
  • 83aa3c031b cpu/openc906: set extended CSRs based on D1 configuration Icenowy Zheng 2022-11-09 10:46:45 +08:00
  • 78fbb64c18 cpu/cva6/core: Remove convert_periph_bus_to_wishbone since no longer required. Florent Kermarrec 2022-12-09 13:16:50 +01:00
  • 879207f4d7 interconnect/axi/axi_full/AXIDownConverter: Add convert_addr/burst/len/size helpers and fix size conversion. Florent Kermarrec 2022-12-09 13:09:52 +01:00
  • 2bab1a6b03 efinix:ifacewriter: fix JTAG generation Richard Tucker 2022-11-29 16:35:45 +11:00
  • 497eac09a0 test/test_axi/test_axi_width_converter: Rename and cleanup. Florent Kermarrec 2022-12-08 21:39:08 +01:00
  • 0f95d04052 test/test_axi/test_axi_width_converter: Switch to DUT. Florent Kermarrec 2022-12-08 18:53:57 +01:00
  • fd12b6b0b7 interconnect/axi/axi_full/AXIDownConverter: Fix len/addr conversion and add latency to r.resp/user/dest/id. Florent Kermarrec 2022-12-08 18:52:29 +01:00
  • a54d5180ba test/test_axi/test_axi_width_converter: Use address_width on Wishbone.Interface to simplify. Florent Kermarrec 2022-12-08 16:23:15 +01:00
  • fac9fb81a2 gen/fhdl/module: Add add/get_module methods to simplify user design and avoid direct use of setattr/getattr. Florent Kermarrec 2022-12-08 14:20:38 +01:00
  • 9bf276132a Merge pull request #1499 from Icenowy/liblitedram-refine enjoy-digital 2022-12-08 10:33:58 +01:00
  • 30f5c1d5bf CHANGES: Switch to markdown. Florent Kermarrec 2022-12-06 16:02:11 +01:00
  • d6bbf655ee Merge pull request #1527 from stone3311/master enjoy-digital 2022-12-06 11:54:03 +01:00
  • 8599e2704d Merge pull request #1529 from trabucayre/parser_set_defaults enjoy-digital 2022-12-06 11:53:08 +01:00
  • 7eed962661 build/parser: overrides set_defaults and applying default values just before args_parse() Gwenhael Goavec-Merou 2022-12-05 20:37:12 +01:00
  • 937428b1fc cpu/rocket: add "octo" (512 bit wide) "full" variants Gabriel Somlo 2022-12-03 18:09:44 -05:00
  • 213a16c77e software/demo: Add .got and .toc to .rodata in linker script stone3311 2022-12-04 13:19:52 +01:00
  • 85f762cd1c Merge pull request #1526 from gsomlo/gls-mem-axi-width-warn enjoy-digital 2022-12-03 21:58:54 +01:00
  • be40e796f2 integration/soc: Warn on MemBus <-> LiteDRAM AXI width conversion Gabriel Somlo 2022-12-02 10:32:35 -05:00
  • fe7e70baa9 Merge pull request #1521 from enjoy-digital/naxriscv-merge Dolu1990 2022-12-01 16:10:46 +01:00
  • 17570f85c0 cpu/NaxRiscv : fix atomic / interrupt deadlock Dolu1990 2022-12-01 11:04:45 +01:00
  • 7a0056ebf6 cores/ecc: Add initial doc with the help of our new assistant and to test its capabilities :) Florent Kermarrec 2022-12-01 10:27:05 +01:00
  • c0f31dc843 integration/soc_core: Add default value to soc_core_argdict/ident_version. Florent Kermarrec 2022-11-30 08:46:42 +01:00
  • d32149d1a6 Merge branch 'master' into naxriscv-merge Dolu1990 2022-11-25 18:27:12 +01:00
  • bf279c0092 cpu/NaxRiscv fix LSU sqcheck Dolu1990 2022-11-25 18:06:13 +01:00
  • d5b500762b cpu/NaxRiscv : Update with a smaller LSU, lower latency FPU, self-healing RAS Dolu1990 2022-11-25 16:30:53 +01:00
  • 310bc777b4 Merge pull request #1520 from mkuhn99/master Gwenhael Goavec-Merou 2022-11-23 19:30:38 +01:00
  • 2630ccbc43 impemented add_axi_gp_slave function for zynq7000 core mkuhn99 2022-11-23 17:02:42 +01:00
  • 143e08575c build/xilinx/vivado: Cleanup location of bistream/additional commands. Florent Kermarrec 2022-11-23 11:17:00 +01:00
  • f9d2eec06f integration/export: Directly generate extract/replace mask in Python (Fix compilation warning with size=32). Florent Kermarrec 2022-11-22 10:13:22 +01:00
  • c8197b1842 integration/export: Fix CSR base address definition when with_csr_base_define=False. Florent Kermarrec 2022-11-21 17:57:48 +01:00
  • 4b22a7b109 build/osfpga: Add fake OSFPGAAsyncResetSynchronizer and false_path_constraint to be able to generate more cores. Florent Kermarrec 2022-11-21 12:30:36 +01:00
  • 9a8c19d3b0 build/sim/verilator: Also exclude .init files. Florent Kermarrec 2022-11-21 11:26:21 +01:00
  • 2c9ddc20be ci: Switch GCC toolchain install to litex_setup.py (to also cover litex_setup.py GCC toolchain install in CI). Florent Kermarrec 2022-11-21 09:20:10 +01:00
  • dd91c55c36 litex_setup.py: Switch GCC toolchain install to distro install (When available). Florent Kermarrec 2022-11-21 09:15:27 +01:00
  • c4cf5d6fcd Merge pull request #1519 from shenki/use-distro-compilers enjoy-digital 2022-11-21 09:16:02 +01:00
  • 3d53f88262 Merge pull request #1518 from shenki/bump-microwatt enjoy-digital 2022-11-21 08:24:48 +01:00
  • 9bb1a261dc Merge pull request #1517 from shenki/nerov32 enjoy-digital 2022-11-21 08:24:25 +01:00
  • b30dd0b5c6 test_cpu: Add NeoRV32 to tested CPUs Joel Stanley 2022-11-21 14:32:51 +10:30
  • 76f7cf8b52 github: Use distibution compilers for riscv and or1k Joel Stanley 2022-11-21 14:47:53 +10:30
  • 8b7c569fac litex_setup: Update Microwatt to latest Joel Stanley 2022-11-21 14:38:53 +10:30
  • 6b4696e3e0 soc/add_spi_flash: Use name as prefix for defined constants. Florent Kermarrec 2022-11-18 18:31:19 +01:00
  • c957ed6ed3 README.md: Update Discord invitation link (permanent). Florent Kermarrec 2022-11-18 09:00:05 +01:00
  • cc4ae21795 Merge pull request #1515 from shenki/ci-ubuntu-22.04 enjoy-digital 2022-11-18 08:57:44 +01:00
  • db87fa1a7f LICENSE: Move moral precisions to README.md to be OSI compliant and rephrase to avoid any limitation but at least make things clear and written. Florent Kermarrec 2022-11-17 23:47:10 +01:00
  • f66852b975 interconnect/wishbone: Revert #1505 for now sine seem to introduce some regressions. Florent Kermarrec 2022-11-17 12:33:39 +01:00
  • 5e43a0a52b github: Update actions Joel Stanley 2022-11-03 16:56:19 +10:30
  • 4b238005f7 README.md: Add LiteX Discord server link. Florent Kermarrec 2022-11-16 09:29:51 +01:00
  • 917c839c30 github: Update to Ubuntu 22.04 Joel Stanley 2022-11-03 16:56:19 +10:30
  • a092927139 cores/cpu: Revert custom __init__ (Required by CPUNone designs). Florent Kermarrec 2022-11-15 13:16:50 +01:00
  • 4baeeed946 soc/cores/cpu: Add reset_address_check attribute and enable/disable methods and use it to disable CPU Reset Address check in Soc. Florent Kermarrec 2022-11-15 12:03:11 +01:00
  • 703bd16a96 Merge pull request #1505 from antmicro/fix-wishbone-arbiter enjoy-digital 2022-11-15 10:11:59 +01:00
  • 4afee8535b Merge pull request #1504 from antmicro/msieron/fix-etherbone-timeouts enjoy-digital 2022-11-15 10:10:08 +01:00
  • b90080ab74 Merge pull request #1503 from shenki/microwatt-ci enjoy-digital 2022-11-15 10:06:22 +01:00
  • 07184d37df Fix Wishbone arbiter Maciej Dudek 2022-11-10 15:59:29 +01:00
  • 9ae0da667b remote/comm_udp: Fix Etherbone timeout errors Michal Sieron 2022-11-10 15:46:24 +01:00
  • b0b57491bb test_cpu: Add Microwatt to tested CPUs Joel Stanley 2022-10-28 11:26:06 +10:30
  • f89746af9f github: Add ppc64le toolchain Joel Stanley 2022-10-28 11:25:32 +10:30
  • 25969237f5 github: Add GHDL to build environment Joel Stanley 2022-10-28 10:41:58 +10:30
  • b340b86975 test_cpu: Set number of verilator jobs Joel Stanley 2022-11-14 22:01:25 +10:30
  • 05b0c59607 interconnect: For now remove the address_width checks; more verification will have to be done before enabling it to avoid regressions. Florent Kermarrec 2022-11-14 10:34:48 +01:00
  • 9115db5023 soc/cores/video/VideoS7GTPHDMIPHY: Fix typo (probably related to some refactoring). Florent Kermarrec 2022-11-14 09:54:55 +01:00
  • ec126f0e4d test/test_cpu: Move ibex to untested_cpus since seems to be broken since 2022.11.12. Florent Kermarrec 2022-11-14 09:51:37 +01:00
  • 269525862b interconnect/axi/axi_lite_to_simple: Avoid combinatorial loop on ax.valid/ax.ready. Florent Kermarrec 2022-11-14 09:34:10 +01:00
  • 82127043c3 interconnect: Add data_width/address_width checks on InterconnectShared/Crossbar and also propagate address_width. Florent Kermarrec 2022-11-14 09:08:28 +01:00
  • a3cc741d26 interconnect: Ensure data_width is propagated on all InterconnectShared/Crossbar modules. Florent Kermarrec 2022-11-14 08:34:38 +01:00
  • 68c34c64b0 Merge pull request #1501 from bunnie/axi-full-xbar-datawidth enjoy-digital 2022-11-14 08:24:23 +01:00
  • d741346f63 AXICrossbar: absorb data width setting when building crossbar bunnie 2022-11-12 18:29:51 +08:00
  • a7475d7f96 Merge pull request #1500 from cklarhorst/cd_fix enjoy-digital 2022-11-12 11:00:36 +01:00
  • c1c4910d67 core/naxriscv: Don't use os.system to execute sbt Christian Klarhorst 2022-11-11 14:14:47 +01:00
  • c1885b333f build/altera/platform: Don't set keep attribute on clk signal when using add_period_constraints. Florent Kermarrec 2022-11-11 10:06:20 +01:00
  • 62e869296f build/generic_toolchain: Make adding keep attribute to clk signals optionals in add_period_constraint/add_false_path_constraint. Florent Kermarrec 2022-11-11 10:05:30 +01:00
  • 1a66f4a6ad soc: Only do logging.BasicConfig when not already configured by top level script. Florent Kermarrec 2022-11-11 09:31:28 +01:00
  • d738eacf3d build/parser: Add logging_group to configure logging (filename and level for now). Florent Kermarrec 2022-11-11 09:30:32 +01:00
  • 01b9ae7894 integration/soc: Convert sys_clk_freq to int in SoC to allow passing float to SoC. Florent Kermarrec 2022-11-10 10:08:41 +01:00
  • 7c7b7f7818 software/liblitedram: fix an off-by-1 error when write leveling Icenowy Zheng 2022-11-10 11:22:45 +08:00
  • 1e2ad2250d compat/soc_core: Fix register_mem/rom missing imports. Florent Kermarrec 2022-11-09 19:11:15 +01:00
  • 7157b4c5e8 Merge pull request #1496 from MateuszKarlic/json2renode-update enjoy-digital 2022-11-09 15:52:31 +01:00
  • 877dff8a09 soc/compat: Fix add_wb_slave compatibility that was no longer working correclty since finalization order changes. Florent Kermarrec 2022-11-09 15:38:58 +01:00
  • 8a74eba4d5 software/liblitedram: scale up values when finding CMD delay Icenowy Zheng 2022-11-09 17:52:38 +08:00
  • a7a520695e software/liblitedram: seek for consecutive delay range when centering Icenowy Zheng 2022-11-09 17:47:58 +08:00
  • 4a740651f0 litex_sim: Simplify configuration by creating a temporary config_soc that is then used for the configuration. Florent Kermarrec 2022-11-09 09:24:30 +01:00
  • 89afed5970 litex_sim: Switch to new LiteXArgumentParser and let it handle verilator build args. Florent Kermarrec 2022-11-09 08:45:48 +01:00
  • c39d35de83 build/sim/platform: Add fill_args/get_argdict methods. Florent Kermarrec 2022-11-09 08:45:12 +01:00
  • a2aa891baa build/paltform: Minor cleanup on supported_toolchains/toolchain_group. Florent Kermarrec 2022-11-09 08:44:49 +01:00
  • a2b5bb0db2 litex_sim: Switch from self.submodules to self. Florent Kermarrec 2022-11-09 08:21:53 +01:00
  • d5df6e23f4 Merge pull request #1490 from Icenowy/litex-sim-membase-hack enjoy-digital 2022-11-09 08:18:50 +01:00
  • cd90e2623a json2renode: cpu: Overhaul generate_cpu Mateusz Karlic 2022-10-21 15:51:20 +02:00
  • eccb26874e json2renode: cpu: Extract minor common logic Mateusz Karlic 2022-10-21 14:36:59 +02:00
  • 97772eb4bd json2renode: IRQ: Fallback to cpu0 if plic is unavailable Mateusz Karlic 2022-10-21 14:14:23 +02:00
  • 4c959740dd json2renode: Use cpu_count as local variable Mateusz Karlic 2022-10-21 09:50:51 +02:00
  • b4bddc68e7 json2renode: Add LiteX MMCM Mateusz Karlic 2022-10-17 08:43:52 +02:00
  • 65964692dd json2renode: Add auto-align hint Mateusz Karlic 2022-10-17 08:16:32 +02:00
  • 8b9ca8e9e9 json2renode: Silence false warnings about unsupported peripherals Mateusz Karlic 2022-10-14 15:34:01 +02:00
  • 283a237876 json2renode: Fix registration of GPIO peripherals Mateusz Karlic 2022-10-11 15:57:51 +02:00
  • a9caeda30e json2renode: Fix typo Mateusz Karlic 2022-10-07 12:12:27 +02:00
  • 55dcee16c3 json2renode: Use spiflash->base instead of flash_boot_address Mateusz Karlic 2022-09-22 14:41:05 +02:00