mirror of
https://github.com/Dasharo/linux.git
synced 2026-03-06 15:25:10 -08:00
Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
Pull SCSI updates from James Bottomley: "Updates to the usual drivers (ufs, smartpqi, NCR5380, mac_scsi, lpfc, mpi3mr). There are no user visible core changes and a whole series of minor updates and fixes. The largest core change is probably the simplification of the workqueue allocation path" * tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (86 commits) scsi: smartpqi: update driver version to 2.1.30-031 scsi: smartpqi: fix volume size updates scsi: smartpqi: fix rare system hang during LUN reset scsi: smartpqi: add new controller PCI IDs scsi: smartpqi: add counter for parity write stream requests scsi: smartpqi: correct stream detection scsi: smartpqi: Add fw log to kdump scsi: bnx2fc: Remove some unused fields in struct bnx2fc_rport scsi: qla2xxx: Remove the unused 'del_list_entry' field in struct fc_port scsi: ufs: core: Remove ufshcd_urgent_bkops() scsi: core: Remove obsoleted declaration for scsi_driverbyte_string() scsi: bnx2i: Remove unused declarations scsi: core: Simplify an alloc_workqueue() invocation scsi: ufs: Simplify alloc*_workqueue() invocation scsi: stex: Simplify an alloc_ordered_workqueue() invocation scsi: scsi_transport_fc: Simplify alloc_workqueue() invocations scsi: snic: Simplify alloc_workqueue() invocations scsi: qedi: Simplify an alloc_workqueue() invocation scsi: qedf: Simplify alloc_workqueue() invocations scsi: myrs: Simplify an alloc_ordered_workqueue() invocation ...
This commit is contained in:
@@ -1532,3 +1532,30 @@ Contact: Bean Huo <beanhuo@micron.com>
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Description:
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rtc_update_ms indicates how often the host should synchronize or update the
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UFS RTC. If set to 0, this will disable UFS RTC periodic update.
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What: /sys/devices/platform/.../ufshci_capabilities/version
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Date: August 2024
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Contact: Avri Altman <avri.altman@wdc.com>
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Description:
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Host Capabilities register group: UFS version register.
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Symbol - VER. This file shows the UFSHCD version.
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Example: Version 3.12 would be represented as 0000_0312h.
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The file is read only.
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What: /sys/devices/platform/.../ufshci_capabilities/product_id
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Date: August 2024
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Contact: Avri Altman <avri.altman@wdc.com>
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Description:
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Host Capabilities register group: product ID register.
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Symbol - HCPID. This file shows the UFSHCD product id.
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The content of this register is vendor specific.
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The file is read only.
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What: /sys/devices/platform/.../ufshci_capabilities/man_id
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Date: August 2024
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Contact: Avri Altman <avri.altman@wdc.com>
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Description:
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Host Capabilities register group: manufacturer ID register.
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Symbol - HCMID. This file shows the UFSHCD manufacturer id.
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The Manufacturer ID is defined by JEDEC in JEDEC-JEP106.
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The file is read only.
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@@ -799,6 +799,7 @@ void submit_bio_noacct(struct bio *bio)
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switch (bio_op(bio)) {
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case REQ_OP_READ:
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break;
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case REQ_OP_WRITE:
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if (bio->bi_opf & REQ_ATOMIC) {
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status = blk_validate_atomic_write_op_size(q, bio);
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@@ -1018,14 +1018,6 @@ typedef struct _CONFIG_PAGE_IOC_2_RAID_VOL
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#define MPI_IOCPAGE2_FLAG_VOLUME_INACTIVE (0x08)
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/*
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* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
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* one and check Header.PageLength at runtime.
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*/
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#ifndef MPI_IOC_PAGE_2_RAID_VOLUME_MAX
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#define MPI_IOC_PAGE_2_RAID_VOLUME_MAX (1)
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#endif
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typedef struct _CONFIG_PAGE_IOC_2
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{
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CONFIG_PAGE_HEADER Header; /* 00h */
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@@ -1034,7 +1026,7 @@ typedef struct _CONFIG_PAGE_IOC_2
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U8 MaxVolumes; /* 09h */
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U8 NumActivePhysDisks; /* 0Ah */
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U8 MaxPhysDisks; /* 0Bh */
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CONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[MPI_IOC_PAGE_2_RAID_VOLUME_MAX];/* 0Ch */
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CONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[] __counted_by(NumActiveVolumes); /* 0Ch */
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} CONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2,
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IOCPage2_t, MPI_POINTER pIOCPage2_t;
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@@ -1064,21 +1056,13 @@ typedef struct _IOC_3_PHYS_DISK
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} IOC_3_PHYS_DISK, MPI_POINTER PTR_IOC_3_PHYS_DISK,
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Ioc3PhysDisk_t, MPI_POINTER pIoc3PhysDisk_t;
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/*
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* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
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* one and check Header.PageLength at runtime.
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*/
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#ifndef MPI_IOC_PAGE_3_PHYSDISK_MAX
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#define MPI_IOC_PAGE_3_PHYSDISK_MAX (1)
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#endif
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typedef struct _CONFIG_PAGE_IOC_3
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{
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CONFIG_PAGE_HEADER Header; /* 00h */
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U8 NumPhysDisks; /* 04h */
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U8 Reserved1; /* 05h */
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U16 Reserved2; /* 06h */
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IOC_3_PHYS_DISK PhysDisk[MPI_IOC_PAGE_3_PHYSDISK_MAX]; /* 08h */
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IOC_3_PHYS_DISK PhysDisk[] __counted_by(NumPhysDisks); /* 08h */
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} CONFIG_PAGE_IOC_3, MPI_POINTER PTR_CONFIG_PAGE_IOC_3,
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IOCPage3_t, MPI_POINTER pIOCPage3_t;
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@@ -1093,21 +1077,13 @@ typedef struct _IOC_4_SEP
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} IOC_4_SEP, MPI_POINTER PTR_IOC_4_SEP,
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Ioc4Sep_t, MPI_POINTER pIoc4Sep_t;
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/*
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* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
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* one and check Header.PageLength at runtime.
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*/
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#ifndef MPI_IOC_PAGE_4_SEP_MAX
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#define MPI_IOC_PAGE_4_SEP_MAX (1)
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#endif
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typedef struct _CONFIG_PAGE_IOC_4
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{
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CONFIG_PAGE_HEADER Header; /* 00h */
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U8 ActiveSEP; /* 04h */
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U8 MaxSEP; /* 05h */
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U16 Reserved1; /* 06h */
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IOC_4_SEP SEP[MPI_IOC_PAGE_4_SEP_MAX]; /* 08h */
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IOC_4_SEP SEP[] __counted_by(ActiveSEP); /* 08h */
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} CONFIG_PAGE_IOC_4, MPI_POINTER PTR_CONFIG_PAGE_IOC_4,
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IOCPage4_t, MPI_POINTER pIOCPage4_t;
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@@ -2295,14 +2271,6 @@ typedef struct _RAID_VOL0_SETTINGS
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#define MPI_RAID_HOT_SPARE_POOL_6 (0x40)
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#define MPI_RAID_HOT_SPARE_POOL_7 (0x80)
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||||
|
||||
/*
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||||
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
|
||||
* one and check Header.PageLength at runtime.
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||||
*/
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#ifndef MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX
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#define MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX (1)
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#endif
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typedef struct _CONFIG_PAGE_RAID_VOL_0
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{
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CONFIG_PAGE_HEADER Header; /* 00h */
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@@ -2321,7 +2289,7 @@ typedef struct _CONFIG_PAGE_RAID_VOL_0
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U8 DataScrubRate; /* 25h */
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U8 ResyncRate; /* 26h */
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U8 InactiveStatus; /* 27h */
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RAID_VOL0_PHYS_DISK PhysDisk[MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX];/* 28h */
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RAID_VOL0_PHYS_DISK PhysDisk[] __counted_by(NumPhysDisks); /* 28h */
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} CONFIG_PAGE_RAID_VOL_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_0,
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RaidVolumePage0_t, MPI_POINTER pRaidVolumePage0_t;
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@@ -2455,14 +2423,6 @@ typedef struct _RAID_PHYS_DISK1_PATH
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#define MPI_RAID_PHYSDISK1_FLAG_INVALID (0x0001)
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/*
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* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
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* one and check Header.PageLength or NumPhysDiskPaths at runtime.
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||||
*/
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#ifndef MPI_RAID_PHYS_DISK1_PATH_MAX
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#define MPI_RAID_PHYS_DISK1_PATH_MAX (1)
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#endif
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typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_1
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{
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CONFIG_PAGE_HEADER Header; /* 00h */
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@@ -2470,7 +2430,7 @@ typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_1
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U8 PhysDiskNum; /* 05h */
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U16 Reserved2; /* 06h */
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U32 Reserved1; /* 08h */
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RAID_PHYS_DISK1_PATH Path[MPI_RAID_PHYS_DISK1_PATH_MAX];/* 0Ch */
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RAID_PHYS_DISK1_PATH Path[] __counted_by(NumPhysDiskPaths);/* 0Ch */
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} CONFIG_PAGE_RAID_PHYS_DISK_1, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_1,
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RaidPhysDiskPage1_t, MPI_POINTER pRaidPhysDiskPage1_t;
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@@ -2555,14 +2515,6 @@ typedef struct _MPI_SAS_IO_UNIT0_PHY_DATA
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} MPI_SAS_IO_UNIT0_PHY_DATA, MPI_POINTER PTR_MPI_SAS_IO_UNIT0_PHY_DATA,
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SasIOUnit0PhyData, MPI_POINTER pSasIOUnit0PhyData;
|
||||
|
||||
/*
|
||||
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
|
||||
* one and check Header.PageLength at runtime.
|
||||
*/
|
||||
#ifndef MPI_SAS_IOUNIT0_PHY_MAX
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#define MPI_SAS_IOUNIT0_PHY_MAX (1)
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#endif
|
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typedef struct _CONFIG_PAGE_SAS_IO_UNIT_0
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{
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||||
CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
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||||
@@ -2571,7 +2523,7 @@ typedef struct _CONFIG_PAGE_SAS_IO_UNIT_0
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U8 NumPhys; /* 0Ch */
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U8 Reserved2; /* 0Dh */
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U16 Reserved3; /* 0Eh */
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MPI_SAS_IO_UNIT0_PHY_DATA PhyData[MPI_SAS_IOUNIT0_PHY_MAX]; /* 10h */
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MPI_SAS_IO_UNIT0_PHY_DATA PhyData[] __counted_by(NumPhys); /* 10h */
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} CONFIG_PAGE_SAS_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_0,
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SasIOUnitPage0_t, MPI_POINTER pSasIOUnitPage0_t;
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@@ -1856,10 +1856,8 @@ mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)
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/* Initialize workqueue */
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INIT_DELAYED_WORK(&ioc->fault_reset_work, mpt_fault_reset_work);
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snprintf(ioc->reset_work_q_name, MPT_KOBJ_NAME_LEN,
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"mpt_poll_%d", ioc->id);
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ioc->reset_work_q = alloc_workqueue(ioc->reset_work_q_name,
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WQ_MEM_RECLAIM, 0);
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ioc->reset_work_q =
|
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alloc_workqueue("mpt_poll_%d", WQ_MEM_RECLAIM, 0, ioc->id);
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if (!ioc->reset_work_q) {
|
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printk(MYIOC_s_ERR_FMT "Insufficient memory to add adapter!\n",
|
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ioc->name);
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@@ -1986,9 +1984,7 @@ mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)
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INIT_LIST_HEAD(&ioc->fw_event_list);
|
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spin_lock_init(&ioc->fw_event_lock);
|
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snprintf(ioc->fw_event_q_name, MPT_KOBJ_NAME_LEN, "mpt/%d", ioc->id);
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ioc->fw_event_q = alloc_workqueue(ioc->fw_event_q_name,
|
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WQ_MEM_RECLAIM, 0);
|
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ioc->fw_event_q = alloc_workqueue("mpt/%d", WQ_MEM_RECLAIM, 0, ioc->id);
|
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if (!ioc->fw_event_q) {
|
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printk(MYIOC_s_ERR_FMT "Insufficient memory to add adapter!\n",
|
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ioc->name);
|
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|
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@@ -729,7 +729,6 @@ typedef struct _MPT_ADAPTER
|
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struct list_head fw_event_list;
|
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spinlock_t fw_event_lock;
|
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u8 fw_events_off; /* if '1', then ignore events */
|
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char fw_event_q_name[MPT_KOBJ_NAME_LEN];
|
||||
|
||||
struct mutex sas_discovery_mutex;
|
||||
u8 sas_discovery_runtime;
|
||||
@@ -764,7 +763,6 @@ typedef struct _MPT_ADAPTER
|
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u8 fc_link_speed[2];
|
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spinlock_t fc_rescan_work_lock;
|
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struct work_struct fc_rescan_work;
|
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char fc_rescan_work_q_name[MPT_KOBJ_NAME_LEN];
|
||||
struct workqueue_struct *fc_rescan_work_q;
|
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|
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/* driver forced bus resets count */
|
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@@ -778,7 +776,6 @@ typedef struct _MPT_ADAPTER
|
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spinlock_t scsi_lookup_lock;
|
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u64 dma_mask;
|
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u32 broadcast_aen_busy;
|
||||
char reset_work_q_name[MPT_KOBJ_NAME_LEN];
|
||||
struct workqueue_struct *reset_work_q;
|
||||
struct delayed_work fault_reset_work;
|
||||
|
||||
|
||||
@@ -1349,11 +1349,8 @@ mptfc_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
|
||||
/* initialize workqueue */
|
||||
|
||||
snprintf(ioc->fc_rescan_work_q_name, sizeof(ioc->fc_rescan_work_q_name),
|
||||
"mptfc_wq_%d", sh->host_no);
|
||||
ioc->fc_rescan_work_q =
|
||||
alloc_ordered_workqueue(ioc->fc_rescan_work_q_name,
|
||||
WQ_MEM_RECLAIM);
|
||||
ioc->fc_rescan_work_q = alloc_ordered_workqueue(
|
||||
"mptfc_wq_%d", WQ_MEM_RECLAIM, sh->host_no);
|
||||
if (!ioc->fc_rescan_work_q) {
|
||||
error = -ENOMEM;
|
||||
goto out_mptfc_host;
|
||||
|
||||
@@ -157,7 +157,6 @@ static inline void initialize_SCp(struct scsi_cmnd *cmd)
|
||||
}
|
||||
|
||||
ncmd->status = 0;
|
||||
ncmd->message = 0;
|
||||
}
|
||||
|
||||
static inline void advance_sg_buffer(struct NCR5380_cmd *ncmd)
|
||||
@@ -199,7 +198,6 @@ static inline void set_resid_from_SCp(struct scsi_cmnd *cmd)
|
||||
* Polls the chip in a reasonably efficient manner waiting for an
|
||||
* event to occur. After a short quick poll we begin to yield the CPU
|
||||
* (if possible). In irq contexts the time-out is arbitrarily limited.
|
||||
* Callers may hold locks as long as they are held in irq mode.
|
||||
*
|
||||
* Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
|
||||
*/
|
||||
@@ -1228,24 +1226,15 @@ out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
|
||||
* unsigned char *phase, int *count, unsigned char **data)
|
||||
/**
|
||||
* NCR5380_transfer_pio() - transfers data in given phase using polled I/O
|
||||
* @instance: instance of driver
|
||||
* @phase: pointer to what phase is expected
|
||||
* @count: pointer to number of bytes to transfer
|
||||
* @data: pointer to data pointer
|
||||
* @can_sleep: 1 or 0 when sleeping is permitted or not, respectively
|
||||
*
|
||||
* Purpose : transfers data in given phase using polled I/O
|
||||
*
|
||||
* Inputs : instance - instance of driver, *phase - pointer to
|
||||
* what phase is expected, *count - pointer to number of
|
||||
* bytes to transfer, **data - pointer to data pointer,
|
||||
* can_sleep - 1 or 0 when sleeping is permitted or not, respectively.
|
||||
*
|
||||
* Returns : -1 when different phase is entered without transferring
|
||||
* maximum number of bytes, 0 if all bytes are transferred or exit
|
||||
* is in same phase.
|
||||
*
|
||||
* Also, *phase, *count, *data are modified in place.
|
||||
*
|
||||
* XXX Note : handling for bus free may be useful.
|
||||
* Returns: void. *phase, *count, *data are modified in place.
|
||||
*/
|
||||
|
||||
/*
|
||||
@@ -1254,9 +1243,9 @@ out:
|
||||
* counts, we will always do a pseudo DMA or DMA transfer.
|
||||
*/
|
||||
|
||||
static int NCR5380_transfer_pio(struct Scsi_Host *instance,
|
||||
unsigned char *phase, int *count,
|
||||
unsigned char **data, unsigned int can_sleep)
|
||||
static void NCR5380_transfer_pio(struct Scsi_Host *instance,
|
||||
unsigned char *phase, int *count,
|
||||
unsigned char **data, unsigned int can_sleep)
|
||||
{
|
||||
struct NCR5380_hostdata *hostdata = shost_priv(instance);
|
||||
unsigned char p = *phase, tmp;
|
||||
@@ -1277,8 +1266,8 @@ static int NCR5380_transfer_pio(struct Scsi_Host *instance,
|
||||
* valid
|
||||
*/
|
||||
|
||||
if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ,
|
||||
HZ * can_sleep) < 0)
|
||||
if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ | SR_BSY,
|
||||
SR_REQ | SR_BSY, HZ * can_sleep) < 0)
|
||||
break;
|
||||
|
||||
dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
|
||||
@@ -1329,17 +1318,19 @@ static int NCR5380_transfer_pio(struct Scsi_Host *instance,
|
||||
|
||||
dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
|
||||
|
||||
/*
|
||||
* We have several special cases to consider during REQ/ACK handshaking :
|
||||
* 1. We were in MSGOUT phase, and we are on the last byte of the
|
||||
* message. ATN must be dropped as ACK is dropped.
|
||||
*
|
||||
* 2. We are in a MSGIN phase, and we are on the last byte of the
|
||||
* message. We must exit with ACK asserted, so that the calling
|
||||
* code may raise ATN before dropping ACK to reject the message.
|
||||
*
|
||||
* 3. ACK and ATN are clear and the target may proceed as normal.
|
||||
*/
|
||||
/*
|
||||
* We have several special cases to consider during REQ/ACK
|
||||
* handshaking:
|
||||
*
|
||||
* 1. We were in MSGOUT phase, and we are on the last byte of
|
||||
* the message. ATN must be dropped as ACK is dropped.
|
||||
*
|
||||
* 2. We are in MSGIN phase, and we are on the last byte of the
|
||||
* message. We must exit with ACK asserted, so that the calling
|
||||
* code may raise ATN before dropping ACK to reject the message.
|
||||
*
|
||||
* 3. ACK and ATN are clear & the target may proceed as normal.
|
||||
*/
|
||||
if (!(p == PHASE_MSGIN && c == 1)) {
|
||||
if (p == PHASE_MSGOUT && c > 1)
|
||||
NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
|
||||
@@ -1361,11 +1352,6 @@ static int NCR5380_transfer_pio(struct Scsi_Host *instance,
|
||||
*phase = tmp & PHASE_MASK;
|
||||
else
|
||||
*phase = PHASE_UNKNOWN;
|
||||
|
||||
if (!c || (*phase == p))
|
||||
return 0;
|
||||
else
|
||||
return -1;
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -1485,6 +1471,7 @@ static int NCR5380_transfer_dma(struct Scsi_Host *instance,
|
||||
unsigned char **data)
|
||||
{
|
||||
struct NCR5380_hostdata *hostdata = shost_priv(instance);
|
||||
struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(hostdata->connected);
|
||||
int c = *count;
|
||||
unsigned char p = *phase;
|
||||
unsigned char *d = *data;
|
||||
@@ -1496,7 +1483,7 @@ static int NCR5380_transfer_dma(struct Scsi_Host *instance,
|
||||
return -1;
|
||||
}
|
||||
|
||||
NCR5380_to_ncmd(hostdata->connected)->phase = p;
|
||||
ncmd->phase = p;
|
||||
|
||||
if (p & SR_IO) {
|
||||
if (hostdata->read_overruns)
|
||||
@@ -1574,79 +1561,80 @@ static int NCR5380_transfer_dma(struct Scsi_Host *instance,
|
||||
/* The result is zero iff pseudo DMA send/receive was completed. */
|
||||
hostdata->dma_len = c;
|
||||
|
||||
/*
|
||||
* A note regarding the DMA errata workarounds for early NMOS silicon.
|
||||
*
|
||||
* For DMA sends, we want to wait until the last byte has been
|
||||
* transferred out over the bus before we turn off DMA mode. Alas, there
|
||||
* seems to be no terribly good way of doing this on a 5380 under all
|
||||
* conditions. For non-scatter-gather operations, we can wait until REQ
|
||||
* and ACK both go false, or until a phase mismatch occurs. Gather-sends
|
||||
* are nastier, since the device will be expecting more data than we
|
||||
* are prepared to send it, and REQ will remain asserted. On a 53C8[01] we
|
||||
* could test Last Byte Sent to assure transfer (I imagine this is precisely
|
||||
* why this signal was added to the newer chips) but on the older 538[01]
|
||||
* this signal does not exist. The workaround for this lack is a watchdog;
|
||||
* we bail out of the wait-loop after a modest amount of wait-time if
|
||||
* the usual exit conditions are not met. Not a terribly clean or
|
||||
* correct solution :-%
|
||||
*
|
||||
* DMA receive is equally tricky due to a nasty characteristic of the NCR5380.
|
||||
* If the chip is in DMA receive mode, it will respond to a target's
|
||||
* REQ by latching the SCSI data into the INPUT DATA register and asserting
|
||||
* ACK, even if it has _already_ been notified by the DMA controller that
|
||||
* the current DMA transfer has completed! If the NCR5380 is then taken
|
||||
* out of DMA mode, this already-acknowledged byte is lost. This is
|
||||
* not a problem for "one DMA transfer per READ command", because
|
||||
* the situation will never arise... either all of the data is DMA'ed
|
||||
* properly, or the target switches to MESSAGE IN phase to signal a
|
||||
* disconnection (either operation bringing the DMA to a clean halt).
|
||||
* However, in order to handle scatter-receive, we must work around the
|
||||
* problem. The chosen fix is to DMA fewer bytes, then check for the
|
||||
* condition before taking the NCR5380 out of DMA mode. One or two extra
|
||||
* bytes are transferred via PIO as necessary to fill out the original
|
||||
* request.
|
||||
*/
|
||||
/*
|
||||
* A note regarding the DMA errata workarounds for early NMOS silicon.
|
||||
*
|
||||
* For DMA sends, we want to wait until the last byte has been
|
||||
* transferred out over the bus before we turn off DMA mode. Alas, there
|
||||
* seems to be no terribly good way of doing this on a 5380 under all
|
||||
* conditions. For non-scatter-gather operations, we can wait until REQ
|
||||
* and ACK both go false, or until a phase mismatch occurs. Gather-sends
|
||||
* are nastier, since the device will be expecting more data than we
|
||||
* are prepared to send it, and REQ will remain asserted. On a 53C8[01]
|
||||
* we could test Last Byte Sent to assure transfer (I imagine this is
|
||||
* precisely why this signal was added to the newer chips) but on the
|
||||
* older 538[01] this signal does not exist. The workaround for this
|
||||
* lack is a watchdog; we bail out of the wait-loop after a modest
|
||||
* amount of wait-time if the usual exit conditions are not met.
|
||||
* Not a terribly clean or correct solution :-%
|
||||
*
|
||||
* DMA receive is equally tricky due to a nasty characteristic of the
|
||||
* NCR5380. If the chip is in DMA receive mode, it will respond to a
|
||||
* target's REQ by latching the SCSI data into the INPUT DATA register
|
||||
* and asserting ACK, even if it has _already_ been notified by the
|
||||
* DMA controller that the current DMA transfer has completed! If the
|
||||
* NCR5380 is then taken out of DMA mode, this already-acknowledged
|
||||
* byte is lost.
|
||||
*
|
||||
* This is not a problem for "one DMA transfer per READ
|
||||
* command", because the situation will never arise... either all of
|
||||
* the data is DMA'ed properly, or the target switches to MESSAGE IN
|
||||
* phase to signal a disconnection (either operation bringing the DMA
|
||||
* to a clean halt). However, in order to handle scatter-receive, we
|
||||
* must work around the problem. The chosen fix is to DMA fewer bytes,
|
||||
* then check for the condition before taking the NCR5380 out of DMA
|
||||
* mode. One or two extra bytes are transferred via PIO as necessary
|
||||
* to fill out the original request.
|
||||
*/
|
||||
|
||||
if (hostdata->flags & FLAG_DMA_FIXUP) {
|
||||
if (p & SR_IO) {
|
||||
/*
|
||||
* The workaround was to transfer fewer bytes than we
|
||||
* intended to with the pseudo-DMA read function, wait for
|
||||
* the chip to latch the last byte, read it, and then disable
|
||||
* pseudo-DMA mode.
|
||||
*
|
||||
* After REQ is asserted, the NCR5380 asserts DRQ and ACK.
|
||||
* REQ is deasserted when ACK is asserted, and not reasserted
|
||||
* until ACK goes false. Since the NCR5380 won't lower ACK
|
||||
* until DACK is asserted, which won't happen unless we twiddle
|
||||
* the DMA port or we take the NCR5380 out of DMA mode, we
|
||||
* can guarantee that we won't handshake another extra
|
||||
* byte.
|
||||
*/
|
||||
|
||||
if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG,
|
||||
BASR_DRQ, BASR_DRQ, 0) < 0) {
|
||||
result = -1;
|
||||
shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
|
||||
}
|
||||
if (NCR5380_poll_politely(hostdata, STATUS_REG,
|
||||
SR_REQ, 0, 0) < 0) {
|
||||
result = -1;
|
||||
shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
|
||||
}
|
||||
d[*count - 1] = NCR5380_read(INPUT_DATA_REG);
|
||||
} else {
|
||||
/*
|
||||
* Wait for the last byte to be sent. If REQ is being asserted for
|
||||
* the byte we're interested, we'll ACK it and it will go false.
|
||||
*/
|
||||
if (NCR5380_poll_politely2(hostdata,
|
||||
BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
|
||||
BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, 0) < 0) {
|
||||
result = -1;
|
||||
shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
|
||||
if ((hostdata->flags & FLAG_DMA_FIXUP) &&
|
||||
(NCR5380_read(BUS_AND_STATUS_REG) & BASR_PHASE_MATCH)) {
|
||||
/*
|
||||
* The workaround was to transfer fewer bytes than we
|
||||
* intended to with the pseudo-DMA receive function, wait for
|
||||
* the chip to latch the last byte, read it, and then disable
|
||||
* DMA mode.
|
||||
*
|
||||
* After REQ is asserted, the NCR5380 asserts DRQ and ACK.
|
||||
* REQ is deasserted when ACK is asserted, and not reasserted
|
||||
* until ACK goes false. Since the NCR5380 won't lower ACK
|
||||
* until DACK is asserted, which won't happen unless we twiddle
|
||||
* the DMA port or we take the NCR5380 out of DMA mode, we
|
||||
* can guarantee that we won't handshake another extra
|
||||
* byte.
|
||||
*
|
||||
* If sending, wait for the last byte to be sent. If REQ is
|
||||
* being asserted for the byte we're interested, we'll ACK it
|
||||
* and it will go false.
|
||||
*/
|
||||
if (!NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG,
|
||||
BASR_DRQ, BASR_DRQ, 0)) {
|
||||
if ((p & SR_IO) &&
|
||||
(NCR5380_read(BUS_AND_STATUS_REG) & BASR_PHASE_MATCH)) {
|
||||
if (!NCR5380_poll_politely(hostdata, STATUS_REG,
|
||||
SR_REQ, 0, 0)) {
|
||||
d[c] = NCR5380_read(INPUT_DATA_REG);
|
||||
--ncmd->this_residual;
|
||||
} else {
|
||||
result = -1;
|
||||
scmd_printk(KERN_ERR, hostdata->connected,
|
||||
"PDMA fixup: !REQ timeout\n");
|
||||
}
|
||||
}
|
||||
} else if (NCR5380_read(BUS_AND_STATUS_REG) & BASR_PHASE_MATCH) {
|
||||
result = -1;
|
||||
scmd_printk(KERN_ERR, hostdata->connected,
|
||||
"PDMA fixup: DRQ timeout\n");
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1666,9 +1654,6 @@ static int NCR5380_transfer_dma(struct Scsi_Host *instance,
|
||||
* Side effects : SCSI things happen, the disconnected queue will be
|
||||
* modified if a command disconnects, *instance->connected will
|
||||
* change.
|
||||
*
|
||||
* XXX Note : we need to watch for bus free or a reset condition here
|
||||
* to recover from an unexpected bus free condition.
|
||||
*/
|
||||
|
||||
static void NCR5380_information_transfer(struct Scsi_Host *instance)
|
||||
@@ -1807,9 +1792,11 @@ static void NCR5380_information_transfer(struct Scsi_Host *instance)
|
||||
return;
|
||||
case PHASE_MSGIN:
|
||||
len = 1;
|
||||
tmp = 0xff;
|
||||
data = &tmp;
|
||||
NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
|
||||
ncmd->message = tmp;
|
||||
if (tmp == 0xff)
|
||||
break;
|
||||
|
||||
switch (tmp) {
|
||||
case ABORT:
|
||||
@@ -1996,6 +1983,7 @@ static void NCR5380_information_transfer(struct Scsi_Host *instance)
|
||||
break;
|
||||
case PHASE_STATIN:
|
||||
len = 1;
|
||||
tmp = ncmd->status;
|
||||
data = &tmp;
|
||||
NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
|
||||
ncmd->status = tmp;
|
||||
@@ -2005,9 +1993,20 @@ static void NCR5380_information_transfer(struct Scsi_Host *instance)
|
||||
NCR5380_dprint(NDEBUG_ANY, instance);
|
||||
} /* switch(phase) */
|
||||
} else {
|
||||
int err;
|
||||
|
||||
spin_unlock_irq(&hostdata->lock);
|
||||
NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
|
||||
err = NCR5380_poll_politely(hostdata, STATUS_REG,
|
||||
SR_REQ, SR_REQ, HZ);
|
||||
spin_lock_irq(&hostdata->lock);
|
||||
|
||||
if (err < 0 && hostdata->connected &&
|
||||
!(NCR5380_read(STATUS_REG) & SR_BSY)) {
|
||||
scmd_printk(KERN_ERR, hostdata->connected,
|
||||
"BSY signal lost\n");
|
||||
do_reset(instance);
|
||||
bus_reset_cleanup(instance);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -3,10 +3,10 @@
|
||||
* NCR 5380 defines
|
||||
*
|
||||
* Copyright 1993, Drew Eckhardt
|
||||
* Visionary Computing
|
||||
* (Unix consulting and custom programming)
|
||||
* drew@colorado.edu
|
||||
* +1 (303) 666-5836
|
||||
* Visionary Computing
|
||||
* (Unix consulting and custom programming)
|
||||
* drew@colorado.edu
|
||||
* +1 (303) 666-5836
|
||||
*
|
||||
* For more information, please consult
|
||||
*
|
||||
@@ -78,7 +78,7 @@
|
||||
#define ICR_DIFF_ENABLE 0x20 /* wo Set to enable diff. drivers */
|
||||
#define ICR_ASSERT_ACK 0x10 /* rw ini Set to assert ACK */
|
||||
#define ICR_ASSERT_BSY 0x08 /* rw Set to assert BSY */
|
||||
#define ICR_ASSERT_SEL 0x04 /* rw Set to assert SEL */
|
||||
#define ICR_ASSERT_SEL 0x04 /* rw Set to assert SEL */
|
||||
#define ICR_ASSERT_ATN 0x02 /* rw Set to assert ATN */
|
||||
#define ICR_ASSERT_DATA 0x01 /* rw SCSI_DATA_REG is asserted */
|
||||
|
||||
@@ -135,7 +135,7 @@
|
||||
#define BASR_IRQ 0x10 /* ro mirror of IRQ pin */
|
||||
#define BASR_PHASE_MATCH 0x08 /* ro Set when MSG CD IO match TCR */
|
||||
#define BASR_BUSY_ERROR 0x04 /* ro Unexpected change to inactive state */
|
||||
#define BASR_ATN 0x02 /* ro BUS status */
|
||||
#define BASR_ATN 0x02 /* ro BUS status */
|
||||
#define BASR_ACK 0x01 /* ro BUS status */
|
||||
|
||||
/* Write any value to this register to start a DMA send */
|
||||
@@ -170,7 +170,7 @@
|
||||
#define CSR_BASE CSR_53C80_INTR
|
||||
|
||||
/* Note : PHASE_* macros are based on the values of the STATUS register */
|
||||
#define PHASE_MASK (SR_MSG | SR_CD | SR_IO)
|
||||
#define PHASE_MASK (SR_MSG | SR_CD | SR_IO)
|
||||
|
||||
#define PHASE_DATAOUT 0
|
||||
#define PHASE_DATAIN SR_IO
|
||||
@@ -231,7 +231,6 @@ struct NCR5380_cmd {
|
||||
int this_residual;
|
||||
struct scatterlist *buffer;
|
||||
int status;
|
||||
int message;
|
||||
int phase;
|
||||
struct list_head list;
|
||||
};
|
||||
@@ -286,8 +285,9 @@ static const char *NCR5380_info(struct Scsi_Host *instance);
|
||||
static void NCR5380_reselect(struct Scsi_Host *instance);
|
||||
static bool NCR5380_select(struct Scsi_Host *, struct scsi_cmnd *);
|
||||
static int NCR5380_transfer_dma(struct Scsi_Host *instance, unsigned char *phase, int *count, unsigned char **data);
|
||||
static int NCR5380_transfer_pio(struct Scsi_Host *instance, unsigned char *phase, int *count, unsigned char **data,
|
||||
unsigned int can_sleep);
|
||||
static void NCR5380_transfer_pio(struct Scsi_Host *instance,
|
||||
unsigned char *phase, int *count,
|
||||
unsigned char **data, unsigned int can_sleep);
|
||||
static int NCR5380_poll_politely2(struct NCR5380_hostdata *,
|
||||
unsigned int, u8, u8,
|
||||
unsigned int, u8, u8, unsigned long);
|
||||
|
||||
@@ -1267,7 +1267,7 @@ static int aac_read_raw_io(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u3
|
||||
return ret;
|
||||
command = ContainerRawIo;
|
||||
fibsize = sizeof(struct aac_raw_io) +
|
||||
((le32_to_cpu(readcmd->sg.count)-1) * sizeof(struct sgentryraw));
|
||||
(le32_to_cpu(readcmd->sg.count) * sizeof(struct sgentryraw));
|
||||
}
|
||||
|
||||
BUG_ON(fibsize > (fib->dev->max_fib_size - sizeof(struct aac_fibhdr)));
|
||||
@@ -1302,7 +1302,7 @@ static int aac_read_block64(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
fibsize = sizeof(struct aac_read64) +
|
||||
((le32_to_cpu(readcmd->sg.count) - 1) *
|
||||
(le32_to_cpu(readcmd->sg.count) *
|
||||
sizeof (struct sgentry64));
|
||||
BUG_ON (fibsize > (fib->dev->max_fib_size -
|
||||
sizeof(struct aac_fibhdr)));
|
||||
@@ -1337,7 +1337,7 @@ static int aac_read_block(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
fibsize = sizeof(struct aac_read) +
|
||||
((le32_to_cpu(readcmd->sg.count) - 1) *
|
||||
(le32_to_cpu(readcmd->sg.count) *
|
||||
sizeof (struct sgentry));
|
||||
BUG_ON (fibsize > (fib->dev->max_fib_size -
|
||||
sizeof(struct aac_fibhdr)));
|
||||
@@ -1401,7 +1401,7 @@ static int aac_write_raw_io(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u
|
||||
return ret;
|
||||
command = ContainerRawIo;
|
||||
fibsize = sizeof(struct aac_raw_io) +
|
||||
((le32_to_cpu(writecmd->sg.count)-1) * sizeof (struct sgentryraw));
|
||||
(le32_to_cpu(writecmd->sg.count) * sizeof(struct sgentryraw));
|
||||
}
|
||||
|
||||
BUG_ON(fibsize > (fib->dev->max_fib_size - sizeof(struct aac_fibhdr)));
|
||||
@@ -1436,7 +1436,7 @@ static int aac_write_block64(struct fib * fib, struct scsi_cmnd * cmd, u64 lba,
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
fibsize = sizeof(struct aac_write64) +
|
||||
((le32_to_cpu(writecmd->sg.count) - 1) *
|
||||
(le32_to_cpu(writecmd->sg.count) *
|
||||
sizeof (struct sgentry64));
|
||||
BUG_ON (fibsize > (fib->dev->max_fib_size -
|
||||
sizeof(struct aac_fibhdr)));
|
||||
@@ -1473,7 +1473,7 @@ static int aac_write_block(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u3
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
fibsize = sizeof(struct aac_write) +
|
||||
((le32_to_cpu(writecmd->sg.count) - 1) *
|
||||
(le32_to_cpu(writecmd->sg.count) *
|
||||
sizeof (struct sgentry));
|
||||
BUG_ON (fibsize > (fib->dev->max_fib_size -
|
||||
sizeof(struct aac_fibhdr)));
|
||||
@@ -1592,9 +1592,9 @@ static int aac_scsi_64(struct fib * fib, struct scsi_cmnd * cmd)
|
||||
/*
|
||||
* Build Scatter/Gather list
|
||||
*/
|
||||
fibsize = sizeof (struct aac_srb) - sizeof (struct sgentry) +
|
||||
fibsize = sizeof(struct aac_srb) +
|
||||
((le32_to_cpu(srbcmd->sg.count) & 0xff) *
|
||||
sizeof (struct sgentry64));
|
||||
sizeof(struct sgentry64));
|
||||
BUG_ON (fibsize > (fib->dev->max_fib_size -
|
||||
sizeof(struct aac_fibhdr)));
|
||||
|
||||
@@ -1624,7 +1624,7 @@ static int aac_scsi_32(struct fib * fib, struct scsi_cmnd * cmd)
|
||||
* Build Scatter/Gather list
|
||||
*/
|
||||
fibsize = sizeof (struct aac_srb) +
|
||||
(((le32_to_cpu(srbcmd->sg.count) & 0xff) - 1) *
|
||||
((le32_to_cpu(srbcmd->sg.count) & 0xff) *
|
||||
sizeof (struct sgentry));
|
||||
BUG_ON (fibsize > (fib->dev->max_fib_size -
|
||||
sizeof(struct aac_fibhdr)));
|
||||
@@ -1693,8 +1693,7 @@ static int aac_send_safw_bmic_cmd(struct aac_dev *dev,
|
||||
fibptr->hw_fib_va->header.XferState &=
|
||||
~cpu_to_le32(FastResponseCapable);
|
||||
|
||||
fibsize = sizeof(struct aac_srb) - sizeof(struct sgentry) +
|
||||
sizeof(struct sgentry64);
|
||||
fibsize = sizeof(struct aac_srb) + sizeof(struct sgentry64);
|
||||
|
||||
/* allocate DMA buffer for response */
|
||||
addr = dma_map_single(&dev->pdev->dev, xfer_buf, xfer_len,
|
||||
@@ -1833,7 +1832,7 @@ static int aac_get_safw_ciss_luns(struct aac_dev *dev)
|
||||
struct aac_ciss_phys_luns_resp *phys_luns;
|
||||
|
||||
datasize = sizeof(struct aac_ciss_phys_luns_resp) +
|
||||
(AAC_MAX_TARGETS - 1) * sizeof(struct _ciss_lun);
|
||||
AAC_MAX_TARGETS * sizeof(struct _ciss_lun);
|
||||
phys_luns = kmalloc(datasize, GFP_KERNEL);
|
||||
if (phys_luns == NULL)
|
||||
goto out;
|
||||
@@ -2267,7 +2266,7 @@ int aac_get_adapter_info(struct aac_dev* dev)
|
||||
dev->a_ops.adapter_bounds = aac_bounds_32;
|
||||
dev->scsi_host_ptr->sg_tablesize = (dev->max_fib_size -
|
||||
sizeof(struct aac_fibhdr) -
|
||||
sizeof(struct aac_write) + sizeof(struct sgentry)) /
|
||||
sizeof(struct aac_write)) /
|
||||
sizeof(struct sgentry);
|
||||
if (dev->dac_support) {
|
||||
dev->a_ops.adapter_read = aac_read_block64;
|
||||
@@ -2278,8 +2277,7 @@ int aac_get_adapter_info(struct aac_dev* dev)
|
||||
dev->scsi_host_ptr->sg_tablesize =
|
||||
(dev->max_fib_size -
|
||||
sizeof(struct aac_fibhdr) -
|
||||
sizeof(struct aac_write64) +
|
||||
sizeof(struct sgentry64)) /
|
||||
sizeof(struct aac_write64)) /
|
||||
sizeof(struct sgentry64);
|
||||
} else {
|
||||
dev->a_ops.adapter_read = aac_read_block;
|
||||
|
||||
@@ -322,7 +322,7 @@ struct aac_ciss_phys_luns_resp {
|
||||
u8 level3[2];
|
||||
u8 level2[2];
|
||||
u8 node_ident[16]; /* phys. node identifier */
|
||||
} lun[1]; /* List of phys. devices */
|
||||
} lun[]; /* List of phys. devices */
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -507,32 +507,27 @@ struct sge_ieee1212 {
|
||||
|
||||
struct sgmap {
|
||||
__le32 count;
|
||||
struct sgentry sg[1];
|
||||
struct sgentry sg[];
|
||||
};
|
||||
|
||||
struct user_sgmap {
|
||||
u32 count;
|
||||
struct user_sgentry sg[1];
|
||||
struct user_sgentry sg[];
|
||||
};
|
||||
|
||||
struct sgmap64 {
|
||||
__le32 count;
|
||||
struct sgentry64 sg[1];
|
||||
struct sgentry64 sg[];
|
||||
};
|
||||
|
||||
struct user_sgmap64 {
|
||||
u32 count;
|
||||
struct user_sgentry64 sg[1];
|
||||
struct user_sgentry64 sg[];
|
||||
};
|
||||
|
||||
struct sgmapraw {
|
||||
__le32 count;
|
||||
struct sgentryraw sg[1];
|
||||
};
|
||||
|
||||
struct user_sgmapraw {
|
||||
u32 count;
|
||||
struct user_sgentryraw sg[1];
|
||||
struct sgentryraw sg[];
|
||||
};
|
||||
|
||||
struct creation_info
|
||||
@@ -873,7 +868,7 @@ union aac_init
|
||||
__le16 element_count;
|
||||
__le16 comp_thresh;
|
||||
__le16 unused;
|
||||
} rrq[1]; /* up to 64 RRQ addresses */
|
||||
} rrq[] __counted_by_le(rr_queue_count); /* up to 64 RRQ addresses */
|
||||
} r8;
|
||||
};
|
||||
|
||||
@@ -2029,8 +2024,8 @@ struct aac_srb_reply
|
||||
};
|
||||
|
||||
struct aac_srb_unit {
|
||||
struct aac_srb srb;
|
||||
struct aac_srb_reply srb_reply;
|
||||
struct aac_srb srb;
|
||||
};
|
||||
|
||||
/*
|
||||
|
||||
@@ -523,7 +523,7 @@ static int aac_send_raw_srb(struct aac_dev* dev, void __user * arg)
|
||||
goto cleanup;
|
||||
}
|
||||
|
||||
if ((fibsize < (sizeof(struct user_aac_srb) - sizeof(struct user_sgentry))) ||
|
||||
if ((fibsize < sizeof(struct user_aac_srb)) ||
|
||||
(fibsize > (dev->max_fib_size - sizeof(struct aac_fibhdr)))) {
|
||||
rcode = -EINVAL;
|
||||
goto cleanup;
|
||||
@@ -561,7 +561,7 @@ static int aac_send_raw_srb(struct aac_dev* dev, void __user * arg)
|
||||
rcode = -EINVAL;
|
||||
goto cleanup;
|
||||
}
|
||||
actual_fibsize = sizeof(struct aac_srb) - sizeof(struct sgentry) +
|
||||
actual_fibsize = sizeof(struct aac_srb) +
|
||||
((user_srbcmd->sg.count & 0xff) * sizeof(struct sgentry));
|
||||
actual_fibsize64 = actual_fibsize + (user_srbcmd->sg.count & 0xff) *
|
||||
(sizeof(struct sgentry64) - sizeof(struct sgentry));
|
||||
|
||||
@@ -522,8 +522,7 @@ struct aac_dev *aac_init_adapter(struct aac_dev *dev)
|
||||
spin_lock_init(&dev->iq_lock);
|
||||
dev->max_fib_size = sizeof(struct hw_fib);
|
||||
dev->sg_tablesize = host->sg_tablesize = (dev->max_fib_size
|
||||
- sizeof(struct aac_fibhdr)
|
||||
- sizeof(struct aac_write) + sizeof(struct sgentry))
|
||||
- sizeof(struct aac_fibhdr) - sizeof(struct aac_write))
|
||||
/ sizeof(struct sgentry);
|
||||
dev->comm_interface = AAC_COMM_PRODUCER;
|
||||
dev->raw_io_interface = dev->raw_io_64 = 0;
|
||||
|
||||
@@ -2327,8 +2327,9 @@ static int aac_send_wellness_command(struct aac_dev *dev, char *wellness_str,
|
||||
sg64->sg[0].addr[0] = cpu_to_le32((u32)(addr & 0xffffffff));
|
||||
sg64->sg[0].count = cpu_to_le32(datasize);
|
||||
|
||||
ret = aac_fib_send(ScsiPortCommand64, fibptr, sizeof(struct aac_srb),
|
||||
FsaNormal, 1, 1, NULL, NULL);
|
||||
ret = aac_fib_send(ScsiPortCommand64, fibptr,
|
||||
sizeof(struct aac_srb) + sizeof(struct sgentry),
|
||||
FsaNormal, 1, 1, NULL, NULL);
|
||||
|
||||
dma_free_coherent(&dev->pdev->dev, datasize, dma_buf, addr);
|
||||
|
||||
|
||||
@@ -410,7 +410,7 @@ static void aac_src_start_adapter(struct aac_dev *dev)
|
||||
lower_32_bits(dev->init_pa),
|
||||
upper_32_bits(dev->init_pa),
|
||||
sizeof(struct _r8) +
|
||||
(AAC_MAX_HRRQ - 1) * sizeof(struct _rrq),
|
||||
AAC_MAX_HRRQ * sizeof(struct _rrq),
|
||||
0, 0, 0, NULL, NULL, NULL, NULL, NULL);
|
||||
} else {
|
||||
init->r7.host_elapsed_seconds =
|
||||
|
||||
@@ -5528,7 +5528,6 @@ static int beiscsi_dev_probe(struct pci_dev *pcidev,
|
||||
struct beiscsi_hba *phba = NULL;
|
||||
struct be_eq_obj *pbe_eq;
|
||||
unsigned int s_handle;
|
||||
char wq_name[20];
|
||||
int ret, i;
|
||||
|
||||
ret = beiscsi_enable_pci(pcidev);
|
||||
@@ -5634,9 +5633,8 @@ static int beiscsi_dev_probe(struct pci_dev *pcidev,
|
||||
|
||||
phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
|
||||
|
||||
snprintf(wq_name, sizeof(wq_name), "beiscsi_%02x_wq",
|
||||
phba->shost->host_no);
|
||||
phba->wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1, wq_name);
|
||||
phba->wq = alloc_workqueue("beiscsi_%02x_wq", WQ_MEM_RECLAIM, 1,
|
||||
phba->shost->host_no);
|
||||
if (!phba->wq) {
|
||||
beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
|
||||
"BM_%d : beiscsi_dev_probe-"
|
||||
|
||||
@@ -766,9 +766,8 @@ bfad_thread_workq(struct bfad_s *bfad)
|
||||
struct bfad_im_s *im = bfad->im;
|
||||
|
||||
bfa_trc(bfad, 0);
|
||||
snprintf(im->drv_workq_name, KOBJ_NAME_LEN, "bfad_wq_%d",
|
||||
bfad->inst_no);
|
||||
im->drv_workq = create_singlethread_workqueue(im->drv_workq_name);
|
||||
im->drv_workq = alloc_ordered_workqueue("bfad_wq_%d", WQ_MEM_RECLAIM,
|
||||
bfad->inst_no);
|
||||
if (!im->drv_workq)
|
||||
return BFA_STATUS_FAILED;
|
||||
|
||||
|
||||
@@ -134,7 +134,6 @@ struct bfad_fcp_binding {
|
||||
struct bfad_im_s {
|
||||
struct bfad_s *bfad;
|
||||
struct workqueue_struct *drv_workq;
|
||||
char drv_workq_name[KOBJ_NAME_LEN];
|
||||
struct work_struct aen_im_notify_work;
|
||||
};
|
||||
|
||||
|
||||
@@ -358,18 +358,12 @@ struct bnx2fc_rport {
|
||||
dma_addr_t lcq_dma;
|
||||
u32 lcq_mem_size;
|
||||
|
||||
void *ofld_req[4];
|
||||
dma_addr_t ofld_req_dma[4];
|
||||
void *enbl_req;
|
||||
dma_addr_t enbl_req_dma;
|
||||
|
||||
spinlock_t tgt_lock;
|
||||
spinlock_t cq_lock;
|
||||
atomic_t num_active_ios;
|
||||
u32 flush_in_prog;
|
||||
unsigned long timestamp;
|
||||
unsigned long retry_delay_timestamp;
|
||||
struct list_head free_task_list;
|
||||
struct bnx2fc_cmd *pending_queue[BNX2FC_SQ_WQES_MAX+1];
|
||||
struct list_head active_cmd_queue;
|
||||
struct list_head els_queue;
|
||||
|
||||
@@ -2363,8 +2363,8 @@ static int _bnx2fc_create(struct net_device *netdev,
|
||||
interface->vlan_id = vlan_id;
|
||||
interface->tm_timeout = BNX2FC_TM_TIMEOUT;
|
||||
|
||||
interface->timer_work_queue =
|
||||
create_singlethread_workqueue("bnx2fc_timer_wq");
|
||||
interface->timer_work_queue = alloc_ordered_workqueue(
|
||||
"%s", WQ_MEM_RECLAIM, "bnx2fc_timer_wq");
|
||||
if (!interface->timer_work_queue) {
|
||||
printk(KERN_ERR PFX "ulp_init could not create timer_wq\n");
|
||||
rc = -EINVAL;
|
||||
|
||||
@@ -815,11 +815,6 @@ extern struct bnx2i_hba *get_adapter_list_head(void);
|
||||
struct bnx2i_conn *bnx2i_get_conn_from_id(struct bnx2i_hba *hba,
|
||||
u16 iscsi_cid);
|
||||
|
||||
int bnx2i_alloc_ep_pool(void);
|
||||
void bnx2i_release_ep_pool(void);
|
||||
struct bnx2i_endpoint *bnx2i_ep_ofld_list_next(struct bnx2i_hba *hba);
|
||||
struct bnx2i_endpoint *bnx2i_ep_destroy_list_next(struct bnx2i_hba *hba);
|
||||
|
||||
struct bnx2i_hba *bnx2i_find_hba_for_cnic(struct cnic_dev *cnic);
|
||||
|
||||
struct bnx2i_hba *bnx2i_alloc_hba(struct cnic_dev *cnic);
|
||||
@@ -869,12 +864,6 @@ extern int bnx2i_arm_cq_event_coalescing(struct bnx2i_endpoint *ep, u8 action);
|
||||
|
||||
extern int bnx2i_hw_ep_disconnect(struct bnx2i_endpoint *bnx2i_ep);
|
||||
|
||||
/* Debug related function prototypes */
|
||||
extern void bnx2i_print_pend_cmd_queue(struct bnx2i_conn *conn);
|
||||
extern void bnx2i_print_active_cmd_queue(struct bnx2i_conn *conn);
|
||||
extern void bnx2i_print_xmit_pdu_queue(struct bnx2i_conn *conn);
|
||||
extern void bnx2i_print_recv_state(struct bnx2i_conn *conn);
|
||||
|
||||
extern int bnx2i_percpu_io_thread(void *arg);
|
||||
extern int bnx2i_process_scsi_cmd_resp(struct iscsi_session *session,
|
||||
struct bnx2i_conn *bnx2i_conn,
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user