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https://github.com/Dasharo/linux.git
synced 2026-03-06 15:25:10 -08:00
Merge tag 'dma-mapping-6.12-2024-09-19' of git://git.infradead.org/users/hch/dma-mapping
Pull dma-mapping updates from Christoph Hellwig: - support DMA zones for arm64 systems where memory starts at > 4GB (Baruch Siach, Catalin Marinas) - support direct calls into dma-iommu and thus obsolete dma_map_ops for many common configurations (Leon Romanovsky) - add DMA-API tracing (Sean Anderson) - remove the not very useful return value from various dma_set_* APIs (Christoph Hellwig) - misc cleanups and minor optimizations (Chen Y, Yosry Ahmed, Christoph Hellwig) * tag 'dma-mapping-6.12-2024-09-19' of git://git.infradead.org/users/hch/dma-mapping: dma-mapping: reflow dma_supported dma-mapping: reliably inform about DMA support for IOMMU dma-mapping: add tracing for dma-mapping API calls dma-mapping: use IOMMU DMA calls for common alloc/free page calls dma-direct: optimize page freeing when it is not addressable dma-mapping: clearly mark DMA ops as an architecture feature vdpa_sim: don't select DMA_OPS arm64: mm: keep low RAM dma zone dma-mapping: don't return errors from dma_set_max_seg_size dma-mapping: don't return errors from dma_set_seg_boundary dma-mapping: don't return errors from dma_set_min_align_mask scsi: check that busses support the DMA API before setting dma parameters arm64: mm: fix DMA zone when dma-ranges is missing dma-mapping: direct calls for dma-iommu dma-mapping: call ->unmap_page and ->unmap_sg unconditionally arm64: support DMA zone above 4GB dma-mapping: replace zone_dma_bits by zone_dma_limit dma-mapping: use bit masking to check VM_DMA_COHERENT
This commit is contained in:
@@ -11841,6 +11841,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux.git
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F: drivers/iommu/dma-iommu.c
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F: drivers/iommu/dma-iommu.h
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F: drivers/iommu/iova.c
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F: include/linux/iommu-dma.h
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F: include/linux/iova.h
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IOMMU SUBSYSTEM
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@@ -17,6 +17,15 @@ config CPU_MITIGATIONS
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def_bool y
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endif
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#
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# Selected by architectures that need custom DMA operations for e.g. legacy
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# IOMMUs not handled by dma-iommu. Drivers must never select this symbol.
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#
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config ARCH_HAS_DMA_OPS
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depends on HAS_DMA
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select DMA_OPS_HELPERS
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bool
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menu "General architecture-dependent options"
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config ARCH_HAS_SUBPAGE_FAULTS
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@@ -4,12 +4,12 @@ config ALPHA
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default y
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select ARCH_32BIT_USTAT_F_TINODE
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select ARCH_HAS_CURRENT_STACK_POINTER
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select ARCH_HAS_DMA_OPS if PCI
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select ARCH_MIGHT_HAVE_PC_PARPORT
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select ARCH_MIGHT_HAVE_PC_SERIO
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select ARCH_NO_PREEMPT
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select ARCH_NO_SG_CHAIN
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select ARCH_USE_CMPXCHG_LOCKREF
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select DMA_OPS if PCI
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select FORCE_PCI
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select PCI_DOMAINS if PCI
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select PCI_SYSCALL if PCI
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@@ -10,6 +10,7 @@ config ARM
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select ARCH_HAS_CURRENT_STACK_POINTER
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select ARCH_HAS_DEBUG_VIRTUAL if MMU
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select ARCH_HAS_DMA_ALLOC if MMU
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select ARCH_HAS_DMA_OPS
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select ARCH_HAS_DMA_WRITE_COMBINE if !ARM_DMA_MEM_BUFFERABLE
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select ARCH_HAS_ELF_RANDOMIZE
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select ARCH_HAS_FORTIFY_SOURCE
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@@ -54,7 +55,6 @@ config ARM
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select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
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select DMA_DECLARE_COHERENT
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select DMA_GLOBAL_POOL if !MMU
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select DMA_OPS
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select DMA_NONCOHERENT_MMAP if MMU
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select EDAC_SUPPORT
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select EDAC_ATOMIC_SCRUB
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@@ -24,6 +24,7 @@ config ARM64
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select ARCH_HAS_CURRENT_STACK_POINTER
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select ARCH_HAS_DEBUG_VIRTUAL
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select ARCH_HAS_DEBUG_VM_PGTABLE
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select ARCH_HAS_DMA_OPS if XEN
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select ARCH_HAS_DMA_PREP_COHERENT
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select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
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select ARCH_HAS_FAST_MULTIPLIER
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@@ -114,36 +114,33 @@ static void __init arch_reserve_crashkernel(void)
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low_size, high);
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}
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/*
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* Return the maximum physical address for a zone accessible by the given bits
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* limit. If DRAM starts above 32-bit, expand the zone to the maximum
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* available memory, otherwise cap it at 32-bit.
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*/
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static phys_addr_t __init max_zone_phys(unsigned int zone_bits)
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static phys_addr_t __init max_zone_phys(phys_addr_t zone_limit)
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{
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phys_addr_t zone_mask = DMA_BIT_MASK(zone_bits);
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phys_addr_t phys_start = memblock_start_of_DRAM();
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/**
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* Information we get from firmware (e.g. DT dma-ranges) describe DMA
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* bus constraints. Devices using DMA might have their own limitations.
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* Some of them rely on DMA zone in low 32-bit memory. Keep low RAM
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* DMA zone on platforms that have RAM there.
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*/
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if (memblock_start_of_DRAM() < U32_MAX)
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zone_limit = min(zone_limit, U32_MAX);
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if (phys_start > U32_MAX)
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zone_mask = PHYS_ADDR_MAX;
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else if (phys_start > zone_mask)
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zone_mask = U32_MAX;
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return min(zone_mask, memblock_end_of_DRAM() - 1) + 1;
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return min(zone_limit, memblock_end_of_DRAM() - 1) + 1;
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}
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static void __init zone_sizes_init(void)
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{
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unsigned long max_zone_pfns[MAX_NR_ZONES] = {0};
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unsigned int __maybe_unused acpi_zone_dma_bits;
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unsigned int __maybe_unused dt_zone_dma_bits;
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phys_addr_t __maybe_unused dma32_phys_limit = max_zone_phys(32);
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phys_addr_t __maybe_unused acpi_zone_dma_limit;
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phys_addr_t __maybe_unused dt_zone_dma_limit;
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phys_addr_t __maybe_unused dma32_phys_limit =
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max_zone_phys(DMA_BIT_MASK(32));
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#ifdef CONFIG_ZONE_DMA
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acpi_zone_dma_bits = fls64(acpi_iort_dma_get_max_cpu_address());
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dt_zone_dma_bits = fls64(of_dma_get_max_cpu_address(NULL));
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zone_dma_bits = min3(32U, dt_zone_dma_bits, acpi_zone_dma_bits);
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arm64_dma_phys_limit = max_zone_phys(zone_dma_bits);
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acpi_zone_dma_limit = acpi_iort_dma_get_max_cpu_address();
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dt_zone_dma_limit = of_dma_get_max_cpu_address(NULL);
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zone_dma_limit = min(dt_zone_dma_limit, acpi_zone_dma_limit);
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arm64_dma_phys_limit = max_zone_phys(zone_dma_limit);
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max_zone_pfns[ZONE_DMA] = PFN_DOWN(arm64_dma_phys_limit);
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#endif
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#ifdef CONFIG_ZONE_DMA32
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@@ -8,6 +8,7 @@ config MIPS
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select ARCH_HAS_CPU_FINALIZE_INIT
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select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
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select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
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select ARCH_HAS_DMA_OPS if MACH_JAZZ
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select ARCH_HAS_FORTIFY_SOURCE
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select ARCH_HAS_KCOV
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select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
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@@ -393,7 +394,6 @@ config MACH_JAZZ
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select ARC_PROMLIB
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select ARCH_MIGHT_HAVE_PC_PARPORT
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select ARCH_MIGHT_HAVE_PC_SERIO
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select DMA_OPS
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select FW_ARC
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select FW_ARC32
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select ARCH_MAY_HAVE_PC_FDC
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@@ -10,6 +10,7 @@ config PARISC
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select ARCH_WANT_FRAME_POINTERS
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select ARCH_HAS_CPU_CACHE_ALIASING
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select ARCH_HAS_DMA_ALLOC if PA11
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select ARCH_HAS_DMA_OPS
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select ARCH_HAS_ELF_RANDOMIZE
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select ARCH_HAS_STRICT_KERNEL_RWX
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select ARCH_HAS_STRICT_MODULE_RWX
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@@ -23,7 +24,6 @@ config PARISC
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select ARCH_HAS_CACHE_LINE_SIZE
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select ARCH_HAS_DEBUG_VM_PGTABLE
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select HAVE_RELIABLE_STACKTRACE
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select DMA_OPS
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select RTC_CLASS
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select RTC_DRV_GENERIC
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select INIT_ALL_POSSIBLE
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@@ -133,6 +133,7 @@ config PPC
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select ARCH_HAS_DEBUG_WX if STRICT_KERNEL_RWX
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select ARCH_HAS_DEVMEM_IS_ALLOWED
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select ARCH_HAS_DMA_MAP_DIRECT if PPC_PSERIES
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select ARCH_HAS_DMA_OPS if PPC64
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select ARCH_HAS_FORTIFY_SOURCE
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select ARCH_HAS_GCOV_PROFILE_ALL
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select ARCH_HAS_KCOV
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@@ -185,7 +186,6 @@ config PPC
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select CPUMASK_OFFSTACK if NR_CPUS >= 8192
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select DCACHE_WORD_ACCESS if PPC64 && CPU_LITTLE_ENDIAN
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select DMA_OPS_BYPASS if PPC64
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select DMA_OPS if PPC64
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select DYNAMIC_FTRACE if FUNCTION_TRACER
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select EDAC_ATOMIC_SCRUB
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select EDAC_SUPPORT
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@@ -216,7 +216,7 @@ static int __init mark_nonram_nosave(void)
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* everything else. GFP_DMA32 page allocations automatically fall back to
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* ZONE_DMA.
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*
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* By using 31-bit unconditionally, we can exploit zone_dma_bits to inform the
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* By using 31-bit unconditionally, we can exploit zone_dma_limit to inform the
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* generic DMA mapping code. 32-bit only devices (if not handled by an IOMMU
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* anyway) will take a first dip into ZONE_NORMAL and get otherwise served by
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* ZONE_DMA.
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@@ -230,6 +230,7 @@ void __init paging_init(void)
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{
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unsigned long long total_ram = memblock_phys_mem_size();
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phys_addr_t top_of_ram = memblock_end_of_DRAM();
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int zone_dma_bits;
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#ifdef CONFIG_HIGHMEM
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unsigned long v = __fix_to_virt(FIX_KMAP_END);
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@@ -256,6 +257,8 @@ void __init paging_init(void)
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else
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zone_dma_bits = 31;
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zone_dma_limit = DMA_BIT_MASK(zone_dma_bits);
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#ifdef CONFIG_ZONE_DMA
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max_zone_pfns[ZONE_DMA] = min(max_low_pfn,
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1UL << (zone_dma_bits - PAGE_SHIFT));
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@@ -70,6 +70,7 @@ config S390
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select ARCH_HAS_DEBUG_VM_PGTABLE
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select ARCH_HAS_DEBUG_WX
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select ARCH_HAS_DEVMEM_IS_ALLOWED
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select ARCH_HAS_DMA_OPS if PCI
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select ARCH_HAS_ELF_RANDOMIZE
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select ARCH_HAS_FORCE_DMA_UNENCRYPTED
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select ARCH_HAS_FORTIFY_SOURCE
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@@ -137,7 +138,6 @@ config S390
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select BUILDTIME_TABLE_SORT
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select CLONE_BACKWARDS2
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select DCACHE_WORD_ACCESS if !KMSAN
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select DMA_OPS if PCI
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select DYNAMIC_FTRACE if FUNCTION_TRACER
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select FUNCTION_ALIGNMENT_8B if CC_IS_GCC
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select FUNCTION_ALIGNMENT_16B if !CC_IS_GCC
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@@ -97,7 +97,7 @@ void __init paging_init(void)
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vmem_map_init();
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sparse_init();
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zone_dma_bits = 31;
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zone_dma_limit = DMA_BIT_MASK(31);
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memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
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max_zone_pfns[ZONE_DMA] = virt_to_pfn(MAX_DMA_ADDRESS);
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max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
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@@ -14,9 +14,9 @@ config SPARC
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bool
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default y
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select ARCH_HAS_CPU_CACHE_ALIASING
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select ARCH_HAS_DMA_OPS
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select ARCH_MIGHT_HAVE_PC_PARPORT if SPARC64 && PCI
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select ARCH_MIGHT_HAVE_PC_SERIO
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select DMA_OPS
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select OF
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select OF_PROMTREE
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select HAVE_ASM_MODVERSIONS
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@@ -79,6 +79,7 @@ config X86
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select ARCH_HAS_DEBUG_VIRTUAL
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select ARCH_HAS_DEBUG_VM_PGTABLE if !X86_PAE
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select ARCH_HAS_DEVMEM_IS_ALLOWED
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select ARCH_HAS_DMA_OPS if GART_IOMMU || XEN
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select ARCH_HAS_EARLY_DEBUG if KGDB
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select ARCH_HAS_ELF_RANDOMIZE
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select ARCH_HAS_FAST_MULTIPLIER
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@@ -944,7 +945,6 @@ config DMI
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config GART_IOMMU
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bool "Old AMD GART IOMMU support"
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select DMA_OPS
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select IOMMU_HELPER
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select SWIOTLB
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depends on X86_64 && PCI && AMD_NB
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@@ -447,9 +447,7 @@ static int init_pci(struct qaic_device *qdev, struct pci_dev *pdev)
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ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
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if (ret)
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return ret;
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ret = dma_set_max_seg_size(&pdev->dev, UINT_MAX);
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if (ret)
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return ret;
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dma_set_max_seg_size(&pdev->dev, UINT_MAX);
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qdev->bar_0 = devm_ioremap_resource(&pdev->dev, &pdev->resource[0]);
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if (IS_ERR(qdev->bar_0))
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@@ -598,9 +598,7 @@ static int idma64_probe(struct idma64_chip *chip)
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idma64->dma.dev = chip->sysdev;
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ret = dma_set_max_seg_size(idma64->dma.dev, IDMA64C_CTLH_BLOCK_TS_MASK);
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if (ret)
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return ret;
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dma_set_max_seg_size(idma64->dma.dev, IDMA64C_CTLH_BLOCK_TS_MASK);
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ret = dma_async_device_register(&idma64->dma);
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if (ret)
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@@ -3163,10 +3163,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
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* This is the limit for transfers with a buswidth of 1, larger
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* buswidths will have larger limits.
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*/
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ret = dma_set_max_seg_size(&adev->dev, 1900800);
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if (ret)
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dev_err(&adev->dev, "unable to set the seg size\n");
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dma_set_max_seg_size(&adev->dev, 1900800);
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init_pl330_debugfs(pl330);
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dev_info(&adev->dev,
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@@ -1325,11 +1325,7 @@ static int bam_dma_probe(struct platform_device *pdev)
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/* set max dma segment size */
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bdev->common.dev = bdev->dev;
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ret = dma_set_max_seg_size(bdev->common.dev, BAM_FIFO_SIZE);
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if (ret) {
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dev_err(bdev->dev, "cannot set maximum segment size\n");
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goto err_bam_channel_exit;
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}
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dma_set_max_seg_size(bdev->common.dev, BAM_FIFO_SIZE);
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platform_set_drvdata(pdev, bdev);
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@@ -1868,9 +1868,7 @@ static int rcar_dmac_probe(struct platform_device *pdev)
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dmac->dev = &pdev->dev;
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platform_set_drvdata(pdev, dmac);
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ret = dma_set_max_seg_size(dmac->dev, RCAR_DMATCR_MASK);
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if (ret)
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return ret;
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dma_set_max_seg_size(dmac->dev, RCAR_DMATCR_MASK);
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ret = dma_set_mask_and_coherent(dmac->dev, DMA_BIT_MASK(40));
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if (ret)
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@@ -3632,11 +3632,7 @@ static int __init d40_probe(struct platform_device *pdev)
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if (ret)
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goto destroy_cache;
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ret = dma_set_max_seg_size(base->dev, STEDMA40_MAX_SEG_SIZE);
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if (ret) {
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d40_err(dev, "Failed to set dma max seg size\n");
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goto destroy_cache;
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}
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dma_set_max_seg_size(base->dev, STEDMA40_MAX_SEG_SIZE);
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d40_hw_init(base);
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