dasharo/edk2-platforms
0
0
Fork 0
mirror of https://github.com/Dasharo/edk2-platforms.git synced 2026-03-06 14:51:43 -08:00
Code Issues Packages Projects Releases Wiki Activity

KabylakeOpenBoardPkg/AspireVn7Dash572G:Use same variable name for FspNvsHob

Browse Source 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3678

To simplify the implementation the variable Name/GUID has been
changed to "FspNvsBuffer" and gFspNvsBufferVariableGuid
regardless it stores the data from FSP_NON_VOLATILE_STORAGE_HOB2
or FSP_NON_VOLATILE_STORAGE_HOB.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Benjamin Doron <benjamin.doron00@gmail.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>
This commit is contained in:
Chasel Chiu
2021-10-08 09:35:18 +08:00
parent 59dc66e86a
commit df697c2230
4 changed files with 24 additions and 32 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
View File

@@ -1,7 +1,7 @@
/** @file
Implementation of Fsp Misc UPD Initialization.
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -11,7 +11,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/DebugLib.h>
#include <Library/PciLib.h>
#include <Library/PeiLib.h>
#include <FspEas.h>
#include <FspmUpd.h>
#include <FspsUpd.h>
@@ -34,24 +33,21 @@ PeiFspMiscUpdUpdatePreMem (
{
EFI_STATUS Status;
UINTN VariableSize;
VOID *MemorySavedData;
VOID *FspNvsBufferPtr;
UINT8 MorControl;
VOID *MorControlPtr;
//
// Initialize S3 Data variable (S3DataPtr). It may be used for warm and fast boot paths.
//
VariableSize = 0;
MemorySavedData = NULL;
Status = PeiGetVariable (
L"MemoryConfig",
&gFspNonVolatileStorageHobGuid,
&MemorySavedData,
&VariableSize
);
DEBUG ((DEBUG_INFO, "Get L\"MemoryConfig\" gFspNonVolatileStorageHobGuid - %r\n", Status));
DEBUG ((DEBUG_INFO, "MemoryConfig Size - 0x%x\n", VariableSize));
FspmUpd->FspmArchUpd.NvsBufferPtr = MemorySavedData;
FspNvsBufferPtr = NULL;
VariableSize = 0;
Status = PeiGetLargeVariable (L"FspNvsBuffer", &gFspNvsBufferVariableGuid, &FspNvsBufferPtr, &VariableSize);
if (Status == EFI_SUCCESS) {
DEBUG ((DEBUG_INFO, "Get L\"FspNvsBuffer\" gFspNvsBufferVariableGuid - %r\n", Status));
DEBUG ((DEBUG_INFO, "FspNvsBuffer Size - 0x%x\n", VariableSize));
FspmUpd->FspmArchUpd.NvsBufferPtr = FspNvsBufferPtr;
}
if (FspmUpd->FspmArchUpd.NvsBufferPtr != NULL) {
//

7
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf
View File

@@ -1,7 +1,7 @@
## @file
# Provide FSP wrapper platform related function.
#
# Copyright (c) 2017 - 2020 Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2017 - 2021 Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -74,7 +74,6 @@
PchInfoLib
PchHsioLib
PchPcieRpLib
MemoryAllocationLib
SiPolicyLib
PeiLib
@@ -134,9 +133,11 @@
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdAudioConnector
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdGraphicsVbtGuid
gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdRootPort4ClkInfo
[Guids]
gFspNonVolatileStorageHobGuid ## CONSUMES
gFspNvsBufferVariableGuid ## CONSUMES
gTianoLogoGuid ## CONSUMES
gEfiMemoryOverwriteControlDataGuid

23
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c
View File

@@ -431,8 +431,8 @@ SiliconPolicyUpdatePreMem (
SA_MISC_PEI_PREMEM_CONFIG *MiscPeiPreMemConfig;
MEMORY_CONFIG_NO_CRC *MemConfigNoCrc;
VOID *Buffer;
UINTN VariableSize;
VOID *MemorySavedData;
UINTN FspNvsBufferSize;
VOID *FspNvsBufferPtr;
UINT8 SpdAddressTable[4];
DEBUG((DEBUG_INFO, "\nUpdating Policy in Pre-Mem\n"));
@@ -463,18 +463,13 @@ SiliconPolicyUpdatePreMem (
// Note: AmberLake FSP does not implement the FSPM_ARCH_CONFIG_PPI added in FSP 2.1, hence
// the platform specific S3DataPtr must be used instead.
//
VariableSize = 0;
MemorySavedData = NULL;
Status = PeiGetVariable (
L"MemoryConfig",
&gFspNonVolatileStorageHobGuid,
&MemorySavedData,
&VariableSize
);
DEBUG ((DEBUG_INFO, "Get L\"MemoryConfig\" gFspNonVolatileStorageHobGuid - %r\n", Status));
DEBUG ((DEBUG_INFO, "MemoryConfig Size - 0x%x\n", VariableSize));
if (!EFI_ERROR (Status)) {
MiscPeiPreMemConfig->S3DataPtr = MemorySavedData;
FspNvsBufferPtr = NULL;
FspNvsBufferSize = 0;
Status = PeiGetLargeVariable (L"FspNvsBuffer", &gFspNvsBufferVariableGuid, &FspNvsBufferPtr, &FspNvsBufferSize);
if (Status == EFI_SUCCESS) {
DEBUG ((DEBUG_INFO, "Get L\"FspNvsBuffer\" gFspNvsBufferVariableGuid - %r\n", Status));
DEBUG ((DEBUG_INFO, "FspNvsBuffer Size - 0x%x\n", FspNvsBufferSize));
MiscPeiPreMemConfig->S3DataPtr = FspNvsBufferPtr;
}
//

2
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
View File

@@ -52,7 +52,7 @@
gHsioPciePreMemConfigGuid ## CONSUMES
gHsioSataPreMemConfigGuid ## CONSUMES
gSaMiscPeiPreMemConfigGuid ## CONSUMES
gFspNonVolatileStorageHobGuid ## CONSUMES
gFspNvsBufferVariableGuid ## CONSUMES
gIoApicConfigGuid ## CONSUMES
gHpetPreMemConfigGuid ## CONSUMES
gLockDownConfigGuid