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mb/msi/ms7e56/devicetree.cb: Set proper polarity for SIO UART IRQ4

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The SIO is configured for low level interrupts. Reflect that in eSPI
controller configuratio nso that the interrupts in OS work correctly.

TEST=Enable serial console in Linux and get login prompt.

Upstream-Status: Pending
Change-Id: I4de833f3a73157c03d35f1bcdf3b476f3da6721e
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
This commit is contained in:
Michał Żygowski
2026-06-03 14:53:58 +02:00
parent 68341e27d3
commit f6ed696bbc
1 changed files with 1 additions and 0 deletions
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src/mainboard/msi/ms7e56/devicetree.cb
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@@ -41,6 +41,7 @@ chip soc/amd/phoenix
.oob_ch_en = 1,
.flash_ch_en = 1,
.irq_mask = 0xffe107,
.vw_irq_polarity = ESPI_VW_IRQ_LEVEL_LOW(4),
}"
register "s0ix_enable" = "false"