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arm64:dts: Add new board rock-3a
This commit is contained in:
committed by
Mecid Urganci
parent
416a4bc157
commit
f8d9efe0b1
@@ -202,6 +202,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v12-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v12-linux-spi-nand.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-pcie-ep-lp4x-v10-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-toybrick-sd0-android.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-toybrick-sd0-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-toybrick-x0-android.dtb
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100
arch/arm64/boot/dts/rockchip/rk3568-rock-3a-display.dtsi
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100
arch/arm64/boot/dts/rockchip/rk3568-rock-3a-display.dtsi
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@@ -0,0 +1,100 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Radxa Limited.
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*
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*/
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/ {
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compatible = "radxa,rock-3a", "rockchip,rk3568";
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vcc_mipi: vcc-mipi {
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status = "disabled";
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compatible = "regulator-fixed";
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regulator-name = "vcc_mipi";
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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regulator-always-on;
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gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc3v3_sys>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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&video_phy1 {
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status = "disabled";
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};
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&dsi1 {
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status = "disabled";
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power-supply = <&vcc_mipi>;
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dsi1_panel: dsi-panel@0 {
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compatible = "rockpi,tc358762";
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reg = <0x0>;
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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panel_in_dsi1: endpoint {
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remote-endpoint = <&dsi1_out_panel>;
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};
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};
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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dsi1_out_panel: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&panel_in_dsi1>;
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};
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};
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};
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};
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&dsi1_in_vp0 {
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status = "disabled";
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};
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&dsi1_in_vp1 {
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status = "disabled";
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};
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&route_dsi1 {
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status = "disabled";
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connect = <&vp1_out_dsi1>;
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};
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&i2c3 {
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status = "disabled";
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pinctrl-0 = <&i2c3m1_xfer>;
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rockpi_mcu: rockpi-mcu@45 {
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compatible = "rockpi_mcu";
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reg = <0x45>;
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status = "disabled";
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};
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rockpi_ft5406: rockpi-ft5406@38 {
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compatible = "rockpi_ft5406";
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reg = <0x38>;
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status = "disabled";
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};
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};
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File diff suppressed because it is too large
Load Diff
152
arch/arm64/boot/dts/rockchip/rk3568-rock-3ab-cameras.dtsi
Normal file
152
arch/arm64/boot/dts/rockchip/rk3568-rock-3ab-cameras.dtsi
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@@ -0,0 +1,152 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Radxa Limited.
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*
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*/
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/ {
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ext_cam_clk: ext-cam-clk {
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status = "disabled";
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compatible = "fixed-clock";
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clock-frequency = <25000000>;
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clock-output-names = "ext_cam_clk";
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#clock-cells = <0>;
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};
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ext_cam_clk_imx219: ext-cam-clk-imx219 {
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status = "disabled";
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "ext_cam_clk_imx219";
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#clock-cells = <0>;
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};
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vcc_camera: vcc-camera {
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status = "disabled";
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compatible = "regulator-fixed";
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regulator-name = "vcc_camera";
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gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&i2c5 {
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status = "disabled";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c5m0_xfer>;
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ov5647: ov5647@36 {
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status = "disabled";
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compatible = "ovti,ov5647";
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reg = <0x36>;
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clocks = <&ext_cam_clk>;
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clock-names = "ext_cam_clk";
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pwdn-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
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port {
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ov5647_out: endpoint {
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remote-endpoint = <&mipi_in_ucam0>;
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data-lanes = <1 2>;
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};
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};
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};
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imx219: imx219@10 {
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status = "disabled";
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compatible = "sony,imx219";
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reg = <0x10>;
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clocks = <&ext_cam_clk_imx219>;
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clock-names = "ext_cam_clk_imx219";
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pwdn-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "front";
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rockchip,camera-module-name = "rpi-camera-v2";
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rockchip,camera-module-lens-name = "default";
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port {
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imx219_out: endpoint {
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remote-endpoint = <&mipi_in_ucam1>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&csi2_dphy_hw {
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status = "disabled";
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};
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&csi2_dphy0 {
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_ucam0: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&ov5647_out>;
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data-lanes = <1 2>;
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};
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mipi_in_ucam1: endpoint@2 {
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reg = <2>;
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remote-endpoint = <&imx219_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy0_out: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&isp0_in>;
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};
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};
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};
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};
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&rkisp_vir0 {
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status = "disabled";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp0_in: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&dphy0_out>;
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};
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};
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};
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&rkisp {
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status = "disabled";
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};
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&rkisp_mmu {
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status = "disabled";
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};
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&rkcif_mmu {
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status = "disabled";
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};
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&rkcif {
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status = "disabled";
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};
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