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arm64:dts: Add new board radxa-e25
This commit is contained in:
amazingfate
committed by
Mecid Urganci
Mecid Urganci
parent
14b94d16a2
commit
416a4bc157
@@ -201,6 +201,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v10-linux-spi-nand.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v12-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v12-linux-spi-nand.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-pcie-ep-lp4x-v10-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-toybrick-sd0-android.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-toybrick-sd0-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-toybrick-x0-android.dtb
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325
arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
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325
arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
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@@ -0,0 +1,325 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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* Copyright (c) 2021 Radxa Limited.
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*
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*/
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/dts-v1/;
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#include "rk3568-radxa-rock-3-compute-module-plus.dtsi"
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/ {
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model = "Radxa E25";
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compatible = "radxa,e25", "rockchip,rk3568";
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vcc5v0_otg: vcc5v0-otg-regulator {
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-boot-on;
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enable-active-high;
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gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_otg_en>;
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regulator-name = "vcc5v0_otg";
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};
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pcie30_3v3: pcie30-3v3 {
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compatible = "regulator-gpio";
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regulator-name = "pcie30_3v3";
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regulator-min-microvolt = <100000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
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gpios-states = <0x1>;
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states = <100000 0x0
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3300000 0x1>;
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};
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vcc3v3_minipcie: vcc3v3-minipcie {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc3v3_minipcie_en>;
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regulator-name = "vcc3v3_minipcie";
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regulator-always-on;
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regulator-boot-on;
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};
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//low:wifi,high:5G
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vcc3v3_minipcie_to_5g_or_wifi: vcc3v3-minipcie-to-5g-or-wifi {
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compatible = "regulator-fixed";
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enable-active-low;
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gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc3v3_minipcie_to_5g_or_wifi_en>;
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regulator-name = "vcc3v3_minipcie_to_5g_or_wifi";
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regulator-always-on;
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regulator-boot-on;
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};
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vcc3v3_pcie_30x1: vcc3v3-pci-30x1 {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc3v3_pcie_30x1_en>;
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regulator-name = "vcc3v3_pci_30x1";
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regulator-always-on;
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regulator-boot-on;
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};
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em05_modem: em05-modem {
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compatible = "lte-em05-modem-platdata";
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pinctrl-names = "default";
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pinctrl-0 = <&em05_power_en &em05_airplane_mode &em05_reset>;
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em05,power-gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
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em05,reset-gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
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em05,airplane-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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rgb0: rgb0 {
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compatible = "pwm-leds";
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status = "okay";
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rgb0-red {
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pwms = <&pwm1 0 1000000 0>;
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max-brightness = <255>;
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};
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rgb0-blue {
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pwms = <&pwm12 0 1000000 0>;
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max-brightness = <255>;
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};
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rgb0-green {
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pwms = <&pwm2 0 1000000 0>;
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max-brightness = <255>;
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};
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};
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};
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&fiq_debugger {
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rockchip,baudrate = <115200>;
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};
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&sdio_pwrseq {
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status = "disabled";
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};
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&wireless_wlan {
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status = "disabled";
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};
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&wireless_bluetooth {
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status = "disabled";
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};
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&sdmmc2 {
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status = "disabled";
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};
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//sdcard
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&sdmmc0 {
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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disable-wp;
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sd-uhs-sdr50;
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vmmc-supply = <&vcc3v3_sd>;
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vqmmc-supply = <&vccio_sd>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
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cd-gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&u2phy0_host {
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phy-supply = <&vcc5v0_otg>;
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status = "okay";
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};
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&u2phy0_otg {
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vbus-supply = <&vcc5v0_otg>;
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status = "okay";
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};
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&u2phy1_host {
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phy-supply = <&vcc5v0_otg>;
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status = "okay";
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};
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&u2phy1_otg {
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phy-supply = <&vcc5v0_otg>;
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status = "okay";
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};
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/* USB OTG/USB Host_1 USB 2.0 Comb PHY_0 */
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&usb2phy0 {
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status = "okay";
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u2phy0_host {
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status = "okay";
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};
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u2phy0_otg {
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status = "okay";
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};
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};
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/* USB Host_2/USB Host_3 USB 2.0 Comb PHY_1 */
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&usb2phy1 {
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status = "okay";
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u2phy1_host {
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status = "okay";
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};
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u2phy1_otg {
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status = "okay";
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};
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};
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/* USB 2.0 Host_2 EHCI controller for high speed */
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&usb_host0_ehci {
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status = "okay";
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};
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/* USB 2.0 Host_2 OHCI controller for full/low speed */
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&usb_host0_ohci {
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status = "okay";
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};
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/* USB 2.0 Host_3 EHCI controller for high speed */
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&usb_host1_ehci {
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status = "okay";
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};
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/* USB 2.0 Host_3 OHCI controller for full/low speed */
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&usb_host1_ohci {
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status = "okay";
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};
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&usbdrd_dwc3 {
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extcon=<&usb2phy0>;
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status="okay";
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};
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/* USB 3.0 OTG controller */
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&usbdrd30 {
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status = "okay";
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};
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&usbhost_dwc3 {
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phys = <&u2phy0_host>;
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phy-names = "usb2-phy";
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maximum-speed = "high-speed"; /* set dwc3 controller to high speed */
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status = "okay";
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};
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/* USB 3.0 Host_1 controller */
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&usbhost30 {
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status = "disabled";
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};
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/* USB 3.0 OTG/SATA Combo PHY_0 */
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&combphy0_us {
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status = "okay";
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};
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/* USB 3.0 Host/SATA/QSGMII Combo PHY_1 */
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&combphy1_usq {
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rockchip,dis-u3otg1-port; /* set dwc3 controller to high speed */
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status = "okay";
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};
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&sata1 {
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status = "okay";
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};
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&pcie30phy {
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status = "okay";
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};
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&pcie3x1 {
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rockchip,bifurcation;
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reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&pcie30_3v3>;
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pinctrl-0 = <&pcie30x1m0_pins>;
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status = "okay";
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};
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&pcie3x2 {
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rockchip,bifurcation;
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reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&pcie30_3v3>;
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pinctrl-0 = <&pcie30x2m1_pins>;
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status = "okay";
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};
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&combphy2_psq {
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status = "okay";
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};
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&pcie2x1 {
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reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&pcie30_3v3>;
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pinctrl-0 = <&pcie20m2_pins>;
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status = "okay";
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};
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&pwm1 {
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status = "okay";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm1m0_pins>;
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};
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&pwm2 {
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status = "okay";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm2m0_pins>;
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};
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&pwm12 {
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status = "okay";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm12m1_pins>;
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};
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&user_leds {
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linux,default-trigger = "none";
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default-state = "off";
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};
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&pinctrl {
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usb {
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vcc5v0_otg_en: vcc5v0-otg-en {
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rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pci-en {
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vcc3v3_minipcie_en: vcc3v3-minipcie-en {
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rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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vcc3v3_pcie_30x1_en: vcc3v3-pcie-30x1-en {
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rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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vcc3v3_minipcie_to_5g_or_wifi_en: vcc3v3-minipcie-to-5g-or-wifi-en {
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rockchip,pins = <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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lte-em05-modem {
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em05_airplane_mode: em05-airplane-mode {
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rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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em05_power_en: em05-power-en {
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rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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em05_reset: em05-reset {
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rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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