Updated vkd3d-latest patchset

Squash and rebase.
This commit is contained in:
Alistair Leslie-Hughes
2025-06-18 10:25:18 +10:00
parent c37f9f5091
commit a044166651
10 changed files with 7162 additions and 7423 deletions

View File

@@ -1,308 +0,0 @@
From 96b79c613055cef6f2da2015081adf61bd88becd Mon Sep 17 00:00:00 2001
From: Alistair Leslie-Hughes <leslie_alistair@hotmail.com>
Date: Wed, 28 May 2025 07:14:59 +1000
Subject: [PATCH] Updated vkd3d to 87ec2d98973432531d7d9d08dfc837376f91844c.
---
libs/vkd3d/libs/vkd3d-shader/dxbc.c | 10 +-
libs/vkd3d/libs/vkd3d-shader/dxil.c | 8 +-
libs/vkd3d/libs/vkd3d-shader/fx.c | 106 ++++++++++++++++----
libs/vkd3d/libs/vkd3d-shader/hlsl_codegen.c | 2 +-
libs/vkd3d/libs/vkd3d-shader/spirv.c | 2 +-
libs/vkd3d/libs/vkd3d-shader/tpf.c | 4 +-
6 files changed, 100 insertions(+), 32 deletions(-)
diff --git a/libs/vkd3d/libs/vkd3d-shader/dxbc.c b/libs/vkd3d/libs/vkd3d-shader/dxbc.c
index 9e3a57132a1..45a45c3ad4a 100644
--- a/libs/vkd3d/libs/vkd3d-shader/dxbc.c
+++ b/libs/vkd3d/libs/vkd3d-shader/dxbc.c
@@ -388,7 +388,7 @@ static int shader_parse_signature(const struct vkd3d_shader_dxbc_section_desc *s
{
WARN("Invalid data size %#zx.\n", section->data.size);
vkd3d_shader_error(message_context, NULL, VKD3D_SHADER_ERROR_DXBC_INVALID_SIGNATURE,
- "Section size %zu is smaller than the minimum signature header size.\n", section->data.size);
+ "Section size %zu is smaller than the minimum signature header size.", section->data.size);
return VKD3D_ERROR_INVALID_ARGUMENT;
}
@@ -402,7 +402,7 @@ static int shader_parse_signature(const struct vkd3d_shader_dxbc_section_desc *s
{
WARN("Invalid header size %#x.\n", header_size);
vkd3d_shader_error(message_context, NULL, VKD3D_SHADER_ERROR_DXBC_INVALID_SIGNATURE,
- "Signature header size %#x is invalid.\n", header_size);
+ "Signature header size %#x is invalid.", header_size);
return VKD3D_ERROR_INVALID_ARGUMENT;
}
skip_dword_unknown(&ptr, i - 2);
@@ -438,7 +438,7 @@ static int shader_parse_signature(const struct vkd3d_shader_dxbc_section_desc *s
|| !(e[i].semantic_name = vkd3d_strdup(name)))
{
vkd3d_shader_error(message_context, NULL, VKD3D_SHADER_ERROR_DXBC_INVALID_STRING_REFERENCE,
- "Element %u has invalid semantic name reference %#zx (data size %#zx).\n",
+ "Element %u has invalid semantic name reference %#zx (data size %#zx).",
i, name_offset, section->data.size);
fail = true;
}
@@ -447,7 +447,7 @@ static int shader_parse_signature(const struct vkd3d_shader_dxbc_section_desc *s
if ((e[i].component_type = read_u32(&ptr)) > VKD3D_SHADER_COMPONENT_FLOAT)
{
vkd3d_shader_error(message_context, NULL, VKD3D_SHADER_ERROR_DXBC_INVALID_COMPONENT_TYPE,
- "Element %u has invalid component type %#x.\n", i, e[i].component_type);
+ "Element %u has invalid component type %#x.", i, e[i].component_type);
fail = true;
}
e[i].register_index = read_u32(&ptr);
@@ -531,7 +531,7 @@ static int shdr_parse_features(const struct vkd3d_shader_dxbc_section_desc *sect
{
WARN("Invalid data size %#zx.\n", section->data.size);
vkd3d_shader_error(message_context, NULL, VKD3D_SHADER_ERROR_DXBC_INVALID_CHUNK_SIZE,
- "SFI0 section size %zu is too small to contain flags.\n", section->data.size);
+ "SFI0 section size %zu is too small to contain flags.", section->data.size);
return VKD3D_ERROR_INVALID_ARGUMENT;
}
flags = read_u64(&ptr);
diff --git a/libs/vkd3d/libs/vkd3d-shader/dxil.c b/libs/vkd3d/libs/vkd3d-shader/dxil.c
index c9e99c6a9ba..9a4d194586b 100644
--- a/libs/vkd3d/libs/vkd3d-shader/dxil.c
+++ b/libs/vkd3d/libs/vkd3d-shader/dxil.c
@@ -6343,7 +6343,7 @@ static enum vkd3d_shader_opcode sm6_dx_map_wave_bit_op(enum dxil_wave_bit_op_kin
default:
FIXME("Unhandled wave bit op %u.\n", op);
vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_UNHANDLED_INTRINSIC,
- "Wave bit operation %u is unhandled.\n", op);
+ "Wave bit operation %u is unhandled.", op);
return VKD3DSIH_INVALID;
}
}
@@ -6389,7 +6389,7 @@ static enum vkd3d_shader_opcode sm6_dx_map_wave_op(enum dxil_wave_op_kind op, bo
default:
FIXME("Unhandled wave op %u.\n", op);
vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_UNHANDLED_INTRINSIC,
- "Wave operation %u is unhandled.\n", op);
+ "Wave operation %u is unhandled.", op);
return VKD3DSIH_INVALID;
}
}
@@ -6892,7 +6892,7 @@ static enum vkd3d_shader_opcode sm6_map_cast_op(uint64_t code, const struct sm6_
default:
FIXME("Unhandled cast op %"PRIu64".\n", code);
vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_INVALID_OPERAND,
- "Cast operation %"PRIu64" is unhandled.\n", code);
+ "Cast operation %"PRIu64" is unhandled.", code);
return VKD3DSIH_INVALID;
}
@@ -6900,7 +6900,7 @@ static enum vkd3d_shader_opcode sm6_map_cast_op(uint64_t code, const struct sm6_
{
FIXME("Invalid types %u and/or %u for op %"PRIu64".\n", from->class, to->class, code);
vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_INVALID_OPERAND,
- "Cast operation %"PRIu64" from type class %u, width %u to type class %u, width %u is invalid.\n",
+ "Cast operation %"PRIu64" from type class %u, width %u to type class %u, width %u is invalid.",
code, from->class, from->u.width, to->class, to->u.width);
return VKD3DSIH_INVALID;
}
diff --git a/libs/vkd3d/libs/vkd3d-shader/fx.c b/libs/vkd3d/libs/vkd3d-shader/fx.c
index c475a46da42..1d5f95fa988 100644
--- a/libs/vkd3d/libs/vkd3d-shader/fx.c
+++ b/libs/vkd3d/libs/vkd3d-shader/fx.c
@@ -1547,12 +1547,33 @@ static uint32_t get_fx_2_type_class(const struct hlsl_type *type)
return hlsl_sm1_class(type);
}
-static uint32_t write_fx_2_parameter(const struct hlsl_type *type, const char *name,
- const struct hlsl_semantic *semantic, bool is_combined_sampler, struct fx_write_context *fx)
+struct fx_2_write_type_context
{
- struct vkd3d_bytecode_buffer *buffer = &fx->unstructured;
- uint32_t semantic_offset, offset, elements_count = 0, name_offset;
- size_t i;
+ uint32_t *names;
+ uint32_t *semantics;
+ uint32_t count;
+
+ uint32_t offset;
+
+ bool is_combined_sampler;
+ struct fx_write_context *fx;
+};
+
+static void count_type_iter(const struct hlsl_type *type, const char *name,
+ const struct hlsl_semantic *semantic, void *context)
+{
+ struct fx_2_write_type_context *ctx = context;
+
+ ++ctx->count;
+}
+
+static void write_fx_2_type_iter(const struct hlsl_type *type, const char *name,
+ const struct hlsl_semantic *semantic, void *context)
+{
+ struct fx_2_write_type_context *ctx = context;
+ struct fx_write_context *fx = ctx->fx;
+ struct vkd3d_bytecode_buffer *buffer;
+ uint32_t offset, elements_count = 0;
/* Resolve arrays to element type and number of elements. */
if (type->class == HLSL_CLASS_ARRAY)
@@ -1561,13 +1582,11 @@ static uint32_t write_fx_2_parameter(const struct hlsl_type *type, const char *n
type = hlsl_get_multiarray_element_type(type);
}
- name_offset = write_string(name, fx);
- semantic_offset = semantic->raw_name ? write_string(semantic->raw_name, fx) : 0;
-
- offset = put_u32(buffer, hlsl_sm1_base_type(type, is_combined_sampler));
+ buffer = &fx->unstructured;
+ offset = put_u32(buffer, hlsl_sm1_base_type(type, ctx->is_combined_sampler));
put_u32(buffer, get_fx_2_type_class(type));
- put_u32(buffer, name_offset);
- put_u32(buffer, semantic_offset);
+ *ctx->names++ = put_u32(buffer, 0);
+ *ctx->semantics++ = put_u32(buffer, 0);
put_u32(buffer, elements_count);
switch (type->class)
@@ -1592,19 +1611,68 @@ static uint32_t write_fx_2_parameter(const struct hlsl_type *type, const char *n
;
}
+ /* Save the offset of the top level type. */
+ if (!ctx->offset)
+ ctx->offset = offset;
+}
+
+static void write_fx_2_type_strings_iter(const struct hlsl_type *type, const char *name,
+ const struct hlsl_semantic *semantic, void *context)
+{
+ struct fx_2_write_type_context *ctx = context;
+ struct fx_write_context *fx = ctx->fx;
+ struct vkd3d_bytecode_buffer *buffer;
+
+ buffer = &fx->unstructured;
+ set_u32(buffer, *ctx->names++, write_string(name, fx));
+ set_u32(buffer, *ctx->semantics++, semantic->raw_name ? write_string(semantic->raw_name, fx) : 0);
+}
+
+static void foreach_type(const struct hlsl_type *type, const char *name, const struct hlsl_semantic *semantic,
+ void (*iter_func)(const struct hlsl_type *type, const char *name, const struct hlsl_semantic *semantic, void *context),
+ void *context)
+{
+ iter_func(type, name, semantic, context);
+
+ type = hlsl_get_multiarray_element_type(type);
if (type->class == HLSL_CLASS_STRUCT)
{
- for (i = 0; i < type->e.record.field_count; ++i)
+ for (size_t i = 0; i < type->e.record.field_count; ++i)
{
const struct hlsl_struct_field *field = &type->e.record.fields[i];
-
- /* Validated in check_invalid_object_fields(). */
- VKD3D_ASSERT(hlsl_is_numeric_type(field->type));
- write_fx_2_parameter(field->type, field->name, &field->semantic, false, fx);
+ foreach_type(field->type, field->name, &field->semantic, iter_func, context);
}
}
+}
- return offset;
+static uint32_t write_fx_2_parameter(const struct hlsl_ir_var *var, struct fx_write_context *fx)
+{
+ struct fx_2_write_type_context ctx = { .fx = fx, .is_combined_sampler = var->is_combined_sampler };
+ uint32_t *offsets;
+
+ /* Parameter type information has to be stored in a contiguous segment, so
+ * that any structure fields come right after each other. To achieve that
+ * the variable length string data is written after the type data. */
+
+ /* Calculate the number of string entries needed for this type. */
+ foreach_type(var->data_type, var->name, &var->semantic, count_type_iter, &ctx);
+
+ if (!(offsets = calloc(ctx.count, 2 * sizeof(*offsets))))
+ return 0;
+
+ /* Writing type information also sets string offsets. */
+ ctx.names = offsets;
+ ctx.semantics = &offsets[ctx.count];
+ foreach_type(var->data_type, var->name, &var->semantic, write_fx_2_type_iter, &ctx);
+
+ /* Now the final pass to write the string data. */
+ ctx.names = offsets;
+ ctx.semantics = &offsets[ctx.count];
+ foreach_type(var->data_type, var->name, &var->semantic, write_fx_2_type_strings_iter, &ctx);
+
+ free(offsets);
+
+ return ctx.offset;
}
static void write_fx_2_technique(struct hlsl_ir_var *var, struct fx_write_context *fx)
@@ -1876,7 +1944,7 @@ static void write_fx_2_parameters(struct fx_write_context *fx)
if (!is_type_supported_fx_2(ctx, var->data_type, &var->loc))
continue;
- desc_offset = write_fx_2_parameter(var->data_type, var->name, &var->semantic, var->is_combined_sampler, fx);
+ desc_offset = write_fx_2_parameter(var, fx);
value_offset = write_fx_2_initial_value(var, fx);
flags = 0;
@@ -1899,7 +1967,7 @@ static void write_fx_2_annotation(struct hlsl_ir_var *var, struct fx_write_conte
struct vkd3d_bytecode_buffer *buffer = &fx->structured;
uint32_t desc_offset, value_offset;
- desc_offset = write_fx_2_parameter(var->data_type, var->name, &var->semantic, var->is_combined_sampler, fx);
+ desc_offset = write_fx_2_parameter(var, fx);
value_offset = write_fx_2_initial_value(var, fx);
put_u32(buffer, desc_offset);
diff --git a/libs/vkd3d/libs/vkd3d-shader/hlsl_codegen.c b/libs/vkd3d/libs/vkd3d-shader/hlsl_codegen.c
index f8f5f65517b..e9d3d2ec8dd 100644
--- a/libs/vkd3d/libs/vkd3d-shader/hlsl_codegen.c
+++ b/libs/vkd3d/libs/vkd3d-shader/hlsl_codegen.c
@@ -3919,7 +3919,7 @@ static bool lower_separate_samples(struct hlsl_ctx *ctx, struct hlsl_ir_node *in
if (load->texel_offset.node)
{
hlsl_error(ctx, &instr->loc, VKD3D_SHADER_ERROR_HLSL_INCOMPATIBLE_PROFILE,
- "Texel offsets are not supported on profiles lower than 4.0.\n");
+ "Texel offsets are not supported on profiles lower than 4.0.");
return false;
}
diff --git a/libs/vkd3d/libs/vkd3d-shader/spirv.c b/libs/vkd3d/libs/vkd3d-shader/spirv.c
index 1f967c22406..a6f34703c2d 100644
--- a/libs/vkd3d/libs/vkd3d-shader/spirv.c
+++ b/libs/vkd3d/libs/vkd3d-shader/spirv.c
@@ -4239,7 +4239,7 @@ static bool spirv_compiler_get_register_info(struct spirv_compiler *compiler,
if (!(entry = rb_get(&compiler->symbol_table, &reg_symbol)))
{
spirv_compiler_error(compiler, VKD3D_SHADER_ERROR_SPV_INVALID_REGISTER_TYPE,
- "Unrecognized register (%s).\n", debug_vkd3d_symbol(&reg_symbol));
+ "Unrecognized register (%s).", debug_vkd3d_symbol(&reg_symbol));
memset(register_info, 0, sizeof(*register_info));
return false;
}
diff --git a/libs/vkd3d/libs/vkd3d-shader/tpf.c b/libs/vkd3d/libs/vkd3d-shader/tpf.c
index 59dca87c57d..6042a76c3c4 100644
--- a/libs/vkd3d/libs/vkd3d-shader/tpf.c
+++ b/libs/vkd3d/libs/vkd3d-shader/tpf.c
@@ -1169,7 +1169,7 @@ static void shader_sm4_read_dcl_input_ps(struct vkd3d_shader_instruction *ins, u
WARN("No matching signature element for input register %u with mask %#x.\n",
dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask);
vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_DCL,
- "No matching signature element for input register %u with mask %#x.\n",
+ "No matching signature element for input register %u with mask %#x.",
dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask);
}
else
@@ -1195,7 +1195,7 @@ static void shader_sm4_read_dcl_input_ps_siv(struct vkd3d_shader_instruction *in
WARN("No matching signature element for input register %u with mask %#x.\n",
dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask);
vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_DCL,
- "No matching signature element for input register %u with mask %#x.\n",
+ "No matching signature element for input register %u with mask %#x.",
dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask);
}
else
--
2.47.2

View File

@@ -1,323 +0,0 @@
From e30c5257409bcdeb321524dc3459cb9e64165a91 Mon Sep 17 00:00:00 2001
From: Alistair Leslie-Hughes <leslie_alistair@hotmail.com>
Date: Thu, 5 Jun 2025 07:25:40 +1000
Subject: [PATCH] Updated vkd3d to f1b36edc076117970b5a6d05a924b6c4248e082f.
---
libs/vkd3d/libs/vkd3d-shader/dxil.c | 69 ++++++++++++---------
libs/vkd3d/libs/vkd3d-shader/hlsl_codegen.c | 55 +++++++++-------
libs/vkd3d/libs/vkd3d-shader/tpf.c | 36 ++++++-----
3 files changed, 91 insertions(+), 69 deletions(-)
diff --git a/libs/vkd3d/libs/vkd3d-shader/dxil.c b/libs/vkd3d/libs/vkd3d-shader/dxil.c
index c85b644df15..ff56cd6284f 100644
--- a/libs/vkd3d/libs/vkd3d-shader/dxil.c
+++ b/libs/vkd3d/libs/vkd3d-shader/dxil.c
@@ -6805,6 +6805,7 @@ static enum vkd3d_shader_opcode sm6_map_cast_op(uint64_t code, const struct sm6_
{
enum vkd3d_shader_opcode op = VKD3DSIH_INVALID;
bool from_int, to_int, from_fp, to_fp;
+ unsigned int from_width, to_width;
bool is_valid = false;
from_int = sm6_type_is_integer(from);
@@ -6828,66 +6829,58 @@ static enum vkd3d_shader_opcode sm6_map_cast_op(uint64_t code, const struct sm6_
return VKD3DSIH_INVALID;
}
- /* DXC emits minimum precision types as 16-bit. These must be emitted
- * as 32-bit in VSIR, so all width extensions to 32 bits are no-ops. */
switch (code)
{
case CAST_TRUNC:
- /* nop or min precision. TODO: native 16-bit */
- if (to->u.width == from->u.width || (to->u.width == 16 && from->u.width == 32))
- op = VKD3DSIH_NOP;
- else
- op = VKD3DSIH_UTOU;
+ op = VKD3DSIH_UTOU;
is_valid = from_int && to_int && to->u.width <= from->u.width;
break;
+
case CAST_ZEXT:
+ op = VKD3DSIH_UTOU;
+ is_valid = from_int && to_int && to->u.width >= from->u.width;
+ break;
+
case CAST_SEXT:
- /* nop or min precision. TODO: native 16-bit.
- * Extension instructions could be emitted for min precision, but in Windows
- * the AMD RX 580 simply drops such instructions, which makes sense as no
- * assumptions should be made about any behaviour which depends on bit width. */
- if (to->u.width == from->u.width || (to->u.width == 32 && from->u.width == 16))
- {
- op = VKD3DSIH_NOP;
- is_valid = from_int && to_int;
- }
- else if (to->u.width > from->u.width)
- {
- op = (code == CAST_ZEXT) ? VKD3DSIH_UTOU : VKD3DSIH_ITOI;
- VKD3D_ASSERT(from->u.width == 1 || to->u.width == 64);
- is_valid = from_int && to_int;
- }
+ op = VKD3DSIH_ITOI;
+ is_valid = from_int && to_int && to->u.width >= from->u.width;
break;
+
case CAST_FPTOUI:
op = VKD3DSIH_FTOU;
is_valid = from_fp && to_int && to->u.width > 1;
break;
+
case CAST_FPTOSI:
op = VKD3DSIH_FTOI;
is_valid = from_fp && to_int && to->u.width > 1;
break;
+
case CAST_UITOFP:
op = VKD3DSIH_UTOF;
is_valid = from_int && to_fp;
break;
+
case CAST_SITOFP:
op = VKD3DSIH_ITOF;
is_valid = from_int && to_fp;
break;
+
case CAST_FPTRUNC:
- /* TODO: native 16-bit */
- op = (from->u.width == 64) ? VKD3DSIH_DTOF : VKD3DSIH_NOP;
- is_valid = from_fp && to_fp;
+ op = VKD3DSIH_DTOF;
+ is_valid = from_fp && to_fp && to->u.width <= from->u.width;
break;
+
case CAST_FPEXT:
- /* TODO: native 16-bit */
- op = (to->u.width == 64) ? VKD3DSIH_FTOD : VKD3DSIH_NOP;
- is_valid = from_fp && to_fp;
+ op = VKD3DSIH_FTOD;
+ is_valid = from_fp && to_fp && to->u.width >= from->u.width;
break;
+
case CAST_BITCAST:
op = VKD3DSIH_MOV;
is_valid = to->u.width == from->u.width;
break;
+
default:
FIXME("Unhandled cast op %"PRIu64".\n", code);
vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_INVALID_OPERAND,
@@ -6904,6 +6897,20 @@ static enum vkd3d_shader_opcode sm6_map_cast_op(uint64_t code, const struct sm6_
return VKD3DSIH_INVALID;
}
+ /* 16-bit values are currently treated as 32-bit, because 16-bit is
+ * interpreted as a minimum precision hint in SM 6.0, and we don't handle
+ * SM > 6.0 yet. */
+ from_width = from->u.width;
+ if (from_width == 16)
+ from_width = 32;
+
+ to_width = to->u.width;
+ if (to_width == 16)
+ to_width = 32;
+
+ if (from->class == to->class && from_width == to_width)
+ op = VKD3DSIH_NOP;
+
return op;
}
@@ -6955,9 +6962,11 @@ static void sm6_parser_emit_cast(struct sm6_parser *sm6, const struct dxil_recor
instruction_dst_param_init_ssa_scalar(ins, sm6);
- /* bitcast */
+ /* VSIR bitcasts are represented by source registers with types different
+ * from the types they were written with, rather than with different types
+ * for the MOV source and destination. */
if (handler_idx == VKD3DSIH_MOV)
- src_param->reg.data_type = dst->reg.data_type;
+ src_param->reg.data_type = ins->dst[0].reg.data_type;
}
struct sm6_cmp_info
diff --git a/libs/vkd3d/libs/vkd3d-shader/hlsl_codegen.c b/libs/vkd3d/libs/vkd3d-shader/hlsl_codegen.c
index d4cd338f15a..d4e29e16b7c 100644
--- a/libs/vkd3d/libs/vkd3d-shader/hlsl_codegen.c
+++ b/libs/vkd3d/libs/vkd3d-shader/hlsl_codegen.c
@@ -12114,14 +12114,11 @@ static void sm4_generate_vsir_add_dcl_texture(struct hlsl_ctx *ctx,
bool uav)
{
enum hlsl_regset regset = uav ? HLSL_REGSET_UAVS : HLSL_REGSET_TEXTURES;
- struct vkd3d_shader_structured_resource *structured_resource;
- struct vkd3d_shader_dst_param *dst_param;
- struct vkd3d_shader_semantic *semantic;
struct vkd3d_shader_instruction *ins;
struct hlsl_type *component_type;
enum vkd3d_shader_opcode opcode;
bool multisampled;
- unsigned int i, j;
+ unsigned int i;
VKD3D_ASSERT(resource->regset == regset);
VKD3D_ASSERT(hlsl_version_lt(ctx, 5, 1) || resource->bind_count == 1);
@@ -12132,6 +12129,7 @@ static void sm4_generate_vsir_add_dcl_texture(struct hlsl_ctx *ctx,
{
unsigned int array_first = resource->index + i;
unsigned int array_last = resource->index + i; /* FIXME: array end. */
+ struct vkd3d_shader_resource *vsir_resource;
if (resource->var && !resource->var->objects_usage[regset][i].used)
continue;
@@ -12169,13 +12167,16 @@ static void sm4_generate_vsir_add_dcl_texture(struct hlsl_ctx *ctx,
ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
return;
}
- semantic = &ins->declaration.semantic;
- structured_resource = &ins->declaration.structured_resource;
- dst_param = &semantic->resource.reg;
- vsir_dst_param_init(dst_param, uav ? VKD3DSPR_UAV : VKD3DSPR_RESOURCE, VKD3D_DATA_UNUSED, 0);
- if (uav && component_type->sampler_dim == HLSL_SAMPLER_DIM_STRUCTURED_BUFFER)
- structured_resource->byte_stride = 4 * component_type->e.resource.format->reg_size[HLSL_REGSET_NUMERIC];
+ if (component_type->sampler_dim == HLSL_SAMPLER_DIM_RAW_BUFFER)
+ vsir_resource = &ins->declaration.raw_resource.resource;
+ else if (component_type->sampler_dim == HLSL_SAMPLER_DIM_STRUCTURED_BUFFER)
+ vsir_resource = &ins->declaration.structured_resource.resource;
+ else
+ vsir_resource = &ins->declaration.semantic.resource;
+
+ vsir_dst_param_init(&vsir_resource->reg, uav ? VKD3DSPR_UAV : VKD3DSPR_RESOURCE, VKD3D_DATA_UNUSED, 0);
+
if (uav && component_type->e.resource.rasteriser_ordered)
ins->flags = VKD3DSUF_RASTERISER_ORDERED_VIEW;
@@ -12189,29 +12190,35 @@ static void sm4_generate_vsir_add_dcl_texture(struct hlsl_ctx *ctx,
ctx->profile->major_version, ctx->profile->minor_version);
}
- for (j = 0; j < 4; ++j)
- semantic->resource_data_type[j] = sm4_generate_vsir_get_format_type(component_type);
+ vsir_resource->range.first = array_first;
+ vsir_resource->range.last = array_last;
+ vsir_resource->range.space = resource->space;
- semantic->resource.range.first = array_first;
- semantic->resource.range.last = array_last;
- semantic->resource.range.space = resource->space;
-
- dst_param->reg.idx[0].offset = resource->id;
- dst_param->reg.idx[1].offset = array_first;
- dst_param->reg.idx[2].offset = array_last;
- dst_param->reg.idx_count = 3;
+ vsir_resource->reg.reg.idx[0].offset = resource->id;
+ vsir_resource->reg.reg.idx[1].offset = array_first;
+ vsir_resource->reg.reg.idx[2].offset = array_last;
+ vsir_resource->reg.reg.idx_count = 3;
ins->resource_type = sm4_generate_vsir_get_resource_type(resource->component_type);
- if (resource->component_type->sampler_dim == HLSL_SAMPLER_DIM_RAW_BUFFER)
+
+ if (component_type->sampler_dim == HLSL_SAMPLER_DIM_RAW_BUFFER)
+ {
ins->raw = true;
- if (resource->component_type->sampler_dim == HLSL_SAMPLER_DIM_STRUCTURED_BUFFER)
+ }
+ else if (component_type->sampler_dim == HLSL_SAMPLER_DIM_STRUCTURED_BUFFER)
{
ins->structured = true;
ins->resource_stride = 4 * component_type->e.resource.format->reg_size[HLSL_REGSET_NUMERIC];
+ ins->declaration.structured_resource.byte_stride = ins->resource_stride;
}
+ else
+ {
+ for (unsigned int j = 0; j < 4; ++j)
+ ins->declaration.semantic.resource_data_type[j] = sm4_generate_vsir_get_format_type(component_type);
- if (multisampled)
- semantic->sample_count = component_type->sample_count;
+ if (multisampled)
+ ins->declaration.semantic.sample_count = component_type->sample_count;
+ }
}
}
diff --git a/libs/vkd3d/libs/vkd3d-shader/tpf.c b/libs/vkd3d/libs/vkd3d-shader/tpf.c
index 08bdc3e645a..ae3fa1650bf 100644
--- a/libs/vkd3d/libs/vkd3d-shader/tpf.c
+++ b/libs/vkd3d/libs/vkd3d-shader/tpf.c
@@ -3859,9 +3859,8 @@ static uint32_t pack_resource_data_type(const enum vkd3d_data_type *resource_dat
static void tpf_dcl_texture(const struct tpf_compiler *tpf, const struct vkd3d_shader_instruction *ins)
{
- const struct vkd3d_shader_structured_resource *structured_resource = &ins->declaration.structured_resource;
- const struct vkd3d_shader_semantic *semantic = &ins->declaration.semantic;
const struct vkd3d_shader_version *version = &tpf->program->shader_version;
+ const struct vkd3d_shader_resource *resource;
const struct vkd3d_sm4_opcode_info *info;
struct sm4_instruction instr = {0};
bool uav;
@@ -3875,27 +3874,38 @@ static void tpf_dcl_texture(const struct tpf_compiler *tpf, const struct vkd3d_s
instr.opcode = info->opcode;
- instr.dsts[0] = semantic->resource.reg;
- instr.dst_count = 1;
-
if (ins->opcode == VKD3DSIH_DCL || ins->opcode == VKD3DSIH_DCL_UAV_TYPED)
{
- instr.idx[0] = pack_resource_data_type(semantic->resource_data_type);
+ instr.idx[0] = pack_resource_data_type(ins->declaration.semantic.resource_data_type);
instr.idx_count = 1;
+ instr.extra_bits |= ins->declaration.semantic.sample_count << VKD3D_SM4_RESOURCE_SAMPLE_COUNT_SHIFT;
+ resource = &ins->declaration.semantic.resource;
+ }
+ else if (ins->opcode == VKD3DSIH_DCL_RESOURCE_RAW || ins->opcode == VKD3DSIH_DCL_UAV_RAW)
+ {
+ resource = &ins->declaration.raw_resource.resource;
+ }
+ else
+ {
+ instr.byte_stride = ins->declaration.structured_resource.byte_stride;
+ resource = &ins->declaration.structured_resource.resource;
}
+ instr.dsts[0] = resource->reg;
+ instr.dst_count = 1;
+
if (vkd3d_shader_ver_ge(version, 5, 1))
{
- instr.dsts[0].reg.idx[0].offset = semantic->resource.reg.reg.idx[0].offset;
- instr.dsts[0].reg.idx[1].offset = semantic->resource.range.first;
- instr.dsts[0].reg.idx[2].offset = semantic->resource.range.last;
+ instr.dsts[0].reg.idx[0].offset = resource->reg.reg.idx[0].offset;
+ instr.dsts[0].reg.idx[1].offset = resource->range.first;
+ instr.dsts[0].reg.idx[2].offset = resource->range.last;
instr.dsts[0].reg.idx_count = 3;
- instr.idx[instr.idx_count++] = semantic->resource.range.space;
+ instr.idx[instr.idx_count++] = resource->range.space;
}
else
{
- instr.dsts[0].reg.idx[0].offset = semantic->resource.range.first;
+ instr.dsts[0].reg.idx[0].offset = resource->range.first;
instr.dsts[0].reg.idx_count = 1;
}
@@ -3903,10 +3913,6 @@ static void tpf_dcl_texture(const struct tpf_compiler *tpf, const struct vkd3d_s
instr.extra_bits |= ins->flags << VKD3D_SM5_UAV_FLAGS_SHIFT;
instr.extra_bits |= (sm4_resource_dimension(ins->resource_type) << VKD3D_SM4_RESOURCE_TYPE_SHIFT);
- instr.extra_bits |= semantic->sample_count << VKD3D_SM4_RESOURCE_SAMPLE_COUNT_SHIFT;
-
- if (ins->structured)
- instr.byte_stride = structured_resource->byte_stride;
write_sm4_instruction(tpf, &instr);
}
--
2.47.2

View File

@@ -1,138 +0,0 @@
From ec08bb5bfc8d67b975516a5a2dc34e9eaf7306ae Mon Sep 17 00:00:00 2001
From: Alistair Leslie-Hughes <leslie_alistair@hotmail.com>
Date: Tue, 10 Jun 2025 07:48:09 +1000
Subject: [PATCH] Updated vkd3d to 8da518f2cd4021ef8d642bbb8050881d7ff490c1.
---
libs/vkd3d/libs/vkd3d-shader/msl.c | 45 +++++++++++++++++++++++++++++-
1 file changed, 44 insertions(+), 1 deletion(-)
diff --git a/libs/vkd3d/libs/vkd3d-shader/msl.c b/libs/vkd3d/libs/vkd3d-shader/msl.c
index 62981811ee4..b3e251eff28 100644
--- a/libs/vkd3d/libs/vkd3d-shader/msl.c
+++ b/libs/vkd3d/libs/vkd3d-shader/msl.c
@@ -382,6 +382,19 @@ static enum msl_data_type msl_print_register_name(struct vkd3d_string_buffer *bu
return MSL_DATA_UNION;
}
+ case VKD3DSPR_IDXTEMP:
+ vkd3d_string_buffer_printf(buffer, "x%u", reg->idx[0].offset);
+ msl_print_subscript(buffer, gen, reg->idx[1].rel_addr, reg->idx[1].offset);
+ return MSL_DATA_UNION;
+
+ case VKD3DSPR_SAMPLEMASK:
+ if (gen->program->shader_version.type != VKD3D_SHADER_TYPE_PIXEL)
+ msl_compiler_error(gen, VKD3D_SHADER_ERROR_MSL_INTERNAL,
+ "Internal compiler error: Unhandled sample coverage mask in shader type #%x.",
+ gen->program->shader_version.type);
+ vkd3d_string_buffer_printf(buffer, "o_mask");
+ return MSL_DATA_FLOAT;
+
default:
msl_compiler_error(gen, VKD3D_SHADER_ERROR_MSL_INTERNAL,
"Internal compiler error: Unhandled register type %#x.", reg->type);
@@ -901,6 +914,14 @@ static void msl_ret(struct msl_generator *gen, const struct vkd3d_shader_instruc
vkd3d_string_buffer_printf(gen->buffer, "return;\n");
}
+static void msl_dcl_indexable_temp(struct msl_generator *gen, const struct vkd3d_shader_instruction *ins)
+{
+ msl_print_indent(gen->buffer, gen->indent);
+ vkd3d_string_buffer_printf(gen->buffer, "vkd3d_vec4 x%u[%u];\n",
+ ins->declaration.indexable_temp.register_idx,
+ ins->declaration.indexable_temp.register_size);
+}
+
static void msl_handle_instruction(struct msl_generator *gen, const struct vkd3d_shader_instruction *ins)
{
gen->location = ins->location;
@@ -908,11 +929,15 @@ static void msl_handle_instruction(struct msl_generator *gen, const struct vkd3d
switch (ins->opcode)
{
case VKD3DSIH_ADD:
+ case VKD3DSIH_IADD:
msl_binop(gen, ins, "+");
break;
case VKD3DSIH_AND:
msl_binop(gen, ins, "&");
break;
+ case VKD3DSIH_DCL_INDEXABLE_TEMP:
+ msl_dcl_indexable_temp(gen, ins);
+ break;
case VKD3DSIH_NOP:
break;
case VKD3DSIH_DIV:
@@ -933,6 +958,7 @@ static void msl_handle_instruction(struct msl_generator *gen, const struct vkd3d
case VKD3DSIH_ENDIF:
msl_end_block(gen);
break;
+ case VKD3DSIH_EQO:
case VKD3DSIH_IEQ:
msl_relop(gen, ins, "==");
break;
@@ -949,6 +975,7 @@ static void msl_handle_instruction(struct msl_generator *gen, const struct vkd3d
msl_cast(gen, ins, "uint");
break;
case VKD3DSIH_GEO:
+ case VKD3DSIH_IGE:
msl_relop(gen, ins, ">=");
break;
case VKD3DSIH_IF:
@@ -1276,6 +1303,12 @@ static void msl_generate_output_struct_declarations(struct msl_generator *gen)
vkd3d_string_buffer_printf(buffer, "float shader_out_depth [[depth(any)]];\n");
}
+ if (bitmap_is_set(gen->program->io_dcls, VKD3DSPR_SAMPLEMASK))
+ {
+ msl_print_indent(gen->buffer, 1);
+ vkd3d_string_buffer_printf(buffer, "uint shader_out_mask [[sample_mask]];\n");
+ }
+
vkd3d_string_buffer_printf(buffer, "};\n\n");
}
@@ -1371,6 +1404,9 @@ static void msl_generate_entrypoint_epilogue(struct msl_generator *gen)
}
vkd3d_string_buffer_printf(buffer, ";\n");
}
+
+ if (bitmap_is_set(gen->program->io_dcls, VKD3DSPR_SAMPLEMASK))
+ vkd3d_string_buffer_printf(gen->buffer, " output.shader_out_mask = as_type<uint>(o_mask);\n");
}
static void msl_generate_entrypoint(struct msl_generator *gen)
@@ -1414,6 +1450,9 @@ static void msl_generate_entrypoint(struct msl_generator *gen)
vkd3d_string_buffer_printf(gen->buffer, " vkd3d_vec4 %s_in[%u];\n", gen->prefix, 32);
vkd3d_string_buffer_printf(gen->buffer, " vkd3d_vec4 %s_out[%u];\n", gen->prefix, 32);
vkd3d_string_buffer_printf(gen->buffer, " vkd3d_%s_out output;\n", gen->prefix);
+ if (bitmap_is_set(gen->program->io_dcls, VKD3DSPR_SAMPLEMASK))
+ vkd3d_string_buffer_printf(gen->buffer, " float o_mask;\n");
+ vkd3d_string_buffer_printf(gen->buffer, "\n");
msl_generate_entrypoint_prologue(gen);
@@ -1422,9 +1461,11 @@ static void msl_generate_entrypoint(struct msl_generator *gen)
vkd3d_string_buffer_printf(gen->buffer, ", vertex_id");
if (bitmap_is_set(gen->program->io_dcls, VKD3DSPR_DEPTHOUT))
vkd3d_string_buffer_printf(gen->buffer, ", output.shader_out_depth");
+ if (bitmap_is_set(gen->program->io_dcls, VKD3DSPR_SAMPLEMASK))
+ vkd3d_string_buffer_printf(gen->buffer, ", o_mask");
if (gen->program->descriptors.descriptor_count)
vkd3d_string_buffer_printf(gen->buffer, ", descriptors");
- vkd3d_string_buffer_printf(gen->buffer, ");\n");
+ vkd3d_string_buffer_printf(gen->buffer, ");\n\n");
msl_generate_entrypoint_epilogue(gen);
@@ -1486,6 +1527,8 @@ static int msl_generator_generate(struct msl_generator *gen, struct vkd3d_shader
vkd3d_string_buffer_printf(gen->buffer, ", uint vertex_id");
if (bitmap_is_set(gen->program->io_dcls, VKD3DSPR_DEPTHOUT))
vkd3d_string_buffer_printf(gen->buffer, ", thread float &o_depth");
+ if (bitmap_is_set(gen->program->io_dcls, VKD3DSPR_SAMPLEMASK))
+ vkd3d_string_buffer_printf(gen->buffer, ", thread float &o_mask");
if (gen->program->descriptors.descriptor_count)
vkd3d_string_buffer_printf(gen->buffer, ", constant descriptor *descriptors");
vkd3d_string_buffer_printf(gen->buffer, ")\n{\n");
--
2.47.2