Nikolay Sivov
f525399545
vkd3d-shader/fx: Read instruction arguments in full before printing them.
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The binary format stores destination argument after sources. Each
argument takes either 3 tokens or 5 tokens, when indexed. For simplicity
read them all first, and print destination first.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com >
2025-06-11 20:04:27 +02:00
Nikolay Sivov
d6a4084321
vkd3d-shader/fx: Use a version-neutral name for the opcode table.
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Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com >
2025-06-11 18:25:42 +02:00
Nikolay Sivov
47b9316a86
vkd3d-shader/fx: Give fxlvm-specific constants a version-neutral name.
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Those are reusable for fx_2_0 preshaders.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com >
2025-06-11 18:21:30 +02:00
Giovanni Mascellani
94cbb333f8
vkd3d-shader/dxil: Emit 16-bit ICB values as minimum precision registers.
2025-06-11 18:20:23 +02:00
Giovanni Mascellani
0b5a96d963
vkd3d-shader/dxil: Emit 16-bit SSA values as minimum precision registers.
2025-06-11 18:20:23 +02:00
Giovanni Mascellani
73940cde73
vkd3d-shader/dxil: Emit 16-bit IDXTEMP values as minimum precision registers.
2025-06-11 18:20:23 +02:00
Giovanni Mascellani
5e86d5c21b
vkd3d-shader/dxil: Emit 16-bit arrays as minimum precision types.
...
The type is not explicitly annotated as minimum precision, because
no backend currently cares about that bit anyway. We're still
relying on the fact that in SM 6.0 16-bit types are always
understood as minimum precision.
2025-06-11 18:20:20 +02:00
Giovanni Mascellani
1d780e1a6b
vkd3d-shader/dxil: Emit 16-bit CONSTANT values as minimum precision registers.
2025-06-11 18:10:12 +02:00
Henri Verbeet
7dfa9e8f81
vkd3d-shader/msl: Implement VKD3DSIH_DISCARD.
2025-06-10 17:45:06 +02:00
Henri Verbeet
f538085e41
vkd3d-shader/msl: Implement switches.
2025-06-10 17:45:06 +02:00
Henri Verbeet
79be1d3051
vkd3d-shader/msl: Implement loops.
2025-06-10 17:45:06 +02:00
Henri Verbeet
a570932b82
vkd3d-shader/msl: Implement VKD3DSIH_IMUL.
2025-06-10 17:45:06 +02:00
Henri Verbeet
a2eb3324d4
vkd3d-shader/msl: Implement VKD3DSIH_ILT.
2025-06-10 17:45:06 +02:00
Henri Verbeet
83ed825e5a
vkd3d-shader/ir: Use vsir_opcode_get_name() in vsir_program_lower_instructions().
2025-06-10 17:44:18 +02:00
Henri Verbeet
c8e6d35e17
vkd3d-shader/glsl: Use vsir_opcode_get_name() in shader_glsl_unhandled().
2025-06-10 17:44:18 +02:00
Henri Verbeet
66c0530a05
vkd3d-shader/d3dbc: Use vsir_opcode_get_name() in d3dbc_write_vsir_instruction().
2025-06-10 17:44:18 +02:00
Henri Verbeet
6a06929f6b
vkd3d-shader/d3dbc: Use vsir_opcode_get_name() in shader_sm1_get_opcode_info_from_vsir_instruction().
2025-06-10 17:44:18 +02:00
Henri Verbeet
1214359022
vkd3d-shader/ir: Introduce vsir_opcode_get_name().
2025-06-10 17:44:18 +02:00
Giovanni Mascellani
1b389f29c5
vkd3d-shader/dxil: Remove field "reg" from struct sm6_value.
...
The VSIR register is now always generated dynamically and we
don't have to carry it around.
2025-06-10 17:40:17 +02:00
Giovanni Mascellani
20d8ba7f8d
vkd3d-shader/dxil: Introduce sm6_value_get_constant_float().
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Similarly to sm6_value_get_constant_uint() and
sm6_value_get_constant_uint64().
2025-06-10 17:40:17 +02:00
Giovanni Mascellani
873043226c
vkd3d-shader/dxil: Rewrite sm6_parser_init_ssa_value() in terms of the SM6 value.
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Instead of using the VSIR register.
2025-06-10 17:40:17 +02:00
Giovanni Mascellani
59fb3a7893
vkd3d-shader/dxil: Rewrite sm6_value_is_constant_zero() in terms of the SM6 value.
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Instead of using the VSIR register.
2025-06-10 17:40:17 +02:00
Giovanni Mascellani
31e4cbba2e
vkd3d-shader/dxil: Rewrite sm6_value_get_constant_uint64() in terms of the SM6 value.
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Instead of using the VSIR register.
2025-06-10 17:40:17 +02:00
Giovanni Mascellani
2e3f99e61e
vkd3d-shader/dxil: Rewrite sm6_value_get_constant_uint() in terms of the SM6 value.
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Instead of using the VSIR register.
2025-06-10 17:40:17 +02:00
Giovanni Mascellani
f4f2617584
vkd3d-shader/dxil: Rewrite sm6_value_is_ssa() in terms of the value type.
2025-06-10 17:40:17 +02:00
