wine/vkd3d
0
0
Fork 0
mirror of https://gitlab.winehq.org/wine/vkd3d.git synced 2025-09-12 18:50:22 -07:00
Code Issues Packages Projects Releases Wiki Activity

vkd3d-shader/msl: Implement VKD3DSIH_IMUL.

Browse Source
This commit is contained in:
Henri Verbeet
2025-05-23 15:23:10 +02:00
parent a2eb3324d4
commit a570932b82
Notes: Henri Verbeet 2025-06-10 18:06:32 +02:00 
Approved-by: Giovanni Mascellani (@giomasce)
Approved-by: Henri Verbeet (@hverbeet)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1554
6 changed files with 51 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files

34
libs/vkd3d-shader/msl.c
View File

@@ -908,6 +908,37 @@ static void msl_movc(struct msl_generator *gen, const struct vkd3d_shader_instru
msl_dst_cleanup(&dst, &gen->string_buffers);
}
static void msl_mul64(struct msl_generator *gen, const struct vkd3d_shader_instruction *ins)
{
struct msl_src src[2];
struct msl_dst dst;
uint32_t mask;
if (ins->dst[0].reg.type != VKD3DSPR_NULL)
{
/* TODO: mulhi(). */
mask = msl_dst_init(&dst, gen, ins, &ins->dst[0]);
msl_print_assignment(gen, &dst, "<unhandled 64-bit multiplication>");
msl_dst_cleanup(&dst, &gen->string_buffers);
msl_compiler_error(gen, VKD3D_SHADER_ERROR_MSL_INTERNAL,
"Internal compiler error: Unhandled 64-bit integer multiplication.");
}
if (ins->dst[1].reg.type != VKD3DSPR_NULL)
{
mask = msl_dst_init(&dst, gen, ins, &ins->dst[1]);
msl_src_init(&src[0], gen, &ins->src[0], mask);
msl_src_init(&src[1], gen, &ins->src[1], mask);
msl_print_assignment(gen, &dst, "%s * %s", src[0].str->buffer, src[1].str->buffer);
msl_src_cleanup(&src[1], &gen->string_buffers);
msl_src_cleanup(&src[0], &gen->string_buffers);
msl_dst_cleanup(&dst, &gen->string_buffers);
}
}
static void msl_ret(struct msl_generator *gen, const struct vkd3d_shader_instruction *ins)
{
msl_print_indent(gen->buffer, gen->indent);
@@ -1001,6 +1032,9 @@ static void msl_handle_instruction(struct msl_generator *gen, const struct vkd3d
case VKD3DSIH_MIN:
msl_intrinsic(gen, ins, "min");
break;
case VKD3DSIH_IMUL:
msl_mul64(gen, ins);
break;
case VKD3DSIH_INE:
case VKD3DSIH_NEU:
msl_relop(gen, ins, "!=");