5115 Commits

Author SHA1 Message Date
Henri Verbeet
b143754360 vkd3d-shader/hlsl: Move sm4_get_extern_resources() to hlsl_codegen.c. 2024-12-19 21:09:32 +01:00
Henri Verbeet
0236c480e3 vkd3d-shader/hlsl: Make sm4_get_interpolation_mode() static. 2024-12-19 21:09:32 +01:00
Giovanni Mascellani
4f7eb890ef vkd3d-shader/ir: Validate OUTCONTROLPOINT source parameters. 2024-12-19 21:06:13 +01:00
Giovanni Mascellani
495e10e93b vkd3d-shader/ir: Validate INCONTROLPOINT source parameters. 2024-12-19 21:06:13 +01:00
Giovanni Mascellani
513609ef0e vkd3d-shader/ir: Validate INPUT source parameters. 2024-12-19 21:06:13 +01:00
Giovanni Mascellani
23d4bd1dae vkd3d-shader/ir: Validate PATCHCONST source parameters using a uniform helper. 2024-12-19 21:06:13 +01:00
Giovanni Mascellani
67420aa8b6 vkd3d-shader/ir: Validate OUTPUT source parameters using a uniform helper. 2024-12-19 21:06:13 +01:00
Giovanni Mascellani
7de7025750 vkd3d-shader/ir: Disallow array signature elements for normalisation levels < SM6. 2024-12-19 21:06:13 +01:00
Elizabeth Figura
d164752efc vkd3d-shader/d3dbc: Introduce d3dbc_parse_register(). 2024-12-18 17:30:16 +01:00
Elizabeth Figura
3c53293028 vkd3d-shader/ir: Separate VKD3DSPR_OUTPUT and VKD3DSPR_TEXCRDOUT.
This simplifies the IR.
2024-12-18 17:30:16 +01:00
Elizabeth Figura
8132239ed2 vkd3d-shader/ir: Separate VKD3DSPR_ADDR and VKD3DSPR_TEXTURE.
This simplifies the IR.
2024-12-18 17:30:16 +01:00
Elizabeth Figura
0df5dea653 vkd3d-shader/d3d-asm: Define register names in a table. 2024-12-18 17:30:16 +01:00
Elizabeth Figura
65f3f56f63 vkd3d-shader/d3dbc: Normalize to a single VKD3DSPR_CONST register set when reading.
We don't need VKD3DSPR_CONST2 et al in the IR, even for disassembly.
2024-12-18 17:30:16 +01:00
Elizabeth Figura
118617916a vkd3d-shader: Explicitly translate between d3dbc and vsir register types. 2024-12-18 17:30:16 +01:00
Elizabeth Figura
efe686105d vkd3d-shader/spirv: Correctly implement DTOU. 2024-12-18 17:30:16 +01:00
Elizabeth Figura
4130ce5bb9 vkd3d-shader/spirv: Correctly implement DTOI. 2024-12-18 17:30:16 +01:00
Elizabeth Figura
f416713608 vkd3d-shader/spirv: Correctly implement DTOF. 2024-12-18 17:30:16 +01:00
Francisco Casas
825784322d vkd3d-shader/ir: Properly lower texldp. 2024-12-18 17:30:15 +01:00
Francisco Casas
7cc802afd7 vkd3d-shader/ir: Properly lower texldb. 2024-12-18 17:27:43 +01:00
Francisco Casas
59df26af79 vkd3d-shader/hlsl: Lower sample lods for SM1.
For SM1 the lod bias should be in src0.w.
2024-12-18 17:27:43 +01:00
Anna (navi) Figueiredo Gomes
f09ac4959e vkd3d-shader/hlsl: Implement the GatherCmp() methods. 2024-12-18 17:27:43 +01:00
Conor McCarthy
8d479d2ea6 vkd3d-shader/dxil: Implement DX intrinsic EvalCentroid. 2024-12-18 17:27:43 +01:00
Conor McCarthy
1bb3b13c0a vkd3d-shader/dxil: Implement DX intrinsic EvalSampleIndex. 2024-12-18 17:27:43 +01:00
Giovanni Mascellani
a68fd1b0de vkd3d-shader/ir: Simplify shader_register_normalise_arrayed_addressing().
The two branches do essentially the same thing, but in different
ways and each one omitting different details. In particular there
is no need to discriminate on whether the register is a relative
address, we can just copy the NULL pointer.
2024-12-17 16:44:00 +01:00
Giovanni Mascellani
3db458697e vkd3d-shader/ir: Remove a redundant assignment.
The hull shader control point normalisation pass already ensures
that output registers in the control point phase have two
indices (the control point index and the register index).
2024-12-17 16:44:00 +01:00
Henri Verbeet
e8cc288426 vkd3d-shader/hlsl: Move CTAB generation to hlsl_codegen.c. 2024-12-17 16:42:53 +01:00
Henri Verbeet
c681673993 vkd3d-shader/d3dbc: Separate writing the comment bytecode from write_sm1_uniforms().
Consistent with how D3DXFindShaderComment() allows looking up comments
by tag. This also makes it a little easier to move CTAB generation out
of d3dbc.c.
2024-12-17 16:42:53 +01:00
Giovanni Mascellani
00538c377e vkd3d-shader/ir: Validate OUTCONTROLPOINT destination parameters. 2024-12-17 16:39:32 +01:00
Giovanni Mascellani
3dc7f322cc vkd3d-shader/ir: Validate INCONTROLPOINT destination parameters. 2024-12-17 16:39:32 +01:00
Giovanni Mascellani
7d87b4e869 vkd3d-shader/ir: Validate OUTPUT destination parameters. 2024-12-17 16:39:32 +01:00
Giovanni Mascellani
b194e5dc4e vkd3d-shader/ir: Validate PATCHCONST destination parameters using a uniform helper. 2024-12-17 16:39:32 +01:00
Giovanni Mascellani
38a5c905db vkd3d-shader/ir: Validate INPUT destination parameters using a uniform helper. 2024-12-17 16:39:32 +01:00
Giovanni Mascellani
8d4b790eb2 vkd3d-shader/ir: Represent information about I/O registers with a table.
It makes the code quite longer, but also easier to read and extend
with further properties.

A (desirable) side effect of this commit is that it is checked
whether I/O register types are legal depending on the shader type
and phase, while before that was assumed.

This commit introduces enum vsir_io_reg_type and enum vsir_phase
which shadow enum vkd3d_shader_register_type and enum
vkd3d_shader_opcode, with the goal of making the data tables
smaller.
2024-12-17 16:39:32 +01:00
Elizabeth Figura
de615609dc vkd3d-shader/d3dbc: Use struct vkd3d_shader_instruction instead of struct sm1_instruction. 2024-12-16 17:11:57 +01:00
Elizabeth Figura
77ac13e6b9 vkd3d-shader/d3dbc: Use struct vkd3d_shader_src_param instead of struct sm1_src_register. 2024-12-16 17:11:57 +01:00
Elizabeth Figura
1e43088662 vkd3d-shader/d3dbc: Use struct vkd3d_shader_dst_param instead of struct sm1_dst_register. 2024-12-16 17:11:57 +01:00
Henri Verbeet
c4f69f4d3d vkd3d-shader/hlsl: Prefer overload candidates without component count widening. 2024-12-16 17:09:40 +01:00
Henri Verbeet
64bb4150f0 vkd3d-shader/hlsl: Prefer overload candidates without component type narrowing. 2024-12-16 17:09:40 +01:00
Henri Verbeet
32d432ab5e vkd3d-shader/hlsl: Prefer overload candidates with matching component types. 2024-12-16 17:09:40 +01:00
Henri Verbeet
6b8878377f vkd3d-shader/hlsl: Prefer overload candidates with matching component type classes. 2024-12-16 17:09:40 +01:00
Henri Verbeet
63fce3062e vkd3d-shader/hlsl: Prefer overload candidates without component count narrowing. 2024-12-16 17:09:40 +01:00
Giovanni Mascellani
dd0ed989a1 vkd3d-shader/d3dbc: Normalise I/O register write masks when not disassembling.
Sometimes SM1-3 shaders contain write masks that exceed the
signature element masks. That happens because SM1-3 shaders do not
have a concept of signature and signature masks, and OTOH aren't
always able to express any given write mask.

In VSIR we don't want to deal with I/O register masks exceeding the
corresponding signature element mask or usage mask, because, for
instance, for higher shader models it can complicate dealing with
DCL_INDEX_RANGE. In order to have uniform rules for all shader
models we normalise masks coming from SM1-3 shaders.

We don't do that normalisation when disassembling, in order to
preserve the expected output.
2024-12-12 17:21:49 +01:00
Giovanni Mascellani
64126a00c3 vkd3d-shader/ir: Give more meaningful names to I/O normalisation levels.
The previous names "not normalised" and "fully normalised" have meanings
which are likely to change with time. OTOH including a description of the
normalisation level in the enumerant seems excessive. Relating
normalisation levels to shader model versions might be a reasonable
compromise.
2024-12-12 17:21:49 +01:00
Elizabeth Figura
09095403ac vkd3d-shader/hlsl: Store swizzles in vsir format.
The previous format matched sm1 and sm4, but if we're going to be feeding
everything through vsir, we want vsir's format.
2024-12-12 17:20:23 +01:00
Elizabeth Figura
474a0ac4e2 vkd3d-shader/hlsl: Use swizzle helpers in more places. 2024-12-12 17:11:53 +01:00
Elizabeth Figura
a905a78a96 vkd3d-shader/hlsl: Use a structure for matrix swizzles. 2024-12-12 17:11:27 +01:00
Elizabeth Figura
70e2148fcb vkd3d-shader/hlsl: Document matrix swizzles. 2024-12-12 16:56:52 +01:00
Victor Chiletto
ed6061dfae vkd3d-shader/hlsl: Drop the _ir_ infix from enum hlsl_loop_unroll_type. 2024-12-12 16:54:07 +01:00
Victor Chiletto
a1d995e740 vkd3d-shader/hlsl: Unroll loops with conditional jumps. 2024-12-12 16:54:04 +01:00
Victor Chiletto
351d58a95b vkd3d-shader/hlsl: Partially defer continue resolution.
We need 'for' iter blocks to be separate for loop unrolling.
2024-12-12 16:41:34 +01:00