Commit Graph

2219 Commits

Author SHA1 Message Date
Giovanni Mascellani
b7aeb5dd70 vkd3d-shader/ir: Use vsir_register_init() to initialize a register. 2023-11-09 21:15:42 +01:00
Giovanni Mascellani
a869069a48 vkd3d-shader/ir: Validate the TEMP register indices in each HS phase. 2023-11-09 21:15:40 +01:00
Giovanni Mascellani
0f4bda9c9d vkd3d-shader/ir: Keep track of hull shader phases. 2023-11-09 21:15:38 +01:00
Conor McCarthy
5768c019c1 vkd3d-shader/ir: Check the handler before changing it to NOP in remove_dead_code(). 2023-11-09 21:15:29 +01:00
Zebediah Figura
ade8899456 vkd3d-shader/hlsl: Use hlsl_types_are_equal() in func_decl_matches().
Besides reusing code, this now handles UAV types correctly.
2023-11-09 21:15:21 +01:00
Zebediah Figura
8f041fbe6f vkd3d-shader/hlsl: Return bool from compare_function_decl(). 2023-11-09 21:15:19 +01:00
Zebediah Figura
fef118555c vkd3d-shader/hlsl: Do not prioritize an exact match when looking up functions.
Native does not always do this. For example, functions whose parameters are
float and float1 always result in an "ambiguous function call" error.

This does not fix any tests, because the relevant tests previously (incorrectly)
succeeded, and now fail with:

E5017: Aborting due to not yet implemented feature: Prioritize between multiple compatible function overloads.

when they should simply fail.
2023-11-09 21:15:17 +01:00
Zebediah Figura
514d179b70 vkd3d-shader/hlsl: Do not consider scalars and 1-dimensional vectors to be equivalent in function parameters. 2023-11-09 21:15:14 +01:00
Zebediah Figura
b1c2852cd7 vkd3d-shader/hlsl: Store function overloads in a list.
The choice to store them in an rbtree was made early on. It does not seem likely
that HLSL programs would define many overloads for any of their functions, but I
suspect the idea was rather that intrinsics would be defined as plain
hlsl_ir_function_decl structures [cf. 447463e590]
and that some intrinsics that could operate on any type would therefore need
many overrides.

This is not how we deal with intrinsics, however. When the first intrinsics were
implemented I made the choice disregard this intended design, and instead match
and convert their types manually, in C. Nothing that has happened in the time
since has led me to question that choice, and in fact, the flexibility with
which we must accommodate functions has led me to believe that matching in this
way was definitely the right choice. The main other designs I see would have
been:

* define each intrinsic variant separately using existing HLSL types. Besides
  efficiency concerns (i.e. this would take more space in memory, and would take
  longer to generate each variant), the normal type-matching rules don't really
  apply to intrinsics.

  [For example: elementwise intrinsics like abs() return the same type as the
  input, including preserving the distinction between float and float1. It is
  legal to define separate HLSL overloads taking float and float1, but trying to
  invoke these functions yields an "ambiguous function call" error.]

* introduce new (semi-)generic types. This is far more code and ends up acting
  like our current scheme (with helpers) in a slightly more complex form.

So I think we can go ahead and rip out this vestige of the original design for
intrinsics.

As for why to change it: rbtrees are simply more complex to deal with, and it
seems unlikely to me that the difference is going to matter. I do not expect any
program to define large quantities of intrinsics; linked list search should be
good enough.
2023-11-09 21:15:11 +01:00
Zebediah Figura
2b59a759d5 vkd3d-shader/hlsl: Rename hlsl_get_func_decl() to hlsl_get_first_func_decl(). 2023-11-09 21:15:09 +01:00
Zebediah Figura
011e31f624 vkd3d-shader/spirv: Remove no longer used private_output_variable_array_idx array. 2023-11-09 21:15:01 +01:00
Zebediah Figura
8513f567fa vkd3d-shader/spirv: Look up builtins by vkd3d_shader_sysval_semantic.
Instead of by vkd3d_shader_input_sysval_semantic.
2023-11-09 21:14:57 +01:00
Zebediah Figura
87cb66dd43 vkd3d-shader/spirv: Simplify spirv_compiler_emit_dcl_input(). 2023-11-09 21:14:55 +01:00
Zebediah Figura
c7a7d9a18c vkd3d-shader/ir: Normalize all I/O registers to INPUT/OUTPUT/PATCHCONST.
Specifically, map COLOROUT to OUTPUT, and map INCONTROLPOINT to INPUT for domain
shaders as well as hull shaders.

Obscure the non-existent differences from the view of the backend.
2023-11-09 21:14:52 +01:00
Zebediah Figura
133e313800 vkd3d-shader/dxil: Do not use COLOROUT for PS outputs.
sm4 does not use this; only sm1 does. In following patches we will normalize it
to OUTPUT.
2023-11-09 21:14:49 +01:00
Conor McCarthy
90d178bf12 vkd3d-shader/dxil: Implement the DXIL CAST instruction. 2023-11-09 21:14:42 +01:00
Conor McCarthy
bd77cbb33f vkd3d-shader/spirv: Support double in spirv_compiler_emit_ftou(). 2023-11-09 21:14:40 +01:00
Conor McCarthy
92d546f3a2 vkd3d-shader/spirv: Support double in spirv_compiler_emit_ftoi(). 2023-11-09 21:14:37 +01:00
Conor McCarthy
169210558d vkd3d-shader/spirv: Handle unsigned result in spirv_compiler_emit_ftoi(). 2023-11-09 21:14:35 +01:00
Conor McCarthy
58ffb5d181 vkd3d-shader/spirv: Introduce integer width cast instructions.
ITOI and UTOU may cast from a bool to a 32-bit integer. Cast to a 64-bit
integer from a smaller type will be added later.
2023-11-09 21:14:32 +01:00
Conor McCarthy
7de4ac2e48 vkd3d-shader/spirv: Support bool cast in spirv_compiler_emit_alu_instruction(). 2023-11-09 21:14:30 +01:00
Conor McCarthy
5b87d6419a vkd3d-shader/spirv: Support bool logic ops in spirv_compiler_emit_alu_instruction(). 2023-11-09 21:14:27 +01:00
Conor McCarthy
b43dab50c1 vkd3d-shader/spirv: Support bitcast in spirv_compiler_emit_load_ssa_reg(). 2023-11-09 21:14:25 +01:00
Henri Verbeet
e7eec3e023 vkd3d-shader/spirv: Allow the origin of fragment coordinates to be specified.
We typically want to use lower-left in OpenGL environments when rendering to
FBOs.
2023-11-09 21:14:12 +01:00
Nikolay Sivov
4778d051df vkd3d-shader: Add constant folding for 'floor'.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-08 22:49:40 +01:00
Nikolay Sivov
634ec96b52 vkd3d-shader: Add a missing entry to instruction debug print helper.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-08 22:49:40 +01:00
Nikolay Sivov
955932fb55 vkd3d-shader: Add constant folding for 'ceil'.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-08 22:49:40 +01:00
Nikolay Sivov
9a70ae5b6a vkd3d-shader: Add support for floor() on SM1-3.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-08 22:49:40 +01:00
Nikolay Sivov
aaef82e680 vkd3d-shader: Add support for ceil() on SM1-3.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-08 22:49:40 +01:00
Nikolay Sivov
494f681bf6 vkd3d-shader/tpf: Add support for ceil().
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-08 22:49:38 +01:00
Nikolay Sivov
4284b7c522 vkd3d-shader/hlsl: Parse ceil() function.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-08 22:49:37 +01:00
Nikolay Sivov
76e42fbd21 vkd3d-shader/hlsl: Implement ternary operator for SM1.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-08 22:49:31 +01:00
Nikolay Sivov
522a0dfb56 vkd3d-shader/hlsl: Add tex2Dlod() function.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-08 22:49:26 +01:00
Zebediah Figura
852eefc01d vkd3d-shader/ir: Synthesize HS inputs with the register index and write mask of the signature element.
This pass was written as if to output normalized I/O, but it runs before the I/O
normalization pass.

Fixes: 98b5e2c6e0
2023-11-07 22:26:53 +01:00
Zebediah Figura
12240efa79 vkd3d-shader/spirv: Use register counts from the signature and shader desc. 2023-11-07 22:26:49 +01:00
Zebediah Figura
0058764f01 vkd3d-shader: Store the control point counts in struct vkd3d_shader_desc. 2023-11-07 22:26:49 +01:00
Zebediah Figura
3ff22ac5af vkd3d-shader/spirv: Use the array sizes for shader phase builtins as well. 2023-11-07 22:26:47 +01:00
Zebediah Figura
f0a6c7de1d vkd3d-shader/hlsl: Record partial allocations in allocate_range(). 2023-11-07 22:26:11 +01:00
Zebediah Figura
c683fc9402 vkd3d-shader/hlsl: Check that a partial register's mask is also available in is_range_available(). 2023-11-07 22:26:10 +01:00
Giovanni Mascellani
7d49f9637a vkd3d-shader/ir: Check that SWITCH blocks are correctly nested. 2023-11-07 22:26:05 +01:00
Giovanni Mascellani
93632fb407 vkd3d-shader/ir: Check that REP blocks are correctly nested. 2023-11-07 22:26:04 +01:00
Giovanni Mascellani
92c36615ed vkd3d-shader/ir: Check that LOOP blocks are correctly nested. 2023-11-07 22:26:03 +01:00
Giovanni Mascellani
2f7d52dba4 vkd3d-shader/ir: Check that IF blocks are correctly nested. 2023-11-07 22:26:01 +01:00
Giovanni Mascellani
0a7e200f89 vkd3d-shader/ir: Do not enfore DCL_TEMPS count for hull shaders.
Hull shaders have a different temps count for each phase, and the
parser only reports the count for the patch constant phase.
In order to properly check for temps count on hull shaders, we first
need to decode its phases.
2023-11-07 22:26:00 +01:00
Giovanni Mascellani
ca3f594ae3 vkd3d-shader/ir: Emit an ERR() on validation errors. 2023-11-07 22:25:58 +01:00
Francisco Casas
0ef25ad137 vkd3d-shader/tpf: Support relative addressing for indexable temps in SM4.
For relative addressing, the vkd3d_shader_registers must point to
another vkd3d_shader_src_param. For now, use the sm4_instruction to save
them, since the only purpose of this struct is to be used as paramter
for write_sm4_instruction.
2023-11-07 22:25:49 +01:00
Francisco Casas
281796c526 vkd3d-shader/tpf: Move sm4_register_from_node() up. 2023-11-07 22:25:48 +01:00
Francisco Casas
e10d41d799 vkd3d-shader/tpf: Support writing relative addressing indexes. 2023-11-07 22:25:47 +01:00
Francisco Casas
617a20bffc vkd3d-shader/tpf: Write register index addressing. 2023-11-07 22:25:45 +01:00
Francisco Casas
043526a9f7 vkd3d-shader/tpf: Encode dst and src registers using the same function.
This function will also be required to encode rel_addr registers.
2023-11-07 22:25:44 +01:00
Henri Verbeet
aa5380f32a vkd3d-shader/tpf: Do not write RDEF constant buffer entries for HLSL_CLASS_OBJECT variables.
RWBuffer objects would trigger a vkd3d_unreachable() in sm4_base_type().
It would be easy enough to add the required case there, but (manual,
unfortunately) tests show that we aren't supposed to write constant
buffer entries for objects in the first place, as you'd expect.

This particular path ends up being exercised by vkd3d's internal UAV
clear shaders, but unfortunately it looks like our RDEF data may have
more issues; the ability to write tests for it would seem helpful.
2023-11-06 23:09:47 +01:00
Zebediah Figura
a9f33e8657 vkd3d-shader/hlsl: Consistently use HLSL allocation functions. 2023-11-06 23:09:22 +01:00
Zebediah Figura
b9c164c1c4 vkd3d-shader/hlsl: Sort keywords.
Done with `LC_ALL=C sort -f`.
2023-11-06 23:09:20 +01:00
Zebediah Figura
7632365e60 vkd3d-shader/hlsl: Remove C++ comment lexing.
This is already handled by the preprocessor.
2023-11-06 23:09:19 +01:00
Zebediah Figura
4cfc7d44ab vkd3d-shader/hlsl: Remove some tokens from the lexer.
None of these currently have any meaning, and none of these can currently be
parsed as distinct tokens either (i.e. they will generate a syntax error
anyway).
2023-11-06 23:09:18 +01:00
Francisco Casas
98b5eb474a vkd3d-shader/tpf: Don't pass 0x4 as mask for vec4 constant src registers.
Co-authored-by: Evan Tang <etang@codeweavers.com>

Evan Tang reported that new fixmes appeared on the shader_runner when
running some of his tests after
f50d0ae2cb.

    vkd3d:652593:fixme:shader_sm4_read_src_param Unhandled mask 0x4.

The change to blame seems to be this added line in
sm4_src_from_constant_value().

    +    src->swizzle = VKD3D_SHADER_NO_SWIZZLE;

On tpf binaries the last 12 bits of each src register in an instruction
specify the swizzle, and there are 5 possible combinations:

    Dimension NONE
    -------- 00

    Dimension SCALAR
    -------- 01

    Dimension VEC4, with a 4 bit writemask:
    ---- xxxx 00 01

    Dimension VEC4, with an 8 bit swizzle:
    xx xx xx xx 01 01

    Dimension VEC4, with a 2bit scalar dimension number:
    ------ xx 10 01

So far, we have only seen src registers use 4 bit writemasks in a
single case: for vec4 constants, and it is always zero.

So we expect this:

    ---- 0000 00 01

Now, I probably wanted to initialize src->swizzle to zero when writing
constants, but VKD3D_SHADER_NO_SWIZZLE is not zero, it is actually the
default swizzle:

    11 10 01 00

And the last 4 bits (0x4) get written in the mask part, which causes
the reader to complain.
2023-11-06 23:09:10 +01:00
Conor McCarthy
749df8dec2 vkd3d-shader/dxil: Implement the DXIL BINOP instruction. 2023-11-06 23:09:03 +01:00
Conor McCarthy
3e0638148a vkd3d-shader/spirv: Support VKD3D_DATA_UINT in spirv_compiler_emit_neg().
The DXIL parser uses unsigned types even if the source code uses signed,
so unsigned values may be negated.
2023-11-06 23:09:02 +01:00
Conor McCarthy
4905d047bd vkd3d-shader/spirv: Handle the UMUL instruction. 2023-11-06 23:09:01 +01:00
Conor McCarthy
acbc80cba2 vkd3d-shader/spirv: Introduce an IDIV instruction. 2023-11-06 23:09:00 +01:00
Conor McCarthy
c8d3515d8b vkd3d-shader/spirv: Introduce an FREM instruction. 2023-11-06 23:08:58 +01:00
Giovanni Mascellani
0d4aebd2e7 vkd3d-shader: Explicitly cast vkd3d_shader_global_flags to uint64_t.
On macOS vkd3d_shader_global_flags has underlying type unsigned long,
while uint64_t is defined as unsigned long long. This difference
causes a few warnings to be raised.
2023-11-06 23:08:37 +01:00
Nikolay Sivov
31346e2cba vkd3d-shader/tpf: Fix used temp registers accounting for dcl_temps.
Otherwise we always output "dcl_temps 1" even when no temp registers were used.
2023-11-06 23:08:10 +01:00
Zebediah Figura
f05be8ff12 vkd3d-shader/spirv: No longer handle builtin array size mismatch in spirv_compiler_emit_input().
This is taken care of by prior I/O lowering. We no longer need to deal with this here.
2023-11-06 23:07:59 +01:00
Zebediah Figura
fa23165cc0 vkd3d-shader/spirv: Remove handling of VKD3DSPR_OUTCONTROLPOINT.
I/O normalization removes this register type.
2023-11-06 23:07:58 +01:00
Zebediah Figura
b73d2c978d vkd3d-shader/ir: Check for vocp usage during IR normalization.
The hull shader barrier used for this was broken by I/O normalization, since
vocp is no longer exposed to the spirv backend.

Restore this barrier by checking for vocp during normalization instead.
2023-11-06 23:07:56 +01:00
Zebediah Figura
8b42f523f2 vkd3d-shader/ir: Pass a vkd3d_shader_parser to instruction_array_normalise_io_registers(). 2023-11-06 23:07:54 +01:00
Conor McCarthy
7419f4e31d vkd3d-shader/dxil: Allow empty struct types. 2023-11-02 18:23:12 +01:00
Nikolay Sivov
dbcc4c4e40 vkd3d-shader/hlsl: Parse empty technique declarations.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-02 18:23:07 +01:00
Nikolay Sivov
53b0101a53 vkd3d-shader/hlsl: Use case-insensitive match for the "technique" keyword.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-02 18:23:06 +01:00
Nikolay Sivov
ea8ff5394c vkd3d-shader/hlsl: Add a keyword for fx_5_0 techniques.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-02 18:23:05 +01:00
Conor McCarthy
7ca6a5452a vkd3d-shader/dxil: Always apply the signature element start column to used_mask.
The used_mask value loaded from an additional tag/value pair is relative
to the start column.
2023-11-02 18:22:59 +01:00
Giovanni Mascellani
af72466db1 vkd3d-shader/ir: Validate the index of a TEMP register. 2023-11-02 18:22:52 +01:00
Giovanni Mascellani
4140b87499 vkd3d-shader/ir: Validate the DCL_TEMPS instruction. 2023-11-02 18:22:50 +01:00
Giovanni Mascellani
79fa5fd8bb vkd3d-shader/ir: Validate the register index count. 2023-11-02 18:22:49 +01:00
Giovanni Mascellani
26e4191d4b vkd3d-shader/ir: Validate the register dimension. 2023-11-02 18:22:47 +01:00
Giovanni Mascellani
f3a20be35a vkd3d-shader/ir: Validate the register data type. 2023-11-02 18:22:38 +01:00
Giovanni Mascellani
72d0f765f2 vkd3d-shader/ir: Validate the register precision. 2023-11-02 18:22:37 +01:00
Giovanni Mascellani
f3c1a15a6f vkd3d-shader/dxil: Use vsir_register_init() to initialize registers. 2023-11-02 18:22:35 +01:00
Giovanni Mascellani
2ba8c5771c vkd3d-shader: Deduplicate profile version comparison functions. 2023-11-02 18:22:35 +01:00
Giovanni Mascellani
dd96fe50e2 vkd3d-shader: Dump shaders as soon as possible.
So that they are dumped even if parsing fails, which is a circumstance
in which one likely wants to see the problematic shader.

The downside of that is that for shader types other than HLSL
the profile is not written any more in the filename. This should
not be a big problem, because in those cases the shader describes
its own type.

When dumping an HLSL shader, the id is brought in front of the profile
in the file name, in order to make it more tab-friendly: when dealing
with a directory full of shaders it's likely that the id determines
the profile, but the other way around.
2023-11-02 18:22:26 +01:00
Giovanni Mascellani
ab09c0b45b vkd3d-shader: Expose the whole profile when dumping an HLSL shader.
The profile cannot be reliably devised by analyzing the HLSL code,
so it's useful to have it included in the file name.
2023-11-02 18:22:24 +01:00
Nikolay Sivov
ecdc3f39d4 vkd3d-shader: Accept 'loop' attribute, on loops.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-01 21:47:49 +01:00
Nikolay Sivov
26784672d8 vkd3d-shader: Check loop [unroll] attribute for conflict with other attributes.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-01 21:47:49 +01:00
Conor McCarthy
589670180a vkd3d-shader/dxil: Implement the DXIL EXTRACTVAL instruction. 2023-11-01 21:47:34 +01:00
Conor McCarthy
e899b67bbf vkd3d-shader/spirv: Support scalar swizzle of vector SSA registers. 2023-11-01 21:47:33 +01:00
Conor McCarthy
43b5d73870 vkd3d-shader/dxil: Implement DX instruction CBufferLoadLegacy. 2023-11-01 21:47:32 +01:00
Conor McCarthy
3b1bbe2b0a vkd3d-shader/dxil: Implement DX instruction CreateHandle. 2023-11-01 21:47:30 +01:00
Conor McCarthy
f57d65361a vkd3d-shader/dxil: Replace register_address_init() with register_index_address_init().
Makes it much clearer which register index is being written.
2023-11-01 21:47:29 +01:00
Zebediah Figura
a66acea1b5 vkd3d-shader/spirv: Always use the sysval from the signature. 2023-10-31 21:59:40 +01:00
Zebediah Figura
eef62b95c1 vkd3d-shader/spirv: Use the interpolation mode from the signature. 2023-10-31 21:59:39 +01:00
Zebediah Figura
15b69721de vkd3d-shader/tpf: Set the interpolation mode for signature elements. 2023-10-31 21:59:38 +01:00
Zebediah Figura
6b7834d635 vkd3d-shader/d3dbc: Set the interpolation mode for signature elements. 2023-10-31 21:59:36 +01:00
Zebediah Figura
a668f1ce1c vkd3d-shader: Handle a NULL descriptor info in vkd3d_shader_scan_add_descriptor(). 2023-10-31 21:59:33 +01:00
Francisco Casas
eef2163375 vkd3d-shader/tpf: Declare indexable temps.
If var->indexable, then the variable is given a unique register number,
regardless of its lifetime.
2023-10-31 21:59:22 +01:00
Francisco Casas
83c313ecc6 vkd3d-shader/hlsl: Mark vars that require non-constant dereferences. 2023-10-31 21:59:21 +01:00
Francisco Casas
313df300ad vkd3d-shader/hlsl: Rename hlsl_deref.offset to hlsl_deref.rel_offset.
This field is now analogous to vkd3d_shader_register_index.rel_addr.

Also, it makes sense to rename it now because all the constant part of
the offset is now handled to hlsl_deref.const_offset. Consequently, it
may also be NULL now.
2023-10-31 21:59:19 +01:00
Francisco Casas
74767beaf6 vkd3d-shader/hlsl: Absorb hlsl_ir_constant deref offsets into const_offset. 2023-10-31 21:59:18 +01:00
Francisco Casas
1520f327e5 vkd3d-shader/hlsl: Express deref->offset in whole registers.
This is required to use SM4 relative addressing, because it is limited
to whole-register granularity.
2023-10-31 21:59:16 +01:00
Francisco Casas
61a17643a2 vkd3d-shader/hlsl: Split deref-offset into a node and a constant uint.
This uint will be used for the following:

- Since SM4's relative addressing (the capability of passing a register
  as an index to another register) only has whole-register granularity,
  we will need to make the offset node express the offset in
  whole-registers and specify the register component in this uint,
  otherwise we would have to add additional / and % operations in the
  output binary.

- If, after we apply constant folding and copy propagation, we determine
  that the offset is a single constant node, we can store all the offset
  in this uint constant, and remove the offset src.

  This allows DCE to remove a good bunch of the nodes previously required
  only for the offset constants, which makes the output more liteweight
  and readable, and simplifies the implementation of relative addressing
  when writing tpf in the following patches.

In dump_deref(), we use "c" to indicate components instead of whole
registers. Since now both the offset node and the offset uint are in
components a lowered deref would look like:

    var[@42c + 2c]

But, once we express the offset node in whole registers we will remove
the "c" from the node part:

    var[@22 + 3c]
2023-10-31 21:59:14 +01:00