Commit Graph

5297 Commits

Author SHA1 Message Date
Giovanni Mascellani
6743439e97 vkd3d-dxbc: Print section offsets. 2023-10-02 22:25:06 +02:00
Andrey Gusev
1006e8cbd4 vkd3d: Add ID3D12Device5 interface stub. 2023-09-28 23:13:29 +02:00
Francisco Casas
f50d0ae2cb vkd3d-shader/tpf: Store vkd3d-shader swizzles in sm4_src_register.swizzle. 2023-09-28 23:13:16 +02:00
Francisco Casas
ef9ec28eb0 vkd3d-shader/tpf: Replace sm4_dst_register with vkd3d_shader_dst_param. 2023-09-28 23:13:14 +02:00
Francisco Casas
d41d8f8771 vkd3d-shader/tpf: Rename sm4_dst_register.writemask to write_mask. 2023-09-28 23:13:12 +02:00
Henri Verbeet
5503a025d9 tests: Add some missing vkd3d_test_pop_context() calls to test_shader_instructions(). 2023-09-28 23:13:04 +02:00
Andrey Gusev
acd3ed97dc vkd3d: Add ID3D12Device4 interface stub. 2023-09-27 22:34:52 +02:00
Francisco Casas
123e399b89 vkd3d-shader/d3d-asm: Don't print offset for DEPTHOUT registers.
This register is unique and thus is not accompanied with an offset in
the native disassembler output.
2023-09-27 22:34:48 +02:00
Francisco Casas
ef1567c17b vkd3d-shader/d3d-asm: Use vkd3d_shader_register.dimension to know when to dump writemask.
This change ensures that we don't dump the writemask for registers that
have a scalar dimension.

For instance, for this shader:

    float r;

    float4 main(out float d : DEPTH) : sv_target
    {
        d = r;
        return 0;
    }

we now correctly dump

    dcl_output oDepth

instead of

    dcl_output oDepth.x
2023-09-27 22:34:47 +02:00
Francisco Casas
a358722f71 vkd3d-shader/d3d-asm: Use vkd3d_shader_register.dimension to know when to dump swizzle.
The assumption that sampler registers never have a swizzle is not
totally correct.

For instance, for the following shader:

    Texture2D tex;
    sampler sam;

    float4 main() : sv_target
    {
        return tex.GatherGreen(sam, float2(0, 0));
    }

the gather instruction is being disassembled as

  gather4_indexable(texture2d) o0.xyzw, l(0.0, 0.0, 0.0, 0.0), t0.xyzw, s0

instead of

  gather4_indexable(texture2d)(float,float,float,float) o0.xyzw, l(0.0, 0.0, 0.0, 0.0), t0.xyzw, s0.y

(notice the missing swizzle in the last parameter s0).

This is because the Gather instructions give the sampler register a vec4
dimension (and scalar swizzle type) to indicate the channel for the
gather operation.

The solution is using the new vkd3d_shader_register.dimension instead of
checking the swizzle type.
2023-09-27 22:34:46 +02:00
Martin Storsjö
e44a1927e5 include: Add an #include of d3d12sdklayers.h in vkd3d_d3d12.idl.
This matches what is done in the upstream headers; end users
including d3d12.h don't need to explicitly include d3d12sdklayers.h.

Signed-off-by: Martin Storsjö <martin@martin.st>
2023-09-27 22:34:34 +02:00
Francisco Casas
8e0fe29bfc vkd3d-shader/tpf: Replace sm4_register with vkd3d_shader_register. 2023-09-27 22:34:31 +02:00
Francisco Casas
10bbc7eda5 vkd3d-shader/tpf: Move sm4_register.mod to sm4_src_register. 2023-09-27 22:34:30 +02:00
Francisco Casas
8124ba3a54 vkd3d-shader/tpf: Put sm4_register.immconst_uint inside a union. 2023-09-27 22:34:28 +02:00
Francisco Casas
0c8b74cb39 vkd3d-shader/tpf: Turn sm4_register.dim into an enum vkd3d_shader_dimension. 2023-09-27 22:34:26 +02:00
Giovanni Mascellani
7366b5fd38 ci: Prepend an ordinal number to commits in artifacts. 2023-09-27 22:34:24 +02:00
Giovanni Mascellani
e85e2417d5 ci: Build vkd3d with MinGW too.
Nowadays vkd3d is probably most commonly used compiled as PE rather then
ELF, so it makes sense to at least ensure that compilation succeeds.
In the future it would be nice to somehow test these binaries as well.
2023-09-27 22:34:18 +02:00
Conor McCarthy
f61c853f61 vkd3d-shader/dxil: Convert into an error the warning for an unhandled instrinsic. 2023-09-26 22:07:51 +02:00
Conor McCarthy
b30b95e824 vkd3d-shader/dxil: Do not access null code blocks on failure. 2023-09-26 22:07:50 +02:00
Andrey Gusev
56cd609308 vkd3d: Add ID3D12Device3 interface stub. 2023-09-26 22:07:45 +02:00
Giovanni Mascellani
4374d45655 tests: Work around a MoltenVK bug in test_tgsm(). 2023-09-26 22:07:43 +02:00
Giovanni Mascellani
83ddfb9e8d vkd3d: Expose the image view usage to Vulkan.
This prevents a failure with MoltenVK, which is not able to
create 2D-array view for any usage other than color attachment.
2023-09-26 22:07:41 +02:00
Giovanni Mascellani
2dd4211b77 ci: Wrap complex commands in CI scripts. 2023-09-26 22:07:36 +02:00
Giovanni Mascellani
335f9fb31e ci: Build crosstests with -Wno-array-bounds. 2023-09-26 22:07:36 +02:00
Giovanni Mascellani
81da13b9e2 ci: Build crosstests in a dedicated CI job.
Mostly to avoid polluting other logs and artifacts, and also to avoid
recompiling crosstests over and over. Eventually the artifacts produced
at this stage should be run on native Windows.
2023-09-26 22:07:35 +02:00
Francisco Casas
74d79c7e45 vkd3d-shader/d3dbc: Initialize register dimension for all register types. 2023-09-26 22:07:06 +02:00
Francisco Casas
33f47c5ae9 vkd3d-shader/tpf: Parse register dimension for all register types. 2023-09-26 22:07:04 +02:00
Francisco Casas
e904660497 vkd3d-shader: Turn vkd3d_shader_register.immconst_type into vkd3d_shader_register.dimension. 2023-09-26 22:07:04 +02:00
Francisco Casas
dc35125d73 vkd3d-shader/tpf: Use vsir_register_init() in shader_sm1_parse_dst_param(). 2023-09-26 22:07:03 +02:00
Francisco Casas
51aa5a45e9 vkd3d-shader/tpf: Use vsir_register_init() in shader_sm1_parse_src_param(). 2023-09-26 22:07:02 +02:00
Francisco Casas
c1d9e776e2 vkd3d-shader/tpf: Use vsir_register_init() in shader_sm4_read_param(). 2023-09-26 22:07:01 +02:00
Francisco Casas
6f5cb219f4 vkd3d-shader/spirv: Use vsir_register_init() in spirv_compiler_emit_default_control_point_phase(). 2023-09-26 22:07:00 +02:00
Francisco Casas
81802e27d0 vkd3d-shader/spirv: Use vsir_register_init() in spirv_compiler_emit_resource_declaration(). 2023-09-26 22:06:59 +02:00
Francisco Casas
314c6e4808 vkd3d-shader/spirv: Use vsir_register_init() in spirv_compiler_emit_sampler_declaration(). 2023-09-26 22:06:58 +02:00
Francisco Casas
b2f262467f vkd3d-shader/spirv: Use vsir_register_init() in spirv_compiler_emit_dcl_immediate_constant_buffer(). 2023-09-26 22:06:56 +02:00
Francisco Casas
67f0196c33 vkd3d-shader/spirv: Use vsir_register_init() in spirv_compiler_emit_cbv_declaration(). 2023-09-26 22:06:55 +02:00
Francisco Casas
04529bc0b7 vkd3d-shader/spirv: Use vsir_register_init() in spirv_compiler_emit_dcl_indexable_temp(). 2023-09-26 22:06:54 +02:00
Francisco Casas
e174f6b413 vkd3d-shader/spirv: Use vsir_register_init() in spirv_compiler_emit_hull_shader_builtins(). 2023-09-26 22:06:53 +02:00
Francisco Casas
89d7bd7a81 vkd3d-shader/spirv: Use vsir_register_init() in spirv_compiler_get_invocation_id(). 2023-09-26 22:06:52 +02:00
Francisco Casas
5d6899888d vkd3d-shader: Rename shader_register_init() to vsir_register_init(). 2023-09-26 22:06:50 +02:00
Giovanni Mascellani
d9c8b49ea0 vkd3d-shader/ir: Remove dead code during normalisation.
The SPIR-V backend generates invalid SPIR-V code when
VSIR has dead code (except for NOPs).
2023-09-25 22:07:27 +02:00
Zebediah Figura
fcda20a8c3 vkd3d-shader/hlsl: Use lower_ir() for lower_sqrt(). 2023-09-25 22:07:23 +02:00
Zebediah Figura
496a3a2093 vkd3d-shader/hlsl: Use lower_ir() for lower_division(). 2023-09-25 22:07:22 +02:00
Zebediah Figura
ecd781e809 vkd3d-shader/hlsl: Use lower_ir() for lower_int_abs(). 2023-09-25 22:07:21 +02:00
Zebediah Figura
7944ee9bed vkd3d-shader/hlsl: Use lower_ir() for lower_casts_to_bool(). 2023-09-25 22:07:20 +02:00
Zebediah Figura
65bf6e997c vkd3d-shader/hlsl: Use lower_ir() for more passes. 2023-09-25 22:07:18 +02:00
Petrichor Park
976fd67f51 vkd3d-shader/hlsl: Implement intrinsic tan.
This commit also extends the trigonometry tests a little bit to make
sure that tan works right.
2023-09-25 22:07:13 +02:00
Conor McCarthy
6ec5e5bf54 vkd3d-shader/dxil: Implement DX instruction LoadInput. 2023-09-25 22:07:09 +02:00
Conor McCarthy
644a06dcca vkd3d-shader/dxil: Declare shader inputs. 2023-09-25 22:07:08 +02:00
Conor McCarthy
5984b4e455 vkd3d-shader/dxbc: Load input signatures also from ISG1 chunks.
When DXBC contains DXIL code it uses ISG1 signatures.
2023-09-25 22:07:06 +02:00