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vkd3d-shader/hlsl: Write SM4 constant instructions.
Signed-off-by: Zebediah Figura <zfigura@codeweavers.com> Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com> Signed-off-by: Matteo Bruni <mbruni@codeweavers.com> Signed-off-by: Alexandre Julliard <julliard@winehq.org>
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@ -277,14 +277,6 @@ XFAIL_TESTS = \
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tests/hlsl-vector-indexing.shader_test \
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tests/hlsl-vector-indexing-uniform.shader_test \
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tests/math.shader_test \
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tests/swizzle-0.shader_test \
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tests/swizzle-1.shader_test \
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tests/swizzle-2.shader_test \
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tests/swizzle-3.shader_test \
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tests/swizzle-4.shader_test \
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tests/swizzle-5.shader_test \
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tests/swizzle-6.shader_test \
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tests/swizzle-7.shader_test \
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tests/trigonometry.shader_test \
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tests/writemask-assignop-0.shader_test \
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tests/writemask-assignop-1.shader_test \
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@ -560,6 +560,7 @@ struct sm4_register
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uint32_t idx[2];
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unsigned int idx_count;
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enum vkd3d_sm4_dimension dim;
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uint32_t immconst_uint[4];
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};
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struct sm4_instruction
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@ -589,6 +590,9 @@ static unsigned int sm4_swizzle_type(enum vkd3d_sm4_register_type type)
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{
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switch (type)
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{
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case VKD3D_SM4_RT_IMMCONST:
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return VKD3D_SM4_SWIZZLE_NONE;
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case VKD3D_SM4_RT_CONSTBUFFER:
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case VKD3D_SM4_RT_INPUT:
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case VKD3D_SM4_RT_TEMP:
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@ -743,6 +747,17 @@ static void write_sm4_instruction(struct vkd3d_bytecode_buffer *buffer, const st
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for (j = 0; j < instr->srcs[i].reg.idx_count; ++j)
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put_u32(buffer, instr->srcs[i].reg.idx[j]);
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if (instr->srcs[i].reg.type == VKD3D_SM4_RT_IMMCONST)
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{
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put_u32(buffer, instr->srcs[i].reg.immconst_uint[0]);
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if (instr->srcs[i].reg.dim == VKD3D_SM4_DIMENSION_VEC4)
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{
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put_u32(buffer, instr->srcs[i].reg.immconst_uint[1]);
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put_u32(buffer, instr->srcs[i].reg.immconst_uint[2]);
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put_u32(buffer, instr->srcs[i].reg.immconst_uint[3]);
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}
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}
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}
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for (j = 0; j < instr->idx_count; ++j)
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@ -879,6 +894,30 @@ static void write_sm4_ret(struct vkd3d_bytecode_buffer *buffer)
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write_sm4_instruction(buffer, &instr);
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}
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static void write_sm4_constant(struct hlsl_ctx *ctx,
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struct vkd3d_bytecode_buffer *buffer, const struct hlsl_ir_constant *constant)
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{
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const unsigned int dimx = constant->node.data_type->dimx;
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struct sm4_instruction instr;
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unsigned int i;
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memset(&instr, 0, sizeof(instr));
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instr.opcode = VKD3D_SM4_OP_MOV;
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sm4_register_from_node(&instr.dst.reg, &instr.dst.writemask, &constant->node);
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instr.has_dst = 1;
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instr.srcs[0].reg.dim = (dimx > 1) ? VKD3D_SM4_DIMENSION_VEC4 : VKD3D_SM4_DIMENSION_SCALAR;
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instr.srcs[0].reg.type = VKD3D_SM4_RT_IMMCONST;
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instr.srcs[0].reg.idx[0] = constant->reg.id;
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instr.srcs[0].reg.idx_count = 1;
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for (i = 0; i < dimx; ++i)
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instr.srcs[0].reg.immconst_uint[i] = constant->value.u[i];
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instr.src_count = 1,
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write_sm4_instruction(buffer, &instr);
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}
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static void write_sm4_load(struct hlsl_ctx *ctx,
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struct vkd3d_bytecode_buffer *buffer, const struct hlsl_ir_load *load)
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{
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@ -1001,6 +1040,10 @@ static void write_sm4_shdr(struct hlsl_ctx *ctx,
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switch (instr->type)
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{
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case HLSL_IR_CONSTANT:
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write_sm4_constant(ctx, &buffer, hlsl_ir_constant(instr));
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break;
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case HLSL_IR_LOAD:
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write_sm4_load(ctx, &buffer, hlsl_ir_load(instr));
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break;
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