wine/vkd3d
0
0
Fork 0
mirror of https://gitlab.winehq.org/wine/vkd3d.git synced 2024-11-21 16:46:41 -08:00
Code Issues Packages Projects Releases Wiki Activity

vkd3d-shader/spirv: Handle the ORD and UNO instructions.

Browse Source
This commit is contained in:
Conor McCarthy 2024-03-05 00:39:14 +10:00 committed by Alexandre Julliard
parent f212aad0ff
commit e65055b435
Notes: Alexandre Julliard 2024-03-08 23:48:18 +01:00 
Approved-by: Giovanni Mascellani (@giomasce)
Approved-by: Henri Verbeet (@hverbeet)
Approved-by: Alexandre Julliard (@julliard)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/686
2 changed files with 38 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

37
libs/vkd3d-shader/spirv.c
View File

@ -1524,6 +1524,19 @@ static uint32_t vkd3d_spirv_build_op_logical_equal(struct vkd3d_spirv_builder *b
SpvOpLogicalEqual, result_type, operand0, operand1); SpvOpLogicalEqual, result_type, operand0, operand1);
} }
static uint32_t vkd3d_spirv_build_op_logical_or(struct vkd3d_spirv_builder *builder,
uint32_t result_type, uint32_t operand0, uint32_t operand1)
{
return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
SpvOpLogicalOr, result_type, operand0, operand1);
}
static uint32_t vkd3d_spirv_build_op_logical_not(struct vkd3d_spirv_builder *builder,
uint32_t result_type, uint32_t operand)
{
return vkd3d_spirv_build_op_tr1(builder, &builder->function_stream, SpvOpLogicalNot, result_type, operand);
}
static uint32_t vkd3d_spirv_build_op_convert_utof(struct vkd3d_spirv_builder *builder, static uint32_t vkd3d_spirv_build_op_convert_utof(struct vkd3d_spirv_builder *builder,
uint32_t result_type, uint32_t unsigned_value) uint32_t result_type, uint32_t unsigned_value)
{ {
@ -7686,6 +7699,26 @@ static void spirv_compiler_emit_comparison_instruction(struct spirv_compiler *co
spirv_compiler_emit_store_reg(compiler, &dst->reg, dst->write_mask, result_id); spirv_compiler_emit_store_reg(compiler, &dst->reg, dst->write_mask, result_id);
} }
static void spirv_compiler_emit_orderedness_instruction(struct spirv_compiler *compiler,
const struct vkd3d_shader_instruction *instruction)
{
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
const struct vkd3d_shader_dst_param *dst = instruction->dst;
const struct vkd3d_shader_src_param *src = instruction->src;
uint32_t type_id, src0_id, src1_id, val_id;
type_id = spirv_compiler_get_type_id_for_dst(compiler, dst);
src0_id = spirv_compiler_emit_load_src(compiler, &src[0], dst->write_mask);
src1_id = spirv_compiler_emit_load_src(compiler, &src[1], dst->write_mask);
/* OpOrdered and OpUnordered are only available in Kernel mode. */
src0_id = vkd3d_spirv_build_op_is_nan(builder, type_id, src0_id);
src1_id = vkd3d_spirv_build_op_is_nan(builder, type_id, src1_id);
val_id = vkd3d_spirv_build_op_logical_or(builder, type_id, src0_id, src1_id);
if (instruction->handler_idx == VKD3DSIH_ORD)
val_id = vkd3d_spirv_build_op_logical_not(builder, type_id, val_id);
spirv_compiler_emit_store_dst(compiler, dst, val_id);
}
static uint32_t spirv_compiler_emit_conditional_branch(struct spirv_compiler *compiler, static uint32_t spirv_compiler_emit_conditional_branch(struct spirv_compiler *compiler,
const struct vkd3d_shader_instruction *instruction, uint32_t target_block_id) const struct vkd3d_shader_instruction *instruction, uint32_t target_block_id)
{ {
@ -9671,6 +9704,10 @@ static int spirv_compiler_handle_instruction(struct spirv_compiler *compiler,
case VKD3DSIH_ULT: case VKD3DSIH_ULT:
spirv_compiler_emit_comparison_instruction(compiler, instruction); spirv_compiler_emit_comparison_instruction(compiler, instruction);
break; break;
case VKD3DSIH_ORD:
case VKD3DSIH_UNO:
spirv_compiler_emit_orderedness_instruction(compiler, instruction);
break;
case VKD3DSIH_BFI: case VKD3DSIH_BFI:
case VKD3DSIH_IBFE: case VKD3DSIH_IBFE:
case VKD3DSIH_UBFE: case VKD3DSIH_UBFE:

2
tests/hlsl/float-comparison.shader_test
View File

@ -40,7 +40,7 @@ float4 main() : sv_target
[test] [test]
uniform 0 float4 0.0 1.5 1.5 0.0 uniform 0 float4 0.0 1.5 1.5 0.0
todo(sm<4 | sm>=6) draw quad todo(sm<4) draw quad
% SM1-3 apparently treats '0/0' as zero. % SM1-3 apparently treats '0/0' as zero.
if(sm<4) todo probe all rgba (1010101.0, 11001100.0, 1101001.0, 11.0) if(sm<4) todo probe all rgba (1010101.0, 11001100.0, 1101001.0, 11.0)
% SM4-5 optimises away the 'not' by inverting the condition, even though this is invalid for NaN. % SM4-5 optimises away the 'not' by inverting the condition, even though this is invalid for NaN.