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vkd3d-shader/ir: Rename the "immconst_uint" field of struct vkd3d_shader_register to "immconst_u32".

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For consistency with the rest of vkd3d-shader; e.g. put_u32() and
read_u32().
This commit is contained in:
Henri Verbeet
2023-12-05 23:24:36 +01:00
committed by Alexandre Julliard
parent 78343dcf87
commit e33d3b3954
Notes: Alexandre Julliard 2024-01-03 23:08:59 +01:00 
Approved-by: Alexandre Julliard (@julliard)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/534
7 changed files with 41 additions and 41 deletions
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30
libs/vkd3d-shader/d3d_asm.c
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@ -1112,12 +1112,12 @@ static void shader_dump_register(struct vkd3d_d3d_asm_compiler *compiler, const
shader_print_float_literal(compiler, "", reg->u.immconst_float[0], ""); shader_print_float_literal(compiler, "", reg->u.immconst_float[0], "");
break; break;
case VKD3D_DATA_INT: case VKD3D_DATA_INT:
shader_print_int_literal(compiler, "", reg->u.immconst_uint[0], ""); shader_print_int_literal(compiler, "", reg->u.immconst_u32[0], "");
break; break;
case VKD3D_DATA_RESOURCE: case VKD3D_DATA_RESOURCE:
case VKD3D_DATA_SAMPLER: case VKD3D_DATA_SAMPLER:
case VKD3D_DATA_UINT: case VKD3D_DATA_UINT:
shader_print_uint_literal(compiler, "", reg->u.immconst_uint[0], ""); shader_print_uint_literal(compiler, "", reg->u.immconst_u32[0], "");
break; break;
default: default:
shader_addline(buffer, "<unhandled data type %#x>", reg->data_type); shader_addline(buffer, "<unhandled data type %#x>", reg->data_type);
@ -1135,18 +1135,18 @@ static void shader_dump_register(struct vkd3d_d3d_asm_compiler *compiler, const
shader_print_float_literal(compiler, ", ", reg->u.immconst_float[3], ""); shader_print_float_literal(compiler, ", ", reg->u.immconst_float[3], "");
break; break;
case VKD3D_DATA_INT: case VKD3D_DATA_INT:
shader_print_int_literal(compiler, "", reg->u.immconst_uint[0], ""); shader_print_int_literal(compiler, "", reg->u.immconst_u32[0], "");
shader_print_int_literal(compiler, ", ", reg->u.immconst_uint[1], ""); shader_print_int_literal(compiler, ", ", reg->u.immconst_u32[1], "");
shader_print_int_literal(compiler, ", ", reg->u.immconst_uint[2], ""); shader_print_int_literal(compiler, ", ", reg->u.immconst_u32[2], "");
shader_print_int_literal(compiler, ", ", reg->u.immconst_uint[3], ""); shader_print_int_literal(compiler, ", ", reg->u.immconst_u32[3], "");
break; break;
case VKD3D_DATA_RESOURCE: case VKD3D_DATA_RESOURCE:
case VKD3D_DATA_SAMPLER: case VKD3D_DATA_SAMPLER:
case VKD3D_DATA_UINT: case VKD3D_DATA_UINT:
shader_print_uint_literal(compiler, "", reg->u.immconst_uint[0], ""); shader_print_uint_literal(compiler, "", reg->u.immconst_u32[0], "");
shader_print_uint_literal(compiler, ", ", reg->u.immconst_uint[1], ""); shader_print_uint_literal(compiler, ", ", reg->u.immconst_u32[1], "");
shader_print_uint_literal(compiler, ", ", reg->u.immconst_uint[2], ""); shader_print_uint_literal(compiler, ", ", reg->u.immconst_u32[2], "");
shader_print_uint_literal(compiler, ", ", reg->u.immconst_uint[3], ""); shader_print_uint_literal(compiler, ", ", reg->u.immconst_u32[3], "");
break; break;
default: default:
shader_addline(buffer, "<unhandled data type %#x>", reg->data_type); shader_addline(buffer, "<unhandled data type %#x>", reg->data_type);
@ -1891,16 +1891,16 @@ static void shader_dump_instruction(struct vkd3d_d3d_asm_compiler *compiler,
case VKD3DSIH_DEFI: case VKD3DSIH_DEFI:
vkd3d_string_buffer_printf(buffer, " %si%u%s", compiler->colours.reg, vkd3d_string_buffer_printf(buffer, " %si%u%s", compiler->colours.reg,
ins->dst[0].reg.idx[0].offset, compiler->colours.reset); ins->dst[0].reg.idx[0].offset, compiler->colours.reset);
shader_print_int_literal(compiler, " = ", ins->src[0].reg.u.immconst_uint[0], ""); shader_print_int_literal(compiler, " = ", ins->src[0].reg.u.immconst_u32[0], "");
shader_print_int_literal(compiler, ", ", ins->src[0].reg.u.immconst_uint[1], ""); shader_print_int_literal(compiler, ", ", ins->src[0].reg.u.immconst_u32[1], "");
shader_print_int_literal(compiler, ", ", ins->src[0].reg.u.immconst_uint[2], ""); shader_print_int_literal(compiler, ", ", ins->src[0].reg.u.immconst_u32[2], "");
shader_print_int_literal(compiler, ", ", ins->src[0].reg.u.immconst_uint[3], ""); shader_print_int_literal(compiler, ", ", ins->src[0].reg.u.immconst_u32[3], "");
break; break;
case VKD3DSIH_DEFB: case VKD3DSIH_DEFB:
vkd3d_string_buffer_printf(buffer, " %sb%u%s", compiler->colours.reg, vkd3d_string_buffer_printf(buffer, " %sb%u%s", compiler->colours.reg,
ins->dst[0].reg.idx[0].offset, compiler->colours.reset); ins->dst[0].reg.idx[0].offset, compiler->colours.reset);
shader_print_bool_literal(compiler, " = ", ins->src[0].reg.u.immconst_uint[0], ""); shader_print_bool_literal(compiler, " = ", ins->src[0].reg.u.immconst_u32[0], "");
break; break;
default: default:

2
libs/vkd3d-shader/d3dbc.c
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@ -987,7 +987,7 @@ static void shader_sm1_read_immconst(struct vkd3d_shader_sm1_parser *sm1, const
src_param->reg.idx[2].rel_addr = NULL; src_param->reg.idx[2].rel_addr = NULL;
src_param->reg.idx_count = 0; src_param->reg.idx_count = 0;
src_param->reg.dimension = dimension; src_param->reg.dimension = dimension;
memcpy(src_param->reg.u.immconst_uint, *ptr, count * sizeof(uint32_t)); memcpy(src_param->reg.u.immconst_u32, *ptr, count * sizeof(uint32_t));
src_param->swizzle = VKD3D_SHADER_NO_SWIZZLE; src_param->swizzle = VKD3D_SHADER_NO_SWIZZLE;
src_param->modifiers = 0; src_param->modifiers = 0;

6
libs/vkd3d-shader/dxil.c
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@ -1891,7 +1891,7 @@ static unsigned int register_get_uint_value(const struct vkd3d_shader_register *
return reg->u.immconst_uint64[0]; return reg->u.immconst_uint64[0];
} }
return reg->u.immconst_uint[0]; return reg->u.immconst_u32[0];
} }
static uint64_t register_get_uint64_value(const struct vkd3d_shader_register *reg) static uint64_t register_get_uint64_value(const struct vkd3d_shader_register *reg)
@ -1902,7 +1902,7 @@ static uint64_t register_get_uint64_value(const struct vkd3d_shader_register *re
if (reg->dimension == VSIR_DIMENSION_VEC4) if (reg->dimension == VSIR_DIMENSION_VEC4)
WARN("Returning vec4.x.\n"); WARN("Returning vec4.x.\n");
return (reg->type == VKD3DSPR_IMMCONST64) ? reg->u.immconst_uint64[0] : reg->u.immconst_uint[0]; return (reg->type == VKD3DSPR_IMMCONST64) ? reg->u.immconst_uint64[0] : reg->u.immconst_u32[0];
} }
static inline bool sm6_value_is_function_dcl(const struct sm6_value *value) static inline bool sm6_value_is_function_dcl(const struct sm6_value *value)
@ -2577,7 +2577,7 @@ static enum vkd3d_result sm6_parser_constants_init(struct sm6_parser *sm6, const
value = decode_rotated_signed_value(record->operands[0]); value = decode_rotated_signed_value(record->operands[0]);
if (type->u.width <= 32) if (type->u.width <= 32)
dst->u.reg.u.immconst_uint[0] = value & ((1ull << type->u.width) - 1); dst->u.reg.u.immconst_u32[0] = value & ((1ull << type->u.width) - 1);
else else
dst->u.reg.u.immconst_uint64[0] = value; dst->u.reg.u.immconst_uint64[0] = value;

6
libs/vkd3d-shader/ir.c
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@ -63,7 +63,7 @@ static void shader_instruction_eliminate_phase_instance_id(struct vkd3d_shader_i
if (shader_register_is_phase_instance_id(reg)) if (shader_register_is_phase_instance_id(reg))
{ {
vsir_register_init(reg, VKD3DSPR_IMMCONST, reg->data_type, 0); vsir_register_init(reg, VKD3DSPR_IMMCONST, reg->data_type, 0);
reg->u.immconst_uint[0] = instance_id; reg->u.immconst_u32[0] = instance_id;
continue; continue;
} }
shader_register_eliminate_phase_addressing(reg, instance_id); shader_register_eliminate_phase_addressing(reg, instance_id);
@ -1218,7 +1218,7 @@ static void shader_register_normalise_flat_constants(struct vkd3d_shader_src_par
param->reg.idx_count = 0; param->reg.idx_count = 0;
param->reg.dimension = VSIR_DIMENSION_VEC4; param->reg.dimension = VSIR_DIMENSION_VEC4;
for (j = 0; j < 4; ++j) for (j = 0; j < 4; ++j)
param->reg.u.immconst_uint[j] = normaliser->defs[i].value[j]; param->reg.u.immconst_u32[j] = normaliser->defs[i].value[j];
return; return;
} }
} }
@ -1254,7 +1254,7 @@ static enum vkd3d_result instruction_array_normalise_flat_constants(struct vkd3d
get_flat_constant_register_type((struct vkd3d_shader_register *)&ins->dst[0].reg, &def->set, &def->index); get_flat_constant_register_type((struct vkd3d_shader_register *)&ins->dst[0].reg, &def->set, &def->index);
for (j = 0; j < 4; ++j) for (j = 0; j < 4; ++j)
def->value[j] = ins->src[0].reg.u.immconst_uint[j]; def->value[j] = ins->src[0].reg.u.immconst_u32[j];
vkd3d_shader_instruction_make_nop(ins); vkd3d_shader_instruction_make_nop(ins);
} }

6
libs/vkd3d-shader/spirv.c
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@ -3697,14 +3697,14 @@ static uint32_t spirv_compiler_emit_load_constant(struct spirv_compiler *compile
if (reg->dimension == VSIR_DIMENSION_SCALAR) if (reg->dimension == VSIR_DIMENSION_SCALAR)
{ {
for (i = 0; i < component_count; ++i) for (i = 0; i < component_count; ++i)
values[i] = *reg->u.immconst_uint; values[i] = *reg->u.immconst_u32;
} }
else else
{ {
for (i = 0, j = 0; i < VKD3D_VEC4_SIZE; ++i) for (i = 0, j = 0; i < VKD3D_VEC4_SIZE; ++i)
{ {
if (write_mask & (VKD3DSP_WRITEMASK_0 << i)) if (write_mask & (VKD3DSP_WRITEMASK_0 << i))
values[j++] = reg->u.immconst_uint[vsir_swizzle_get_component(swizzle, i)]; values[j++] = reg->u.immconst_u32[vsir_swizzle_get_component(swizzle, i)];
} }
} }
@ -7829,7 +7829,7 @@ static int spirv_compiler_emit_control_flow_instruction(struct spirv_compiler *c
"The swizzle for a switch case value is not scalar."); "The swizzle for a switch case value is not scalar.");
} }
assert(src->reg.type == VKD3DSPR_IMMCONST); assert(src->reg.type == VKD3DSPR_IMMCONST);
value = *src->reg.u.immconst_uint; value = *src->reg.u.immconst_u32;
if (!vkd3d_array_reserve((void **)&cf_info->u.switch_.case_blocks, &cf_info->u.switch_.case_blocks_size, if (!vkd3d_array_reserve((void **)&cf_info->u.switch_.case_blocks, &cf_info->u.switch_.case_blocks_size,
2 * (cf_info->u.switch_.case_block_count + 1), sizeof(*cf_info->u.switch_.case_blocks))) 2 * (cf_info->u.switch_.case_block_count + 1), sizeof(*cf_info->u.switch_.case_blocks)))

30
libs/vkd3d-shader/tpf.c
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@ -1903,19 +1903,19 @@ static bool shader_sm4_read_param(struct vkd3d_shader_sm4_parser *priv, const ui
if (register_type == VKD3D_SM4_RT_IMMCONST || register_type == VKD3D_SM4_RT_IMMCONST64) if (register_type == VKD3D_SM4_RT_IMMCONST || register_type == VKD3D_SM4_RT_IMMCONST64)
{ {
unsigned int dword_count; unsigned int u32_count;
switch (param->dimension) switch (param->dimension)
{ {
case VSIR_DIMENSION_SCALAR: case VSIR_DIMENSION_SCALAR:
dword_count = 1 + (register_type == VKD3D_SM4_RT_IMMCONST64); u32_count = 1 + (register_type == VKD3D_SM4_RT_IMMCONST64);
if (end - *ptr < dword_count) if (end - *ptr < u32_count)
{ {
WARN("Invalid ptr %p, end %p.\n", *ptr, end); WARN("Invalid ptr %p, end %p.\n", *ptr, end);
return false; return false;
} }
memcpy(param->u.immconst_uint, *ptr, dword_count * sizeof(DWORD)); memcpy(param->u.immconst_u32, *ptr, u32_count * sizeof(uint32_t));
*ptr += dword_count; *ptr += u32_count;
break; break;
case VSIR_DIMENSION_VEC4: case VSIR_DIMENSION_VEC4:
@ -1924,7 +1924,7 @@ static bool shader_sm4_read_param(struct vkd3d_shader_sm4_parser *priv, const ui
WARN("Invalid ptr %p, end %p.\n", *ptr, end); WARN("Invalid ptr %p, end %p.\n", *ptr, end);
return false; return false;
} }
memcpy(param->u.immconst_uint, *ptr, VKD3D_VEC4_SIZE * sizeof(DWORD)); memcpy(param->u.immconst_u32, *ptr, VKD3D_VEC4_SIZE * sizeof(uint32_t));
*ptr += 4; *ptr += 4;
break; break;
@ -3870,7 +3870,7 @@ static void sm4_src_from_constant_value(struct vkd3d_shader_src_param *src,
if (width == 1) if (width == 1)
{ {
src->reg.dimension = VSIR_DIMENSION_SCALAR; src->reg.dimension = VSIR_DIMENSION_SCALAR;
src->reg.u.immconst_uint[0] = value->u[0].u; src->reg.u.immconst_u32[0] = value->u[0].u;
} }
else else
{ {
@ -3880,9 +3880,9 @@ static void sm4_src_from_constant_value(struct vkd3d_shader_src_param *src,
for (i = 0; i < 4; ++i) for (i = 0; i < 4; ++i)
{ {
if ((map_writemask & (1u << i)) && (j < width)) if ((map_writemask & (1u << i)) && (j < width))
src->reg.u.immconst_uint[i] = value->u[j++].u; src->reg.u.immconst_u32[i] = value->u[j++].u;
else else
src->reg.u.immconst_uint[i] = 0; src->reg.u.immconst_u32[i] = 0;
} }
} }
} }
@ -4077,12 +4077,12 @@ static void sm4_write_src_register(const struct tpf_writer *tpf, const struct vk
if (src->reg.type == VKD3DSPR_IMMCONST) if (src->reg.type == VKD3DSPR_IMMCONST)
{ {
put_u32(buffer, src->reg.u.immconst_uint[0]); put_u32(buffer, src->reg.u.immconst_u32[0]);
if (src->reg.dimension == VSIR_DIMENSION_VEC4) if (src->reg.dimension == VSIR_DIMENSION_VEC4)
{ {
put_u32(buffer, src->reg.u.immconst_uint[1]); put_u32(buffer, src->reg.u.immconst_u32[1]);
put_u32(buffer, src->reg.u.immconst_uint[2]); put_u32(buffer, src->reg.u.immconst_u32[2]);
put_u32(buffer, src->reg.u.immconst_uint[3]); put_u32(buffer, src->reg.u.immconst_u32[3]);
} }
} }
} }
@ -4617,7 +4617,7 @@ static void write_sm4_ld(const struct tpf_writer *tpf, const struct hlsl_ir_node
memset(&instr.srcs[2], 0, sizeof(instr.srcs[2])); memset(&instr.srcs[2], 0, sizeof(instr.srcs[2]));
reg->type = VKD3DSPR_IMMCONST; reg->type = VKD3DSPR_IMMCONST;
reg->dimension = VSIR_DIMENSION_SCALAR; reg->dimension = VSIR_DIMENSION_SCALAR;
reg->u.immconst_uint[0] = index->value.u[0].u; reg->u.immconst_u32[0] = index->value.u[0].u;
} }
else if (tpf->ctx->profile->major_version == 4 && tpf->ctx->profile->minor_version == 0) else if (tpf->ctx->profile->major_version == 4 && tpf->ctx->profile->minor_version == 0)
{ {
@ -4778,7 +4778,7 @@ static void write_sm4_cast_from_bool(const struct tpf_writer *tpf, const struct
sm4_src_from_node(tpf, &instr.srcs[0], arg, instr.dsts[0].write_mask); sm4_src_from_node(tpf, &instr.srcs[0], arg, instr.dsts[0].write_mask);
instr.srcs[1].reg.type = VKD3DSPR_IMMCONST; instr.srcs[1].reg.type = VKD3DSPR_IMMCONST;
instr.srcs[1].reg.dimension = VSIR_DIMENSION_SCALAR; instr.srcs[1].reg.dimension = VSIR_DIMENSION_SCALAR;
instr.srcs[1].reg.u.immconst_uint[0] = mask; instr.srcs[1].reg.u.immconst_u32[0] = mask;
instr.src_count = 2; instr.src_count = 2;
write_sm4_instruction(tpf, &instr); write_sm4_instruction(tpf, &instr);

2
libs/vkd3d-shader/vkd3d_shader_private.h
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@ -841,7 +841,7 @@ struct vkd3d_shader_register
unsigned int alignment; unsigned int alignment;
union union
{ {
DWORD immconst_uint[VKD3D_VEC4_SIZE]; uint32_t immconst_u32[VKD3D_VEC4_SIZE];
float immconst_float[VKD3D_VEC4_SIZE]; float immconst_float[VKD3D_VEC4_SIZE];
uint64_t immconst_uint64[VKD3D_DVEC2_SIZE]; uint64_t immconst_uint64[VKD3D_DVEC2_SIZE];
double immconst_double[VKD3D_DVEC2_SIZE]; double immconst_double[VKD3D_DVEC2_SIZE];