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vkd3d-shader/ir: Remove DCL_TEMPS instructions.

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We have to do work to keep it updated across passes and we never read it.
This commit is contained in:
Giovanni Mascellani 2024-01-18 13:05:24 +01:00 committed by Alexandre Julliard
parent 4b869f73bb
commit de9725b6ba
Notes: Alexandre Julliard 2024-01-23 23:04:04 +01:00 
Approved-by: Giovanni Mascellani (@giomasce)
Approved-by: Francisco Casas (@fcasas)
Approved-by: Henri Verbeet (@hverbeet)
Approved-by: Alexandre Julliard (@julliard)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/574
2 changed files with 18 additions and 40 deletions
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57
libs/vkd3d-shader/ir.c
View File

@ -47,6 +47,19 @@ static void vkd3d_shader_instruction_make_nop(struct vkd3d_shader_instruction *i
vsir_instruction_init(ins, &location, VKD3DSIH_NOP); vsir_instruction_init(ins, &location, VKD3DSIH_NOP);
} }
static void remove_dcl_temps(struct vsir_program *program)
{
unsigned int i;
for (i = 0; i < program->instructions.count; ++i)
{
struct vkd3d_shader_instruction *ins = &program->instructions.elements[i];
if (ins->handler_idx == VKD3DSIH_DCL_TEMPS)
vkd3d_shader_instruction_make_nop(ins);
}
}
static void shader_register_eliminate_phase_addressing(struct vkd3d_shader_register *reg, static void shader_register_eliminate_phase_addressing(struct vkd3d_shader_register *reg,
unsigned int instance_id) unsigned int instance_id)
{ {
@ -154,9 +167,6 @@ struct hull_flattener
{ {
struct vkd3d_shader_instruction_array instructions; struct vkd3d_shader_instruction_array instructions;
unsigned int max_temp_count;
unsigned int temp_dcl_idx;
unsigned int instance_count; unsigned int instance_count;
unsigned int phase_body_idx; unsigned int phase_body_idx;
enum vkd3d_shader_opcode phase; enum vkd3d_shader_opcode phase;
@ -214,21 +224,6 @@ static void flattener_eliminate_phase_related_dcls(struct hull_flattener *normal
vkd3d_shader_instruction_make_nop(ins); vkd3d_shader_instruction_make_nop(ins);
return; return;
} }
else if (ins->handler_idx == VKD3DSIH_DCL_TEMPS && normaliser->phase != VKD3DSIH_INVALID)
{
/* Leave only the first temp declaration and set it to the max count later. */
if (!normaliser->max_temp_count)
{
normaliser->max_temp_count = ins->declaration.count;
normaliser->temp_dcl_idx = index;
}
else
{
normaliser->max_temp_count = max(normaliser->max_temp_count, ins->declaration.count);
vkd3d_shader_instruction_make_nop(ins);
}
return;
}
if (normaliser->phase == VKD3DSIH_INVALID || shader_instruction_is_dcl(ins)) if (normaliser->phase == VKD3DSIH_INVALID || shader_instruction_is_dcl(ins))
return; return;
@ -382,9 +377,6 @@ static enum vkd3d_result instruction_array_flatten_hull_shader_phases(struct vkd
if (flattener.phase != VKD3DSIH_INVALID) if (flattener.phase != VKD3DSIH_INVALID)
{ {
if (flattener.temp_dcl_idx)
instructions->elements[flattener.temp_dcl_idx].declaration.count = flattener.max_temp_count;
if (!shader_instruction_array_reserve(&flattener.instructions, flattener.instructions.count + 1)) if (!shader_instruction_array_reserve(&flattener.instructions, flattener.instructions.count + 1))
return VKD3D_ERROR_OUT_OF_MEMORY; return VKD3D_ERROR_OUT_OF_MEMORY;
vsir_instruction_init(&instructions->elements[instructions->count++], &flattener.last_ret_location, VKD3DSIH_RET); vsir_instruction_init(&instructions->elements[instructions->count++], &flattener.last_ret_location, VKD3DSIH_RET);
@ -581,9 +573,6 @@ struct io_normaliser
struct shader_signature *output_signature; struct shader_signature *output_signature;
struct shader_signature *patch_constant_signature; struct shader_signature *patch_constant_signature;
unsigned int max_temp_count;
unsigned int temp_dcl_idx;
unsigned int instance_count; unsigned int instance_count;
unsigned int phase_body_idx; unsigned int phase_body_idx;
enum vkd3d_shader_opcode phase; enum vkd3d_shader_opcode phase;
@ -2257,6 +2246,8 @@ enum vkd3d_result vkd3d_shader_normalise(struct vkd3d_shader_parser *parser,
struct vkd3d_shader_instruction_array *instructions = &parser->program.instructions; struct vkd3d_shader_instruction_array *instructions = &parser->program.instructions;
enum vkd3d_result result = VKD3D_OK; enum vkd3d_result result = VKD3D_OK;
remove_dcl_temps(&parser->program);
if (!parser->shader_desc.is_dxil) if (!parser->shader_desc.is_dxil)
{ {
if (parser->program.shader_version.type != VKD3D_SHADER_TYPE_PIXEL) if (parser->program.shader_version.type != VKD3D_SHADER_TYPE_PIXEL)
@ -2309,7 +2300,6 @@ struct validation_context
size_t instruction_idx; size_t instruction_idx;
bool invalid_instruction_idx; bool invalid_instruction_idx;
bool dcl_temps_found; bool dcl_temps_found;
unsigned int temp_count;
enum vkd3d_shader_opcode phase; enum vkd3d_shader_opcode phase;
enum cf_type enum cf_type
{ {
@ -2371,11 +2361,7 @@ static void vsir_validate_src_param(struct validation_context *ctx,
static void vsir_validate_register(struct validation_context *ctx, static void vsir_validate_register(struct validation_context *ctx,
const struct vkd3d_shader_register *reg) const struct vkd3d_shader_register *reg)
{ {
unsigned int i, temp_count = ctx->temp_count; unsigned int i;
/* SM1-3 shaders do not include a DCL_TEMPS instruction. */
if (ctx->program->shader_version.major <= 3)
temp_count = ctx->program->temp_count;
if (reg->type >= VKD3DSPR_COUNT) if (reg->type >= VKD3DSPR_COUNT)
validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_REGISTER_TYPE, "Invalid register type %#x.", validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_REGISTER_TYPE, "Invalid register type %#x.",
@ -2420,18 +2406,13 @@ static void vsir_validate_register(struct validation_context *ctx,
if (reg->idx[0].rel_addr) if (reg->idx[0].rel_addr)
validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_INDEX, "Non-NULL relative address for a TEMP register."); validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_INDEX, "Non-NULL relative address for a TEMP register.");
if (reg->idx[0].offset >= temp_count) if (reg->idx[0].offset >= ctx->parser->program.temp_count)
{ {
validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_INDEX, "TEMP register index %u exceeds the maximum count %u.", validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_INDEX, "TEMP register index %u exceeds the maximum count %u.",
reg->idx[0].offset, temp_count); reg->idx[0].offset, ctx->parser->program.temp_count);
break; break;
} }
/* program->temp_count might be smaller then temp_count if the
* parser made a mistake; we still don't want to overflow the
* array. */
if (reg->idx[0].offset >= ctx->program->temp_count)
break;
data = &ctx->temps[reg->idx[0].offset]; data = &ctx->temps[reg->idx[0].offset];
if (reg->dimension == VSIR_DIMENSION_NONE) if (reg->dimension == VSIR_DIMENSION_NONE)
@ -2784,7 +2765,6 @@ static void vsir_validate_instruction(struct validation_context *ctx)
instruction->handler_idx); instruction->handler_idx);
ctx->phase = instruction->handler_idx; ctx->phase = instruction->handler_idx;
ctx->dcl_temps_found = false; ctx->dcl_temps_found = false;
ctx->temp_count = 0;
return; return;
default: default:
@ -2852,7 +2832,6 @@ static void vsir_validate_instruction(struct validation_context *ctx)
"Invalid DCL_TEMPS count %u, expected at most %u.", "Invalid DCL_TEMPS count %u, expected at most %u.",
instruction->declaration.count, ctx->program->temp_count); instruction->declaration.count, ctx->program->temp_count);
ctx->dcl_temps_found = true; ctx->dcl_temps_found = true;
ctx->temp_count = instruction->declaration.count;
break; break;
case VKD3DSIH_IF: case VKD3DSIH_IF:

1
libs/vkd3d-shader/spirv.c
View File

@ -9635,7 +9635,6 @@ static int spirv_compiler_handle_instruction(struct spirv_compiler *compiler,
case VKD3DSIH_DCL_RESOURCE_RAW: case VKD3DSIH_DCL_RESOURCE_RAW:
case VKD3DSIH_DCL_RESOURCE_STRUCTURED: case VKD3DSIH_DCL_RESOURCE_STRUCTURED:
case VKD3DSIH_DCL_SAMPLER: case VKD3DSIH_DCL_SAMPLER:
case VKD3DSIH_DCL_TEMPS:
case VKD3DSIH_DCL_UAV_RAW: case VKD3DSIH_DCL_UAV_RAW:
case VKD3DSIH_DCL_UAV_STRUCTURED: case VKD3DSIH_DCL_UAV_STRUCTURED:
case VKD3DSIH_DCL_UAV_TYPED: case VKD3DSIH_DCL_UAV_TYPED: