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vkd3d-shader/dxil: Implement DX intrinsics WaveActiveOp and WavePrefixOp.
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parent
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commit
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Notes:
Alexandre Julliard
2024-05-06 22:37:06 +02:00
Approved-by: Giovanni Mascellani (@giomasce) Approved-by: Henri Verbeet (@hverbeet) Approved-by: Alexandre Julliard (@julliard) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/827
@ -334,6 +334,14 @@ static const char * const shader_opcode_names[] =
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[VKD3DSIH_WAVE_ACTIVE_BIT_XOR ] = "wave_active_bit_xor",
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[VKD3DSIH_WAVE_ALL_TRUE ] = "wave_all_true",
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[VKD3DSIH_WAVE_ANY_TRUE ] = "wave_any_true",
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[VKD3DSIH_WAVE_OP_ADD ] = "wave_op_add",
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[VKD3DSIH_WAVE_OP_IMAX ] = "wave_op_imax",
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[VKD3DSIH_WAVE_OP_IMIN ] = "wave_op_imin",
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[VKD3DSIH_WAVE_OP_MAX ] = "wave_op_max",
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[VKD3DSIH_WAVE_OP_MIN ] = "wave_op_min",
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[VKD3DSIH_WAVE_OP_MUL ] = "wave_op_mul",
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[VKD3DSIH_WAVE_OP_UMAX ] = "wave_op_umax",
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[VKD3DSIH_WAVE_OP_UMIN ] = "wave_op_umin",
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[VKD3DSIH_XOR ] = "xor",
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};
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@ -1844,6 +1852,17 @@ static void shader_dump_instruction_flags(struct vkd3d_d3d_asm_compiler *compile
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vkd3d_string_buffer_printf(buffer, "p");
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break;
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case VKD3DSIH_WAVE_OP_ADD:
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case VKD3DSIH_WAVE_OP_IMAX:
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case VKD3DSIH_WAVE_OP_IMIN:
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case VKD3DSIH_WAVE_OP_MAX:
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case VKD3DSIH_WAVE_OP_MIN:
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case VKD3DSIH_WAVE_OP_MUL:
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case VKD3DSIH_WAVE_OP_UMAX:
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case VKD3DSIH_WAVE_OP_UMIN:
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vkd3d_string_buffer_printf(&compiler->buffer, (ins->flags & VKD3DSI_WAVE_PREFIX) ? "_prefix" : "_active");
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break;
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case VKD3DSIH_ISHL:
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case VKD3DSIH_ISHR:
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case VKD3DSIH_USHR:
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@ -433,7 +433,9 @@ enum dx_intrinsic_opcode
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DX_WAVE_ALL_TRUE = 114,
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DX_WAVE_ACTIVE_ALL_EQUAL = 115,
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DX_WAVE_ACTIVE_BALLOT = 116,
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DX_WAVE_ACTIVE_OP = 119,
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DX_WAVE_ACTIVE_BIT = 120,
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DX_WAVE_PREFIX_OP = 121,
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DX_LEGACY_F32TOF16 = 130,
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DX_LEGACY_F16TOF32 = 131,
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DX_RAW_BUFFER_LOAD = 139,
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@ -542,6 +544,14 @@ enum dxil_wave_bit_op_kind
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WAVE_BIT_OP_XOR = 2,
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};
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enum dxil_wave_op_kind
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{
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WAVE_OP_ADD = 0,
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WAVE_OP_MUL = 1,
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WAVE_OP_MIN = 2,
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WAVE_OP_MAX = 3,
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};
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struct sm6_pointer_info
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{
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const struct sm6_type *type;
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@ -5973,6 +5983,57 @@ static void sm6_parser_emit_dx_wave_active_bit(struct sm6_parser *sm6, enum dx_i
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instruction_dst_param_init_ssa_scalar(ins, sm6);
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}
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static enum vkd3d_shader_opcode sm6_dx_map_wave_op(enum dxil_wave_op_kind op, bool is_signed, bool is_float,
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struct sm6_parser *sm6)
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{
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switch (op)
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{
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case WAVE_OP_ADD:
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return VKD3DSIH_WAVE_OP_ADD;
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case WAVE_OP_MUL:
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return VKD3DSIH_WAVE_OP_MUL;
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case WAVE_OP_MIN:
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if (is_float)
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return VKD3DSIH_WAVE_OP_MIN;
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return is_signed ? VKD3DSIH_WAVE_OP_IMIN : VKD3DSIH_WAVE_OP_UMIN;
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case WAVE_OP_MAX:
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if (is_float)
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return VKD3DSIH_WAVE_OP_MAX;
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return is_signed ? VKD3DSIH_WAVE_OP_IMAX : VKD3DSIH_WAVE_OP_UMAX;
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default:
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FIXME("Unhandled wave op %u.\n", op);
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vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_UNHANDLED_INTRINSIC,
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"Wave operation %u is unhandled.\n", op);
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return VKD3DSIH_INVALID;
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}
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}
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static void sm6_parser_emit_dx_wave_op(struct sm6_parser *sm6, enum dx_intrinsic_opcode op,
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const struct sm6_value **operands, struct function_emission_state *state)
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{
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struct vkd3d_shader_instruction *ins = state->ins;
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struct vkd3d_shader_src_param *src_param;
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enum vkd3d_shader_opcode opcode;
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enum dxil_wave_op_kind wave_op;
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bool is_signed;
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wave_op = sm6_value_get_constant_uint(operands[1]);
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is_signed = !sm6_value_get_constant_uint(operands[2]);
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opcode = sm6_dx_map_wave_op(wave_op, is_signed, sm6_type_is_floating_point(operands[0]->type), sm6);
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if (opcode == VKD3DSIH_INVALID)
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return;
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vsir_instruction_init(ins, &sm6->p.location, opcode);
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ins->flags = (op == DX_WAVE_PREFIX_OP) ? VKD3DSI_WAVE_PREFIX : 0;
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if (!(src_param = instruction_src_params_alloc(ins, 1, sm6)))
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return;
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src_param_init_from_value(src_param, operands[0]);
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instruction_dst_param_init_ssa_scalar(ins, sm6);
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}
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static void sm6_parser_emit_dx_wave_builtin(struct sm6_parser *sm6, enum dx_intrinsic_opcode op,
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const struct sm6_value **operands, struct function_emission_state *state)
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{
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@ -6117,10 +6178,12 @@ static const struct sm6_dx_opcode_info sm6_dx_op_table[] =
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[DX_WAVE_ACTIVE_ALL_EQUAL ] = {"1", "n", sm6_parser_emit_dx_unary},
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[DX_WAVE_ACTIVE_BALLOT ] = {"V", "1", sm6_parser_emit_dx_wave_active_ballot},
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[DX_WAVE_ACTIVE_BIT ] = {"m", "Rc", sm6_parser_emit_dx_wave_active_bit},
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[DX_WAVE_ACTIVE_OP ] = {"n", "Rcc", sm6_parser_emit_dx_wave_op},
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[DX_WAVE_ALL_TRUE ] = {"1", "1", sm6_parser_emit_dx_unary},
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[DX_WAVE_ANY_TRUE ] = {"1", "1", sm6_parser_emit_dx_unary},
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[DX_WAVE_GET_LANE_COUNT ] = {"i", "", sm6_parser_emit_dx_wave_builtin},
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[DX_WAVE_GET_LANE_INDEX ] = {"i", "", sm6_parser_emit_dx_wave_builtin},
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[DX_WAVE_PREFIX_OP ] = {"n", "Rcc", sm6_parser_emit_dx_wave_op},
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};
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static bool sm6_parser_validate_operand_type(struct sm6_parser *sm6, const struct sm6_value *value, char info_type,
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@ -534,6 +534,14 @@ enum vkd3d_shader_opcode
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VKD3DSIH_WAVE_ACTIVE_BIT_XOR,
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VKD3DSIH_WAVE_ALL_TRUE,
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VKD3DSIH_WAVE_ANY_TRUE,
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VKD3DSIH_WAVE_OP_ADD,
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VKD3DSIH_WAVE_OP_IMAX,
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VKD3DSIH_WAVE_OP_IMIN,
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VKD3DSIH_WAVE_OP_MAX,
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VKD3DSIH_WAVE_OP_MIN,
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VKD3DSIH_WAVE_OP_MUL,
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VKD3DSIH_WAVE_OP_UMAX,
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VKD3DSIH_WAVE_OP_UMIN,
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VKD3DSIH_XOR,
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VKD3DSIH_INVALID,
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@ -797,6 +805,7 @@ enum vkd3d_tessellator_domain
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#define VKD3DSI_SAMPLE_INFO_UINT 0x1
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#define VKD3DSI_SAMPLER_COMPARISON_MODE 0x1
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#define VKD3DSI_SHIFT_UNMASKED 0x1
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#define VKD3DSI_WAVE_PREFIX 0x1
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#define VKD3DSI_PRECISE_X 0x100
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#define VKD3DSI_PRECISE_Y 0x200
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