vkd3d-shader/ir: Pass a uint32_t swizzle to vkd3d_swizzle_get_component().

This commit is contained in:
Henri Verbeet 2023-12-05 23:05:40 +01:00 committed by Alexandre Julliard
parent 4ff389854c
commit 8a1de71fb1
Notes: Alexandre Julliard 2023-12-14 23:32:16 +01:00
Approved-by: Giovanni Mascellani (@giomasce)
Approved-by: Alexandre Julliard (@julliard)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/525
6 changed files with 48 additions and 49 deletions

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@ -1381,10 +1381,10 @@ static void shader_dump_src_param(struct vkd3d_d3d_asm_compiler *compiler,
if (param->reg.type != VKD3DSPR_IMMCONST && param->reg.type != VKD3DSPR_IMMCONST64 if (param->reg.type != VKD3DSPR_IMMCONST && param->reg.type != VKD3DSPR_IMMCONST64
&& param->reg.dimension == VSIR_DIMENSION_VEC4) && param->reg.dimension == VSIR_DIMENSION_VEC4)
{ {
unsigned int swizzle_x = vkd3d_swizzle_get_component(swizzle, 0); unsigned int swizzle_x = vsir_swizzle_get_component(swizzle, 0);
unsigned int swizzle_y = vkd3d_swizzle_get_component(swizzle, 1); unsigned int swizzle_y = vsir_swizzle_get_component(swizzle, 1);
unsigned int swizzle_z = vkd3d_swizzle_get_component(swizzle, 2); unsigned int swizzle_z = vsir_swizzle_get_component(swizzle, 2);
unsigned int swizzle_w = vkd3d_swizzle_get_component(swizzle, 3); unsigned int swizzle_w = vsir_swizzle_get_component(swizzle, 3);
static const char swizzle_chars[] = "xyzw"; static const char swizzle_chars[] = "xyzw";

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@ -1063,12 +1063,12 @@ static void shader_sm1_validate_instruction(struct vkd3d_shader_sm1_parser *sm1,
} }
} }
static unsigned int mask_from_swizzle(unsigned int swizzle) static unsigned int mask_from_swizzle(uint32_t swizzle)
{ {
return (1u << vkd3d_swizzle_get_component(swizzle, 0)) return (1u << vsir_swizzle_get_component(swizzle, 0))
| (1u << vkd3d_swizzle_get_component(swizzle, 1)) | (1u << vsir_swizzle_get_component(swizzle, 1))
| (1u << vkd3d_swizzle_get_component(swizzle, 2)) | (1u << vsir_swizzle_get_component(swizzle, 2))
| (1u << vkd3d_swizzle_get_component(swizzle, 3)); | (1u << vsir_swizzle_get_component(swizzle, 3));
} }
static void shader_sm1_read_instruction(struct vkd3d_shader_sm1_parser *sm1, struct vkd3d_shader_instruction *ins) static void shader_sm1_read_instruction(struct vkd3d_shader_sm1_parser *sm1, struct vkd3d_shader_instruction *ins)

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@ -1002,7 +1002,7 @@ static void shader_src_param_io_normalise(struct vkd3d_shader_src_param *src_par
id_idx = reg->idx_count - 1; id_idx = reg->idx_count - 1;
reg_idx = reg->idx[id_idx].offset; reg_idx = reg->idx[id_idx].offset;
write_mask = VKD3DSP_WRITEMASK_0 << vkd3d_swizzle_get_component(src_param->swizzle, 0); write_mask = VKD3DSP_WRITEMASK_0 << vsir_swizzle_get_component(src_param->swizzle, 0);
element_idx = shader_signature_find_element_for_reg(signature, reg_idx, write_mask); element_idx = shader_signature_find_element_for_reg(signature, reg_idx, write_mask);
e = &signature->elements[element_idx]; e = &signature->elements[element_idx];
@ -1014,7 +1014,7 @@ static void shader_src_param_io_normalise(struct vkd3d_shader_src_param *src_par
if ((component_idx = vsir_write_mask_get_component_idx(e->mask))) if ((component_idx = vsir_write_mask_get_component_idx(e->mask)))
{ {
for (i = 0; i < VKD3D_VEC4_SIZE; ++i) for (i = 0; i < VKD3D_VEC4_SIZE; ++i)
if (vkd3d_swizzle_get_component(src_param->swizzle, i)) if (vsir_swizzle_get_component(src_param->swizzle, i))
src_param->swizzle -= component_idx << VKD3D_SHADER_SWIZZLE_SHIFT(i); src_param->swizzle -= component_idx << VKD3D_SHADER_SWIZZLE_SHIFT(i);
} }
} }

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@ -3595,17 +3595,17 @@ static bool vkd3d_swizzle_is_equal(unsigned int dst_write_mask,
return vkd3d_compact_swizzle(VKD3D_SHADER_NO_SWIZZLE, dst_write_mask) == vkd3d_compact_swizzle(swizzle, write_mask); return vkd3d_compact_swizzle(VKD3D_SHADER_NO_SWIZZLE, dst_write_mask) == vkd3d_compact_swizzle(swizzle, write_mask);
} }
static bool vkd3d_swizzle_is_scalar(unsigned int swizzle) static bool vkd3d_swizzle_is_scalar(uint32_t swizzle)
{ {
unsigned int component_idx = vkd3d_swizzle_get_component(swizzle, 0); unsigned int component_idx = vsir_swizzle_get_component(swizzle, 0);
return vkd3d_swizzle_get_component(swizzle, 1) == component_idx return vsir_swizzle_get_component(swizzle, 1) == component_idx
&& vkd3d_swizzle_get_component(swizzle, 2) == component_idx && vsir_swizzle_get_component(swizzle, 2) == component_idx
&& vkd3d_swizzle_get_component(swizzle, 3) == component_idx; && vsir_swizzle_get_component(swizzle, 3) == component_idx;
} }
static uint32_t spirv_compiler_emit_swizzle(struct spirv_compiler *compiler, static uint32_t spirv_compiler_emit_swizzle(struct spirv_compiler *compiler,
uint32_t val_id, uint32_t val_write_mask, enum vkd3d_shader_component_type component_type, uint32_t val_id, uint32_t val_write_mask, enum vkd3d_shader_component_type component_type,
unsigned int swizzle, uint32_t write_mask) uint32_t swizzle, uint32_t write_mask)
{ {
unsigned int i, component_idx, component_count, val_component_count; unsigned int i, component_idx, component_count, val_component_count;
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
@ -3623,7 +3623,7 @@ static uint32_t spirv_compiler_emit_swizzle(struct spirv_compiler *compiler,
if (component_count == 1) if (component_count == 1)
{ {
component_idx = vsir_write_mask_get_component_idx(write_mask); component_idx = vsir_write_mask_get_component_idx(write_mask);
component_idx = vkd3d_swizzle_get_component(swizzle, component_idx); component_idx = vsir_swizzle_get_component(swizzle, component_idx);
component_idx -= vsir_write_mask_get_component_idx(val_write_mask); component_idx -= vsir_write_mask_get_component_idx(val_write_mask);
return vkd3d_spirv_build_op_composite_extract1(builder, type_id, val_id, component_idx); return vkd3d_spirv_build_op_composite_extract1(builder, type_id, val_id, component_idx);
} }
@ -3634,7 +3634,7 @@ static uint32_t spirv_compiler_emit_swizzle(struct spirv_compiler *compiler,
{ {
if (write_mask & (VKD3DSP_WRITEMASK_0 << i)) if (write_mask & (VKD3DSP_WRITEMASK_0 << i))
{ {
assert(VKD3DSP_WRITEMASK_0 << vkd3d_swizzle_get_component(swizzle, i) == val_write_mask); assert(VKD3DSP_WRITEMASK_0 << vsir_swizzle_get_component(swizzle, i) == val_write_mask);
components[component_idx++] = val_id; components[component_idx++] = val_id;
} }
} }
@ -3644,14 +3644,14 @@ static uint32_t spirv_compiler_emit_swizzle(struct spirv_compiler *compiler,
for (i = 0, component_idx = 0; i < VKD3D_VEC4_SIZE; ++i) for (i = 0, component_idx = 0; i < VKD3D_VEC4_SIZE; ++i)
{ {
if (write_mask & (VKD3DSP_WRITEMASK_0 << i)) if (write_mask & (VKD3DSP_WRITEMASK_0 << i))
components[component_idx++] = vkd3d_swizzle_get_component(swizzle, i); components[component_idx++] = vsir_swizzle_get_component(swizzle, i);
} }
return vkd3d_spirv_build_op_vector_shuffle(builder, return vkd3d_spirv_build_op_vector_shuffle(builder,
type_id, val_id, val_id, components, component_count); type_id, val_id, val_id, components, component_count);
} }
static uint32_t spirv_compiler_emit_vector_shuffle(struct spirv_compiler *compiler, static uint32_t spirv_compiler_emit_vector_shuffle(struct spirv_compiler *compiler,
uint32_t vector1_id, uint32_t vector2_id, unsigned int swizzle, unsigned int write_mask, uint32_t vector1_id, uint32_t vector2_id, uint32_t swizzle, uint32_t write_mask,
enum vkd3d_shader_component_type component_type, unsigned int component_count) enum vkd3d_shader_component_type component_type, unsigned int component_count)
{ {
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
@ -3664,9 +3664,9 @@ static uint32_t spirv_compiler_emit_vector_shuffle(struct spirv_compiler *compil
for (i = 0; i < component_count; ++i) for (i = 0; i < component_count; ++i)
{ {
if (write_mask & (VKD3DSP_WRITEMASK_0 << i)) if (write_mask & (VKD3DSP_WRITEMASK_0 << i))
components[i] = vkd3d_swizzle_get_component(swizzle, i); components[i] = vsir_swizzle_get_component(swizzle, i);
else else
components[i] = VKD3D_VEC4_SIZE + vkd3d_swizzle_get_component(swizzle, i); components[i] = VKD3D_VEC4_SIZE + vsir_swizzle_get_component(swizzle, i);
} }
type_id = vkd3d_spirv_get_type_id(builder, component_type, component_count); type_id = vkd3d_spirv_get_type_id(builder, component_type, component_count);
@ -3675,7 +3675,7 @@ static uint32_t spirv_compiler_emit_vector_shuffle(struct spirv_compiler *compil
} }
static uint32_t spirv_compiler_emit_load_constant(struct spirv_compiler *compiler, static uint32_t spirv_compiler_emit_load_constant(struct spirv_compiler *compiler,
const struct vkd3d_shader_register *reg, DWORD swizzle, uint32_t write_mask) const struct vkd3d_shader_register *reg, uint32_t swizzle, uint32_t write_mask)
{ {
unsigned int component_count = vsir_write_mask_component_count(write_mask); unsigned int component_count = vsir_write_mask_component_count(write_mask);
uint32_t values[VKD3D_VEC4_SIZE] = {0}; uint32_t values[VKD3D_VEC4_SIZE] = {0};
@ -3693,7 +3693,7 @@ static uint32_t spirv_compiler_emit_load_constant(struct spirv_compiler *compile
for (i = 0, j = 0; i < VKD3D_VEC4_SIZE; ++i) for (i = 0, j = 0; i < VKD3D_VEC4_SIZE; ++i)
{ {
if (write_mask & (VKD3DSP_WRITEMASK_0 << i)) if (write_mask & (VKD3DSP_WRITEMASK_0 << i))
values[j++] = reg->u.immconst_uint[vkd3d_swizzle_get_component(swizzle, i)]; values[j++] = reg->u.immconst_uint[vsir_swizzle_get_component(swizzle, i)];
} }
} }
@ -3742,7 +3742,7 @@ static uint32_t spirv_compiler_emit_load_undef(struct spirv_compiler *compiler,
} }
static uint32_t spirv_compiler_emit_load_scalar(struct spirv_compiler *compiler, static uint32_t spirv_compiler_emit_load_scalar(struct spirv_compiler *compiler,
const struct vkd3d_shader_register *reg, DWORD swizzle, uint32_t write_mask, const struct vkd3d_shader_register *reg, uint32_t swizzle, uint32_t write_mask,
const struct vkd3d_shader_register_info *reg_info) const struct vkd3d_shader_register_info *reg_info)
{ {
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
@ -3755,7 +3755,7 @@ static uint32_t spirv_compiler_emit_load_scalar(struct spirv_compiler *compiler,
assert(vsir_write_mask_component_count(write_mask) == 1); assert(vsir_write_mask_component_count(write_mask) == 1);
component_idx = vsir_write_mask_get_component_idx(write_mask); component_idx = vsir_write_mask_get_component_idx(write_mask);
component_idx = vkd3d_swizzle_get_component(swizzle, component_idx); component_idx = vsir_swizzle_get_component(swizzle, component_idx);
skipped_component_mask = ~reg_info->write_mask & ((VKD3DSP_WRITEMASK_0 << component_idx) - 1); skipped_component_mask = ~reg_info->write_mask & ((VKD3DSP_WRITEMASK_0 << component_idx) - 1);
if (skipped_component_mask) if (skipped_component_mask)
component_idx -= vsir_write_mask_component_count(skipped_component_mask); component_idx -= vsir_write_mask_component_count(skipped_component_mask);
@ -3871,7 +3871,7 @@ static void spirv_compiler_set_ssa_register_info(const struct spirv_compiler *co
static uint32_t spirv_compiler_emit_load_ssa_reg(struct spirv_compiler *compiler, static uint32_t spirv_compiler_emit_load_ssa_reg(struct spirv_compiler *compiler,
const struct vkd3d_shader_register *reg, enum vkd3d_shader_component_type component_type, const struct vkd3d_shader_register *reg, enum vkd3d_shader_component_type component_type,
unsigned int swizzle) uint32_t swizzle)
{ {
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
enum vkd3d_shader_component_type reg_component_type; enum vkd3d_shader_component_type reg_component_type;
@ -3897,7 +3897,7 @@ static uint32_t spirv_compiler_emit_load_ssa_reg(struct spirv_compiler *compiler
} }
type_id = vkd3d_spirv_get_type_id(builder, component_type, 1); type_id = vkd3d_spirv_get_type_id(builder, component_type, 1);
component_idx = vkd3d_swizzle_get_component(swizzle, 0); component_idx = vsir_swizzle_get_component(swizzle, 0);
return vkd3d_spirv_build_op_composite_extract1(builder, type_id, val_id, component_idx); return vkd3d_spirv_build_op_composite_extract1(builder, type_id, val_id, component_idx);
} }
@ -4233,7 +4233,7 @@ static void spirv_compiler_emit_store_dst_components(struct spirv_compiler *comp
static void spirv_compiler_emit_store_dst_scalar(struct spirv_compiler *compiler, static void spirv_compiler_emit_store_dst_scalar(struct spirv_compiler *compiler,
const struct vkd3d_shader_dst_param *dst, uint32_t val_id, const struct vkd3d_shader_dst_param *dst, uint32_t val_id,
enum vkd3d_shader_component_type component_type, DWORD swizzle) enum vkd3d_shader_component_type component_type, uint32_t swizzle)
{ {
unsigned int component_count = vsir_write_mask_component_count(dst->write_mask); unsigned int component_count = vsir_write_mask_component_count(dst->write_mask);
uint32_t component_ids[VKD3D_VEC4_SIZE]; uint32_t component_ids[VKD3D_VEC4_SIZE];
@ -4242,7 +4242,7 @@ static void spirv_compiler_emit_store_dst_scalar(struct spirv_compiler *compiler
component_idx = vsir_write_mask_get_component_idx(dst->write_mask); component_idx = vsir_write_mask_get_component_idx(dst->write_mask);
for (i = 0; i < component_count; ++i) for (i = 0; i < component_count; ++i)
{ {
if (vkd3d_swizzle_get_component(swizzle, component_idx + i)) if (vsir_swizzle_get_component(swizzle, component_idx + i))
ERR("Invalid swizzle %#x for scalar value, write mask %#x.\n", swizzle, dst->write_mask); ERR("Invalid swizzle %#x for scalar value, write mask %#x.\n", swizzle, dst->write_mask);
component_ids[i] = val_id; component_ids[i] = val_id;
@ -6940,7 +6940,7 @@ static void spirv_compiler_emit_mov(struct spirv_compiler *compiler,
for (i = 0; i < ARRAY_SIZE(components); ++i) for (i = 0; i < ARRAY_SIZE(components); ++i)
{ {
if (dst->write_mask & (VKD3DSP_WRITEMASK_0 << i)) if (dst->write_mask & (VKD3DSP_WRITEMASK_0 << i))
components[i] = VKD3D_VEC4_SIZE + vkd3d_swizzle_get_component(src->swizzle, i); components[i] = VKD3D_VEC4_SIZE + vsir_swizzle_get_component(src->swizzle, i);
else else
components[i] = i; components[i] = i;
} }
@ -8414,7 +8414,7 @@ static void spirv_compiler_emit_gather4(struct spirv_compiler *compiler,
} }
else else
{ {
component_idx = vkd3d_swizzle_get_component(sampler->swizzle, 0); component_idx = vsir_swizzle_get_component(sampler->swizzle, 0);
/* Nvidia driver requires signed integer type. */ /* Nvidia driver requires signed integer type. */
component_id = spirv_compiler_get_constant(compiler, component_id = spirv_compiler_get_constant(compiler,
VKD3D_SHADER_COMPONENT_INT, 1, &component_idx); VKD3D_SHADER_COMPONENT_INT, 1, &component_idx);
@ -8492,7 +8492,7 @@ static void spirv_compiler_emit_ld_raw_structured_srv_uav(struct spirv_compiler
if (!(dst->write_mask & (VKD3DSP_WRITEMASK_0 << i))) if (!(dst->write_mask & (VKD3DSP_WRITEMASK_0 << i)))
continue; continue;
component_idx = vkd3d_swizzle_get_component(resource->swizzle, i); component_idx = vsir_swizzle_get_component(resource->swizzle, i);
coordinate_id = base_coordinate_id; coordinate_id = base_coordinate_id;
if (component_idx) if (component_idx)
coordinate_id = vkd3d_spirv_build_op_iadd(builder, type_id, coordinate_id = vkd3d_spirv_build_op_iadd(builder, type_id,
@ -8524,7 +8524,7 @@ static void spirv_compiler_emit_ld_raw_structured_srv_uav(struct spirv_compiler
if (!(dst->write_mask & (VKD3DSP_WRITEMASK_0 << i))) if (!(dst->write_mask & (VKD3DSP_WRITEMASK_0 << i)))
continue; continue;
component_idx = vkd3d_swizzle_get_component(resource->swizzle, i); component_idx = vsir_swizzle_get_component(resource->swizzle, i);
coordinate_id = base_coordinate_id; coordinate_id = base_coordinate_id;
if (component_idx) if (component_idx)
coordinate_id = vkd3d_spirv_build_op_iadd(builder, type_id, coordinate_id = vkd3d_spirv_build_op_iadd(builder, type_id,
@ -8568,7 +8568,7 @@ static void spirv_compiler_emit_ld_tgsm(struct spirv_compiler *compiler,
if (!(dst->write_mask & (VKD3DSP_WRITEMASK_0 << i))) if (!(dst->write_mask & (VKD3DSP_WRITEMASK_0 << i)))
continue; continue;
component_idx = vkd3d_swizzle_get_component(resource->swizzle, i); component_idx = vsir_swizzle_get_component(resource->swizzle, i);
coordinate_id = base_coordinate_id; coordinate_id = base_coordinate_id;
if (component_idx) if (component_idx)
coordinate_id = vkd3d_spirv_build_op_iadd(builder, type_id, coordinate_id = vkd3d_spirv_build_op_iadd(builder, type_id,

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@ -1982,10 +1982,10 @@ static uint32_t swizzle_from_sm4(uint32_t s)
static uint32_t swizzle_to_sm4(uint32_t s) static uint32_t swizzle_to_sm4(uint32_t s)
{ {
uint32_t ret = 0; uint32_t ret = 0;
ret |= ((vkd3d_swizzle_get_component(s, 0)) & 0x3); ret |= ((vsir_swizzle_get_component(s, 0)) & 0x3);
ret |= ((vkd3d_swizzle_get_component(s, 1)) & 0x3) << 2; ret |= ((vsir_swizzle_get_component(s, 1)) & 0x3) << 2;
ret |= ((vkd3d_swizzle_get_component(s, 2)) & 0x3) << 4; ret |= ((vsir_swizzle_get_component(s, 2)) & 0x3) << 4;
ret |= ((vkd3d_swizzle_get_component(s, 3)) & 0x3) << 6; ret |= ((vsir_swizzle_get_component(s, 3)) & 0x3) << 6;
return ret; return ret;
} }
@ -2014,12 +2014,12 @@ static bool register_is_control_point_input(const struct vkd3d_shader_register *
|| priv->p.shader_version.type == VKD3D_SHADER_TYPE_GEOMETRY)); || priv->p.shader_version.type == VKD3D_SHADER_TYPE_GEOMETRY));
} }
static unsigned int mask_from_swizzle(unsigned int swizzle) static uint32_t mask_from_swizzle(uint32_t swizzle)
{ {
return (1u << vkd3d_swizzle_get_component(swizzle, 0)) return (1u << vsir_swizzle_get_component(swizzle, 0))
| (1u << vkd3d_swizzle_get_component(swizzle, 1)) | (1u << vsir_swizzle_get_component(swizzle, 1))
| (1u << vkd3d_swizzle_get_component(swizzle, 2)) | (1u << vsir_swizzle_get_component(swizzle, 2))
| (1u << vkd3d_swizzle_get_component(swizzle, 3)); | (1u << vsir_swizzle_get_component(swizzle, 3));
} }
static bool shader_sm4_validate_input_output_register(struct vkd3d_shader_sm4_parser *priv, static bool shader_sm4_validate_input_output_register(struct vkd3d_shader_sm4_parser *priv,

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@ -1557,8 +1557,7 @@ static inline uint32_t vsir_write_mask_32_from_64(uint32_t write_mask64)
return write_mask32 | (write_mask32 << 1); return write_mask32 | (write_mask32 << 1);
} }
static inline unsigned int vkd3d_swizzle_get_component(DWORD swizzle, static inline unsigned int vsir_swizzle_get_component(uint32_t swizzle, unsigned int idx)
unsigned int idx)
{ {
return (swizzle >> VKD3D_SHADER_SWIZZLE_SHIFT(idx)) & VKD3D_SHADER_SWIZZLE_MASK; return (swizzle >> VKD3D_SHADER_SWIZZLE_SHIFT(idx)) & VKD3D_SHADER_SWIZZLE_MASK;
} }
@ -1569,7 +1568,7 @@ static inline unsigned int vkd3d_swizzle_get_component64(DWORD swizzle,
return ((swizzle >> VKD3D_SHADER_SWIZZLE_SHIFT(idx * 2)) & VKD3D_SHADER_SWIZZLE_MASK) / 2u; return ((swizzle >> VKD3D_SHADER_SWIZZLE_SHIFT(idx * 2)) & VKD3D_SHADER_SWIZZLE_MASK) / 2u;
} }
static inline unsigned int vkd3d_compact_swizzle(unsigned int swizzle, unsigned int write_mask) static inline unsigned int vkd3d_compact_swizzle(uint32_t swizzle, uint32_t write_mask)
{ {
unsigned int i, compacted_swizzle = 0; unsigned int i, compacted_swizzle = 0;
@ -1578,7 +1577,7 @@ static inline unsigned int vkd3d_compact_swizzle(unsigned int swizzle, unsigned
if (write_mask & (VKD3DSP_WRITEMASK_0 << i)) if (write_mask & (VKD3DSP_WRITEMASK_0 << i))
{ {
compacted_swizzle <<= VKD3D_SHADER_SWIZZLE_SHIFT(1); compacted_swizzle <<= VKD3D_SHADER_SWIZZLE_SHIFT(1);
compacted_swizzle |= vkd3d_swizzle_get_component(swizzle, i); compacted_swizzle |= vsir_swizzle_get_component(swizzle, i);
} }
} }