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vkd3d-shader/d3dbc: Mark some more instructions as version-limited.
This commit is contained in:
parent
e2961a2e3c
commit
7a7dc4bf0e
Notes:
Henri Verbeet
2024-12-03 14:57:19 +01:00
Approved-by: Henri Verbeet (@hverbeet) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1292
@ -248,20 +248,20 @@ static const struct vkd3d_sm1_opcode_info vs_opcode_table[] =
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{VKD3D_SM1_OP_MAX, 1, 2, VKD3DSIH_MAX},
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{VKD3D_SM1_OP_SLT, 1, 2, VKD3DSIH_SLT},
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{VKD3D_SM1_OP_SGE, 1, 2, VKD3DSIH_SGE},
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{VKD3D_SM1_OP_ABS, 1, 1, VKD3DSIH_ABS},
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{VKD3D_SM1_OP_ABS, 1, 1, VKD3DSIH_ABS, {2, 0}},
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{VKD3D_SM1_OP_EXP, 1, 1, VKD3DSIH_EXP},
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{VKD3D_SM1_OP_LOG, 1, 1, VKD3DSIH_LOG},
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{VKD3D_SM1_OP_EXPP, 1, 1, VKD3DSIH_EXPP},
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{VKD3D_SM1_OP_LOGP, 1, 1, VKD3DSIH_LOGP},
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{VKD3D_SM1_OP_LIT, 1, 1, VKD3DSIH_LIT},
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{VKD3D_SM1_OP_DST, 1, 2, VKD3DSIH_DST},
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{VKD3D_SM1_OP_LRP, 1, 3, VKD3DSIH_LRP},
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{VKD3D_SM1_OP_LRP, 1, 3, VKD3DSIH_LRP, {2, 0}},
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{VKD3D_SM1_OP_FRC, 1, 1, VKD3DSIH_FRC},
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{VKD3D_SM1_OP_POW, 1, 2, VKD3DSIH_POW},
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{VKD3D_SM1_OP_CRS, 1, 2, VKD3DSIH_CRS},
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{VKD3D_SM1_OP_POW, 1, 2, VKD3DSIH_POW, {2, 0}},
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{VKD3D_SM1_OP_CRS, 1, 2, VKD3DSIH_CRS, {2, 0}},
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{VKD3D_SM1_OP_SGN, 1, 3, VKD3DSIH_SGN, {2, 0}, {2, 1}},
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{VKD3D_SM1_OP_SGN, 1, 1, VKD3DSIH_SGN, {3, 0}},
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{VKD3D_SM1_OP_NRM, 1, 1, VKD3DSIH_NRM,},
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{VKD3D_SM1_OP_NRM, 1, 1, VKD3DSIH_NRM, {2, 0}},
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{VKD3D_SM1_OP_SINCOS, 1, 3, VKD3DSIH_SINCOS, {2, 0}, {2, 1}},
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{VKD3D_SM1_OP_SINCOS, 1, 1, VKD3DSIH_SINCOS, {3, 0}},
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/* Matrix */
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@ -274,8 +274,8 @@ static const struct vkd3d_sm1_opcode_info vs_opcode_table[] =
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{VKD3D_SM1_OP_DCL, 0, 0, VKD3DSIH_DCL},
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/* Constant definitions */
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{VKD3D_SM1_OP_DEF, 1, 1, VKD3DSIH_DEF},
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{VKD3D_SM1_OP_DEFB, 1, 1, VKD3DSIH_DEFB},
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{VKD3D_SM1_OP_DEFI, 1, 1, VKD3DSIH_DEFI},
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{VKD3D_SM1_OP_DEFB, 1, 1, VKD3DSIH_DEFB, {2, 0}},
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{VKD3D_SM1_OP_DEFI, 1, 1, VKD3DSIH_DEFI, {2, 0}},
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/* Control flow */
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{VKD3D_SM1_OP_REP, 0, 1, VKD3DSIH_REP, {2, 0}},
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{VKD3D_SM1_OP_ENDREP, 0, 0, VKD3DSIH_ENDREP, {2, 0}},
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@ -285,7 +285,7 @@ static const struct vkd3d_sm1_opcode_info vs_opcode_table[] =
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{VKD3D_SM1_OP_ENDIF, 0, 0, VKD3DSIH_ENDIF, {2, 0}},
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{VKD3D_SM1_OP_BREAK, 0, 0, VKD3DSIH_BREAK, {2, 1}},
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{VKD3D_SM1_OP_BREAKC, 0, 2, VKD3DSIH_BREAKC, {2, 1}},
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{VKD3D_SM1_OP_BREAKP, 0, 1, VKD3DSIH_BREAKP},
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{VKD3D_SM1_OP_BREAKP, 0, 1, VKD3DSIH_BREAKP, {2, 1}},
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{VKD3D_SM1_OP_CALL, 0, 1, VKD3DSIH_CALL, {2, 0}},
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{VKD3D_SM1_OP_CALLNZ, 0, 2, VKD3DSIH_CALLNZ, {2, 0}},
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{VKD3D_SM1_OP_LOOP, 0, 2, VKD3DSIH_LOOP, {2, 0}},
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@ -293,7 +293,7 @@ static const struct vkd3d_sm1_opcode_info vs_opcode_table[] =
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{VKD3D_SM1_OP_ENDLOOP, 0, 0, VKD3DSIH_ENDLOOP, {2, 0}},
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{VKD3D_SM1_OP_LABEL, 0, 1, VKD3DSIH_LABEL, {2, 0}},
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{VKD3D_SM1_OP_SETP, 1, 2, VKD3DSIH_SETP},
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{VKD3D_SM1_OP_SETP, 1, 2, VKD3DSIH_SETP, {2, 1}},
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{VKD3D_SM1_OP_TEXLDL, 1, 2, VKD3DSIH_TEXLDL, {3, 0}},
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{0, 0, 0, VKD3DSIH_INVALID},
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};
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@ -307,42 +307,37 @@ static const struct vkd3d_sm1_opcode_info ps_opcode_table[] =
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{VKD3D_SM1_OP_SUB, 1, 2, VKD3DSIH_SUB},
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{VKD3D_SM1_OP_MAD, 1, 3, VKD3DSIH_MAD},
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{VKD3D_SM1_OP_MUL, 1, 2, VKD3DSIH_MUL},
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{VKD3D_SM1_OP_RCP, 1, 1, VKD3DSIH_RCP},
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{VKD3D_SM1_OP_RSQ, 1, 1, VKD3DSIH_RSQ},
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{VKD3D_SM1_OP_RCP, 1, 1, VKD3DSIH_RCP, {2, 0}},
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{VKD3D_SM1_OP_RSQ, 1, 1, VKD3DSIH_RSQ, {2, 0}},
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{VKD3D_SM1_OP_DP3, 1, 2, VKD3DSIH_DP3},
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{VKD3D_SM1_OP_DP4, 1, 2, VKD3DSIH_DP4},
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{VKD3D_SM1_OP_MIN, 1, 2, VKD3DSIH_MIN},
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{VKD3D_SM1_OP_MAX, 1, 2, VKD3DSIH_MAX},
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{VKD3D_SM1_OP_SLT, 1, 2, VKD3DSIH_SLT},
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{VKD3D_SM1_OP_SGE, 1, 2, VKD3DSIH_SGE},
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{VKD3D_SM1_OP_ABS, 1, 1, VKD3DSIH_ABS},
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{VKD3D_SM1_OP_EXP, 1, 1, VKD3DSIH_EXP},
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{VKD3D_SM1_OP_LOG, 1, 1, VKD3DSIH_LOG},
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{VKD3D_SM1_OP_EXPP, 1, 1, VKD3DSIH_EXPP},
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{VKD3D_SM1_OP_LOGP, 1, 1, VKD3DSIH_LOGP},
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{VKD3D_SM1_OP_DST, 1, 2, VKD3DSIH_DST},
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{VKD3D_SM1_OP_DP4, 1, 2, VKD3DSIH_DP4, {1, 2}},
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{VKD3D_SM1_OP_MIN, 1, 2, VKD3DSIH_MIN, {2, 0}},
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{VKD3D_SM1_OP_MAX, 1, 2, VKD3DSIH_MAX, {2, 0}},
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{VKD3D_SM1_OP_ABS, 1, 1, VKD3DSIH_ABS, {2, 0}},
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{VKD3D_SM1_OP_EXP, 1, 1, VKD3DSIH_EXP, {2, 0}},
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{VKD3D_SM1_OP_LOG, 1, 1, VKD3DSIH_LOG, {2, 0}},
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{VKD3D_SM1_OP_LRP, 1, 3, VKD3DSIH_LRP},
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{VKD3D_SM1_OP_FRC, 1, 1, VKD3DSIH_FRC},
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{VKD3D_SM1_OP_FRC, 1, 1, VKD3DSIH_FRC, {2, 0}},
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{VKD3D_SM1_OP_CND, 1, 3, VKD3DSIH_CND, {1, 0}, {1, 4}},
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{VKD3D_SM1_OP_CMP, 1, 3, VKD3DSIH_CMP, {1, 2}},
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{VKD3D_SM1_OP_POW, 1, 2, VKD3DSIH_POW},
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{VKD3D_SM1_OP_CRS, 1, 2, VKD3DSIH_CRS},
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{VKD3D_SM1_OP_NRM, 1, 1, VKD3DSIH_NRM},
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{VKD3D_SM1_OP_POW, 1, 2, VKD3DSIH_POW, {2, 0}},
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{VKD3D_SM1_OP_CRS, 1, 2, VKD3DSIH_CRS, {2, 0}},
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{VKD3D_SM1_OP_NRM, 1, 1, VKD3DSIH_NRM, {2, 0}},
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{VKD3D_SM1_OP_SINCOS, 1, 3, VKD3DSIH_SINCOS, {2, 0}, {2, 1}},
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{VKD3D_SM1_OP_SINCOS, 1, 1, VKD3DSIH_SINCOS, {3, 0}},
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{VKD3D_SM1_OP_DP2ADD, 1, 3, VKD3DSIH_DP2ADD, {2, 0}},
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/* Matrix */
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{VKD3D_SM1_OP_M4x4, 1, 2, VKD3DSIH_M4x4},
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{VKD3D_SM1_OP_M4x3, 1, 2, VKD3DSIH_M4x3},
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{VKD3D_SM1_OP_M3x4, 1, 2, VKD3DSIH_M3x4},
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{VKD3D_SM1_OP_M3x3, 1, 2, VKD3DSIH_M3x3},
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{VKD3D_SM1_OP_M3x2, 1, 2, VKD3DSIH_M3x2},
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{VKD3D_SM1_OP_M4x4, 1, 2, VKD3DSIH_M4x4, {2, 0}},
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{VKD3D_SM1_OP_M4x3, 1, 2, VKD3DSIH_M4x3, {2, 0}},
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{VKD3D_SM1_OP_M3x4, 1, 2, VKD3DSIH_M3x4, {2, 0}},
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{VKD3D_SM1_OP_M3x3, 1, 2, VKD3DSIH_M3x3, {2, 0}},
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{VKD3D_SM1_OP_M3x2, 1, 2, VKD3DSIH_M3x2, {2, 0}},
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/* Declarations */
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{VKD3D_SM1_OP_DCL, 0, 0, VKD3DSIH_DCL},
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{VKD3D_SM1_OP_DCL, 0, 0, VKD3DSIH_DCL, {2, 0}},
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/* Constant definitions */
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{VKD3D_SM1_OP_DEF, 1, 1, VKD3DSIH_DEF},
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{VKD3D_SM1_OP_DEFB, 1, 1, VKD3DSIH_DEFB},
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{VKD3D_SM1_OP_DEFI, 1, 1, VKD3DSIH_DEFI},
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{VKD3D_SM1_OP_DEFB, 1, 1, VKD3DSIH_DEFB, {2, 0}},
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{VKD3D_SM1_OP_DEFI, 1, 1, VKD3DSIH_DEFI, {2, 1}},
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/* Control flow */
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{VKD3D_SM1_OP_REP, 0, 1, VKD3DSIH_REP, {2, 1}},
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{VKD3D_SM1_OP_ENDREP, 0, 0, VKD3DSIH_ENDREP, {2, 1}},
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@ -352,7 +347,7 @@ static const struct vkd3d_sm1_opcode_info ps_opcode_table[] =
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{VKD3D_SM1_OP_ENDIF, 0, 0, VKD3DSIH_ENDIF, {2, 1}},
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{VKD3D_SM1_OP_BREAK, 0, 0, VKD3DSIH_BREAK, {2, 1}},
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{VKD3D_SM1_OP_BREAKC, 0, 2, VKD3DSIH_BREAKC, {2, 1}},
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{VKD3D_SM1_OP_BREAKP, 0, 1, VKD3DSIH_BREAKP},
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{VKD3D_SM1_OP_BREAKP, 0, 1, VKD3DSIH_BREAKP, {2, 1}},
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{VKD3D_SM1_OP_CALL, 0, 1, VKD3DSIH_CALL, {2, 1}},
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{VKD3D_SM1_OP_CALLNZ, 0, 2, VKD3DSIH_CALLNZ, {2, 1}},
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{VKD3D_SM1_OP_LOOP, 0, 2, VKD3DSIH_LOOP, {3, 0}},
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@ -387,9 +382,9 @@ static const struct vkd3d_sm1_opcode_info ps_opcode_table[] =
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{VKD3D_SM1_OP_DSX, 1, 1, VKD3DSIH_DSX, {2, 1}},
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{VKD3D_SM1_OP_DSY, 1, 1, VKD3DSIH_DSY, {2, 1}},
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{VKD3D_SM1_OP_TEXLDD, 1, 4, VKD3DSIH_TEXLDD, {2, 1}},
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{VKD3D_SM1_OP_SETP, 1, 2, VKD3DSIH_SETP},
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{VKD3D_SM1_OP_SETP, 1, 2, VKD3DSIH_SETP, {2, 1}},
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{VKD3D_SM1_OP_TEXLDL, 1, 2, VKD3DSIH_TEXLDL, {3, 0}},
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{VKD3D_SM1_OP_PHASE, 0, 0, VKD3DSIH_PHASE},
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{VKD3D_SM1_OP_PHASE, 0, 0, VKD3DSIH_PHASE, {1, 4}, {1, 4}},
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{0, 0, 0, VKD3DSIH_INVALID},
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};
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