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vkd3d: Validate the base descriptor handle in d3d12_command_list_set_descriptor_table().
The availability of allocation info makes it possible to check that the descriptor belongs to a heap of the correct type. This will be more important when Vulkan-backed descriptor heaps are added. Signed-off-by: Conor McCarthy <cmccarthy@codeweavers.com> Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com> Signed-off-by: Alexandre Julliard <julliard@winehq.org>
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@ -4178,11 +4178,24 @@ static void d3d12_command_list_set_descriptor_table(struct d3d12_command_list *l
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{
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struct vkd3d_pipeline_bindings *bindings = &list->pipeline_bindings[bind_point];
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const struct d3d12_root_signature *root_signature = bindings->root_signature;
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struct d3d12_desc *desc;
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assert(root_signature_get_descriptor_table(root_signature, index));
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assert(index < ARRAY_SIZE(bindings->descriptor_tables));
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bindings->descriptor_tables[index] = d3d12_desc_from_gpu_handle(base_descriptor);
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desc = d3d12_desc_from_gpu_handle(base_descriptor);
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if (desc && !vkd3d_gpu_descriptor_allocator_heap_from_descriptor(&list->device->gpu_descriptor_allocator,
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desc))
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{
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/* Failure to find a heap means the descriptor handle is from
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* the wrong heap type or not a handle at all. */
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ERR("Invalid heap for base descriptor %"PRIx64".\n", base_descriptor.ptr);
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/* TODO: Mark list as invalid? */
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return;
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}
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bindings->descriptor_tables[index] = desc;
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bindings->descriptor_table_dirty_mask |= (uint64_t)1 << index;
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bindings->descriptor_table_active_mask |= (uint64_t)1 << index;
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}
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@ -2305,6 +2305,29 @@ size_t vkd3d_gpu_descriptor_allocator_range_size_from_descriptor(
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return remaining;
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}
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struct d3d12_descriptor_heap *vkd3d_gpu_descriptor_allocator_heap_from_descriptor(
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struct vkd3d_gpu_descriptor_allocator *allocator, const struct d3d12_desc *desc)
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{
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const struct vkd3d_gpu_descriptor_allocation *allocation;
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int rc;
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if (!allocator->allocation_count)
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return NULL;
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if ((rc = pthread_mutex_lock(&allocator->mutex)))
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{
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ERR("Failed to lock mutex, error %d.\n", rc);
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return NULL;
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}
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allocation = vkd3d_gpu_descriptor_allocator_allocation_from_descriptor(allocator, desc);
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pthread_mutex_unlock(&allocator->mutex);
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return allocation ? CONTAINING_RECORD(allocation->base, struct d3d12_descriptor_heap, descriptors)
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: NULL;
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}
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static bool vkd3d_gpu_descriptor_allocator_init(struct vkd3d_gpu_descriptor_allocator *allocator)
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{
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int rc;
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@ -260,6 +260,8 @@ bool vkd3d_gpu_descriptor_allocator_register_range(struct vkd3d_gpu_descriptor_a
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const struct d3d12_desc *base, size_t count);
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bool vkd3d_gpu_descriptor_allocator_unregister_range(
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struct vkd3d_gpu_descriptor_allocator *allocator, const struct d3d12_desc *base);
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struct d3d12_descriptor_heap *vkd3d_gpu_descriptor_allocator_heap_from_descriptor(
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struct vkd3d_gpu_descriptor_allocator *allocator, const struct d3d12_desc *desc);
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struct vkd3d_render_pass_key
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{
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