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vkd3d-shader/spirv: Implement shader point size.
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parent
a29a4288d2
commit
6ee17cf77e
Notes:
Henri Verbeet
2024-10-10 23:00:15 +02:00
Approved-by: Henri Verbeet (@hverbeet) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1146
@ -110,13 +110,6 @@ enum vkd3d_sm1_misc_register
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VKD3D_SM1_MISC_FACE = 0x1,
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};
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enum vkd3d_sm1_rastout_register
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{
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VKD3D_SM1_RASTOUT_POSITION = 0x0,
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VKD3D_SM1_RASTOUT_FOG = 0x1,
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VKD3D_SM1_RASTOUT_POINT_SIZE = 0x2,
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};
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enum vkd3d_sm1_opcode
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{
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VKD3D_SM1_OP_NOP = 0x00,
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@ -957,6 +950,9 @@ static void shader_sm1_read_dst_param(struct vkd3d_shader_sm1_parser *sm1, const
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shader_sm1_parse_src_param(addr_token, NULL, dst_rel_addr);
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}
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shader_sm1_parse_dst_param(token, dst_rel_addr, dst_param);
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if (dst_param->reg.type == VKD3DSPR_RASTOUT && dst_param->reg.idx[0].offset == VSIR_RASTOUT_POINT_SIZE)
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sm1->p.program->has_point_size = true;
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}
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static void shader_sm1_read_semantic(struct vkd3d_shader_sm1_parser *sm1,
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@ -1434,17 +1430,17 @@ bool hlsl_sm1_register_from_semantic(const struct vkd3d_shader_version *version,
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{"vpos", false, VKD3D_SHADER_TYPE_PIXEL, 3, VKD3DSPR_MISCTYPE, VKD3D_SM1_MISC_POSITION},
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{"color", true, VKD3D_SHADER_TYPE_VERTEX, 1, VKD3DSPR_ATTROUT},
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{"fog", true, VKD3D_SHADER_TYPE_VERTEX, 1, VKD3DSPR_RASTOUT, VKD3D_SM1_RASTOUT_FOG},
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{"position", true, VKD3D_SHADER_TYPE_VERTEX, 1, VKD3DSPR_RASTOUT, VKD3D_SM1_RASTOUT_POSITION},
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{"psize", true, VKD3D_SHADER_TYPE_VERTEX, 1, VKD3DSPR_RASTOUT, VKD3D_SM1_RASTOUT_POINT_SIZE},
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{"sv_position", true, VKD3D_SHADER_TYPE_VERTEX, 1, VKD3DSPR_RASTOUT, VKD3D_SM1_RASTOUT_POSITION},
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{"fog", true, VKD3D_SHADER_TYPE_VERTEX, 1, VKD3DSPR_RASTOUT, VSIR_RASTOUT_FOG},
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{"position", true, VKD3D_SHADER_TYPE_VERTEX, 1, VKD3DSPR_RASTOUT, VSIR_RASTOUT_POSITION},
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{"psize", true, VKD3D_SHADER_TYPE_VERTEX, 1, VKD3DSPR_RASTOUT, VSIR_RASTOUT_POINT_SIZE},
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{"sv_position", true, VKD3D_SHADER_TYPE_VERTEX, 1, VKD3DSPR_RASTOUT, VSIR_RASTOUT_POSITION},
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{"texcoord", true, VKD3D_SHADER_TYPE_VERTEX, 1, VKD3DSPR_TEXCRDOUT},
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{"color", true, VKD3D_SHADER_TYPE_VERTEX, 2, VKD3DSPR_ATTROUT},
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{"fog", true, VKD3D_SHADER_TYPE_VERTEX, 2, VKD3DSPR_RASTOUT, VKD3D_SM1_RASTOUT_FOG},
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{"position", true, VKD3D_SHADER_TYPE_VERTEX, 2, VKD3DSPR_RASTOUT, VKD3D_SM1_RASTOUT_POSITION},
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{"psize", true, VKD3D_SHADER_TYPE_VERTEX, 2, VKD3DSPR_RASTOUT, VKD3D_SM1_RASTOUT_POINT_SIZE},
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{"sv_position", true, VKD3D_SHADER_TYPE_VERTEX, 2, VKD3DSPR_RASTOUT, VKD3D_SM1_RASTOUT_POSITION},
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{"fog", true, VKD3D_SHADER_TYPE_VERTEX, 2, VKD3DSPR_RASTOUT, VSIR_RASTOUT_FOG},
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{"position", true, VKD3D_SHADER_TYPE_VERTEX, 2, VKD3DSPR_RASTOUT, VSIR_RASTOUT_POSITION},
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{"psize", true, VKD3D_SHADER_TYPE_VERTEX, 2, VKD3DSPR_RASTOUT, VSIR_RASTOUT_POINT_SIZE},
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{"sv_position", true, VKD3D_SHADER_TYPE_VERTEX, 2, VKD3DSPR_RASTOUT, VSIR_RASTOUT_POSITION},
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{"texcoord", true, VKD3D_SHADER_TYPE_VERTEX, 2, VKD3DSPR_TEXCRDOUT},
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};
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@ -1648,6 +1648,9 @@ static bool shader_dst_param_io_normalise(struct vkd3d_shader_dst_param *dst_par
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break;
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case VKD3DSPR_RASTOUT:
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/* Leave point size as a system value for the backends to consume. */
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if (reg->idx[0].offset == VSIR_RASTOUT_POINT_SIZE)
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return true;
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reg_idx = SM1_RASTOUT_REGISTER_OFFSET + reg->idx[0].offset;
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signature = normaliser->output_signature;
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reg->type = VKD3DSPR_OUTPUT;
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@ -4863,6 +4863,10 @@ static const struct vkd3d_spirv_builtin vkd3d_pixel_shader_position_builtin =
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{
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VKD3D_SHADER_COMPONENT_FLOAT, 4, SpvBuiltInFragCoord, frag_coord_fixup,
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};
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static const struct vkd3d_spirv_builtin vkd3d_output_point_size_builtin =
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{
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VKD3D_SHADER_COMPONENT_FLOAT, 1, SpvBuiltInPointSize,
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};
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static const struct
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{
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enum vkd3d_shader_register_type reg_type;
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@ -5452,7 +5456,11 @@ static void spirv_compiler_emit_output_register(struct spirv_compiler *compiler,
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VKD3D_ASSERT(!reg->idx_count || !reg->idx[0].rel_addr);
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VKD3D_ASSERT(reg->idx_count < 2);
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if (!(builtin = get_spirv_builtin_for_register(reg->type)))
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if (reg->type == VKD3DSPR_RASTOUT && reg->idx[0].offset == VSIR_RASTOUT_POINT_SIZE)
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{
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builtin = &vkd3d_output_point_size_builtin;
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}
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else if (!(builtin = get_spirv_builtin_for_register(reg->type)))
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{
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FIXME("Unhandled register %#x.\n", reg->type);
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return;
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@ -6749,7 +6757,8 @@ static void spirv_compiler_emit_dcl_input_primitive(struct spirv_compiler *compi
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static void spirv_compiler_emit_point_size(struct spirv_compiler *compiler)
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{
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static const struct vkd3d_spirv_builtin point_size = {VKD3D_SHADER_COMPONENT_FLOAT, 1, SpvBuiltInPointSize};
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if (compiler->program->has_point_size)
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return;
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/* Set the point size. Point sprites are not supported in d3d10+, but
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* point primitives can still be used with e.g. stream output. Vulkan
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@ -6763,7 +6772,8 @@ static void spirv_compiler_emit_point_size(struct spirv_compiler *compiler)
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|| compiler->write_tess_geom_point_size)
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{
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vkd3d_spirv_build_op_store(&compiler->spirv_builder,
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spirv_compiler_emit_builtin_variable(compiler, &point_size, SpvStorageClassOutput, 0),
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spirv_compiler_emit_builtin_variable(compiler,
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&vkd3d_output_point_size_builtin, SpvStorageClassOutput, 0),
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spirv_compiler_get_constant_float(compiler, 1.0f), SpvMemoryAccessMaskNone);
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}
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}
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@ -10577,6 +10587,15 @@ static void spirv_compiler_emit_io_declarations(struct spirv_compiler *compiler)
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else
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spirv_compiler_emit_input(compiler, VKD3DSPR_PATCHCONST, i);
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}
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if (compiler->program->has_point_size)
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{
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struct vkd3d_shader_dst_param dst;
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vsir_dst_param_init(&dst, VKD3DSPR_RASTOUT, VKD3D_DATA_FLOAT, 1);
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dst.reg.idx[0].offset = VSIR_RASTOUT_POINT_SIZE;
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spirv_compiler_emit_output_register(compiler, &dst);
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}
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}
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static void spirv_compiler_emit_descriptor_declarations(struct spirv_compiler *compiler)
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@ -650,6 +650,13 @@ enum vkd3d_shader_register_type
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VKD3DSPR_INVALID = ~0u,
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};
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enum vsir_rastout_register
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{
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VSIR_RASTOUT_POSITION = 0x0,
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VSIR_RASTOUT_FOG = 0x1,
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VSIR_RASTOUT_POINT_SIZE = 0x2,
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};
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enum vkd3d_shader_register_precision
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{
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VKD3D_SHADER_REGISTER_PRECISION_DEFAULT,
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@ -1402,6 +1409,7 @@ struct vsir_program
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unsigned int temp_count;
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unsigned int ssa_count;
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bool use_vocp;
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bool has_point_size;
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enum vsir_control_flow_type cf_type;
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const char **block_names;
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@ -24,11 +24,11 @@ float4 main() : color
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draw point list 2
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probe (149, 240) rgba (0, 0, 0, 0)
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todo probe (151, 240) rgba (0, 1, 0, 1)
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todo probe (169, 240) rgba (0, 1, 0, 1)
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probe (151, 240) rgba (0, 1, 0, 1)
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probe (169, 240) rgba (0, 1, 0, 1)
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probe (171, 240) rgba (0, 0, 0, 0)
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probe (459, 240) rgba (0, 0, 0, 0)
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todo probe (461, 240) rgba (0, 1, 0, 1)
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todo probe (499, 240) rgba (0, 1, 0, 1)
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probe (461, 240) rgba (0, 1, 0, 1)
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probe (499, 240) rgba (0, 1, 0, 1)
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probe (501, 240) rgba (0, 0, 0, 0)
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