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vkd3d-shader/tpf: Validate the src register of case conditions.

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Case values are constants in TPF.
This commit is contained in:
Conor McCarthy
2023-08-28 12:55:47 +10:00
committed by Alexandre Julliard
parent 5c09752194
commit 5c706152fa
Notes: Alexandre Julliard 2023-08-28 22:16:25 +02:00 
Approved-by: Giovanni Mascellani (@giomasce)
Approved-by: Francisco Casas (@fcasas)
Approved-by: Henri Verbeet (@hverbeet)
Approved-by: Alexandre Julliard (@julliard)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/225
2 changed files with 16 additions and 1 deletions
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16
libs/vkd3d-shader/tpf.c
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@@ -707,6 +707,19 @@ static void shader_sm4_read_conditional_op(struct vkd3d_shader_instruction *ins,
VKD3D_SHADER_CONDITIONAL_OP_NZ : VKD3D_SHADER_CONDITIONAL_OP_Z; VKD3D_SHADER_CONDITIONAL_OP_NZ : VKD3D_SHADER_CONDITIONAL_OP_Z;
} }
static void shader_sm4_read_case_condition(struct vkd3d_shader_instruction *ins, uint32_t opcode,
uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
{
shader_sm4_read_src_param(priv, &tokens, &tokens[token_count], VKD3D_DATA_UINT,
(struct vkd3d_shader_src_param *)&ins->src[0]);
if (ins->src[0].reg.type != VKD3DSPR_IMMCONST)
{
FIXME("Switch case value is not a 32-bit constant.\n");
vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_CASE_VALUE,
"Switch case value is not a 32-bit immediate constant register.");
}
}
static void shader_sm4_read_shader_data(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, static void shader_sm4_read_shader_data(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token,
const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv) const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
{ {
@@ -1215,7 +1228,8 @@ static const struct vkd3d_sm4_opcode_info opcode_table[] =
{VKD3D_SM4_OP_BREAK, VKD3DSIH_BREAK, "", ""}, {VKD3D_SM4_OP_BREAK, VKD3DSIH_BREAK, "", ""},
{VKD3D_SM4_OP_BREAKC, VKD3DSIH_BREAKP, "", "u", {VKD3D_SM4_OP_BREAKC, VKD3DSIH_BREAKP, "", "u",
shader_sm4_read_conditional_op}, shader_sm4_read_conditional_op},
{VKD3D_SM4_OP_CASE, VKD3DSIH_CASE, "", "u"}, {VKD3D_SM4_OP_CASE, VKD3DSIH_CASE, "", "u",
shader_sm4_read_case_condition},
{VKD3D_SM4_OP_CONTINUE, VKD3DSIH_CONTINUE, "", ""}, {VKD3D_SM4_OP_CONTINUE, VKD3DSIH_CONTINUE, "", ""},
{VKD3D_SM4_OP_CONTINUEC, VKD3DSIH_CONTINUEP, "", "u", {VKD3D_SM4_OP_CONTINUEC, VKD3DSIH_CONTINUEP, "", "u",
shader_sm4_read_conditional_op}, shader_sm4_read_conditional_op},

1
libs/vkd3d-shader/vkd3d_shader_private.h
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@@ -78,6 +78,7 @@ enum vkd3d_shader_error
VKD3D_SHADER_ERROR_TPF_TOO_MANY_REGISTERS = 1004, VKD3D_SHADER_ERROR_TPF_TOO_MANY_REGISTERS = 1004,
VKD3D_SHADER_ERROR_TPF_INVALID_IO_REGISTER = 1005, VKD3D_SHADER_ERROR_TPF_INVALID_IO_REGISTER = 1005,
VKD3D_SHADER_ERROR_TPF_INVALID_INDEX_RANGE_DCL = 1006, VKD3D_SHADER_ERROR_TPF_INVALID_INDEX_RANGE_DCL = 1006,
VKD3D_SHADER_ERROR_TPF_INVALID_CASE_VALUE = 1007,
VKD3D_SHADER_WARNING_TPF_MASK_NOT_CONTIGUOUS = 1300, VKD3D_SHADER_WARNING_TPF_MASK_NOT_CONTIGUOUS = 1300,
VKD3D_SHADER_WARNING_TPF_UNHANDLED_INDEX_RANGE_MASK = 1301, VKD3D_SHADER_WARNING_TPF_UNHANDLED_INDEX_RANGE_MASK = 1301,