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vkd3d-shader/ir: Validate the register type for DCL_INPUT_PS instructions.

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Giovanni Mascellani 2024-11-21 23:23:39 +01:00 committed by Henri Verbeet
parent 31f6b18c84
commit 09ede1e7f2
Notes: Henri Verbeet 2024-11-25 21:02:53 +01:00 
Approved-by: Henri Verbeet (@hverbeet)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1279
1 changed files with 16 additions and 0 deletions
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16
libs/vkd3d-shader/ir.c
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@ -8022,6 +8022,21 @@ static void vsir_validate_dcl_input_primitive(struct validation_context *ctx,
instruction->declaration.primitive_type.type); instruction->declaration.primitive_type.type);
} }
static void vsir_validate_dcl_input_ps(struct validation_context *ctx,
const struct vkd3d_shader_instruction *instruction)
{
switch (instruction->declaration.dst.reg.type)
{
case VKD3DSPR_INPUT:
break;
default:
validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_REGISTER_TYPE,
"Invalid register type %#x in instruction DCL_INPUT_PS.",
instruction->declaration.dst.reg.type);
}
}
static void vsir_validate_dcl_input_sgv(struct validation_context *ctx, static void vsir_validate_dcl_input_sgv(struct validation_context *ctx,
const struct vkd3d_shader_instruction *instruction) const struct vkd3d_shader_instruction *instruction)
{ {
@ -8360,6 +8375,7 @@ static const struct vsir_validator_instruction_desc vsir_validator_instructions[
[VKD3DSIH_DCL_HS_MAX_TESSFACTOR] = {0, 0, vsir_validate_dcl_hs_max_tessfactor}, [VKD3DSIH_DCL_HS_MAX_TESSFACTOR] = {0, 0, vsir_validate_dcl_hs_max_tessfactor},
[VKD3DSIH_DCL_INPUT] = {0, 0, vsir_validate_dcl_input}, [VKD3DSIH_DCL_INPUT] = {0, 0, vsir_validate_dcl_input},
[VKD3DSIH_DCL_INPUT_PRIMITIVE] = {0, 0, vsir_validate_dcl_input_primitive}, [VKD3DSIH_DCL_INPUT_PRIMITIVE] = {0, 0, vsir_validate_dcl_input_primitive},
[VKD3DSIH_DCL_INPUT_PS] = {0, 0, vsir_validate_dcl_input_ps},
[VKD3DSIH_DCL_INPUT_SGV] = {0, 0, vsir_validate_dcl_input_sgv}, [VKD3DSIH_DCL_INPUT_SGV] = {0, 0, vsir_validate_dcl_input_sgv},
[VKD3DSIH_DCL_INPUT_SIV] = {0, 0, vsir_validate_dcl_input_siv}, [VKD3DSIH_DCL_INPUT_SIV] = {0, 0, vsir_validate_dcl_input_siv},
[VKD3DSIH_DCL_OUTPUT_CONTROL_POINT_COUNT] = {0, 0, vsir_validate_dcl_output_control_point_count}, [VKD3DSIH_DCL_OUTPUT_CONTROL_POINT_COUNT] = {0, 0, vsir_validate_dcl_output_control_point_count},