From 09ede1e7f25e936fad7901072c7848d5fd9e2b27 Mon Sep 17 00:00:00 2001 From: Giovanni Mascellani Date: Thu, 21 Nov 2024 23:23:39 +0100 Subject: [PATCH] vkd3d-shader/ir: Validate the register type for DCL_INPUT_PS instructions. --- libs/vkd3d-shader/ir.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/libs/vkd3d-shader/ir.c b/libs/vkd3d-shader/ir.c index bc771782..6b01e077 100644 --- a/libs/vkd3d-shader/ir.c +++ b/libs/vkd3d-shader/ir.c @@ -8022,6 +8022,21 @@ static void vsir_validate_dcl_input_primitive(struct validation_context *ctx, instruction->declaration.primitive_type.type); } +static void vsir_validate_dcl_input_ps(struct validation_context *ctx, + const struct vkd3d_shader_instruction *instruction) +{ + switch (instruction->declaration.dst.reg.type) + { + case VKD3DSPR_INPUT: + break; + + default: + validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_REGISTER_TYPE, + "Invalid register type %#x in instruction DCL_INPUT_PS.", + instruction->declaration.dst.reg.type); + } +} + static void vsir_validate_dcl_input_sgv(struct validation_context *ctx, const struct vkd3d_shader_instruction *instruction) { @@ -8360,6 +8375,7 @@ static const struct vsir_validator_instruction_desc vsir_validator_instructions[ [VKD3DSIH_DCL_HS_MAX_TESSFACTOR] = {0, 0, vsir_validate_dcl_hs_max_tessfactor}, [VKD3DSIH_DCL_INPUT] = {0, 0, vsir_validate_dcl_input}, [VKD3DSIH_DCL_INPUT_PRIMITIVE] = {0, 0, vsir_validate_dcl_input_primitive}, + [VKD3DSIH_DCL_INPUT_PS] = {0, 0, vsir_validate_dcl_input_ps}, [VKD3DSIH_DCL_INPUT_SGV] = {0, 0, vsir_validate_dcl_input_sgv}, [VKD3DSIH_DCL_INPUT_SIV] = {0, 0, vsir_validate_dcl_input_siv}, [VKD3DSIH_DCL_OUTPUT_CONTROL_POINT_COUNT] = {0, 0, vsir_validate_dcl_output_control_point_count},