Fixes two problems:
1. macro incorrectly referred directly to "bd" instead of its argument "i"
2. logic wasn't 64-bit safe (incorrect 32/64bit comparison)
--HG--
extra : convert_revision : 9b65dfcae9f7d70788806afc4f3b989e32c601fe
Also includes a few renames of qxor -> xorq from other files.
(qxor was missing from the rename script).
--HG--
extra : convert_revision : b49dd62330e017769dfdea9c87a74698179c7f45
This patch detects when LEA can be used to rematerialize an add operation
instead of spilling it. Sub and lsh could be supported too, if it would
help (see notes in canRematLEA()).
--HG--
extra : convert_revision : e5db9525afbc8bd03444c66d8ded420f4696dce8
The ARM backend already supported single-instruction folding of immediates into
add/sub/and/or/xor instructions. This patch enables the same instructions to
be rematerialized without spilling them.
--HG--
extra : convert_revision : c5fca9078e37d7d79f66cf6023fcbf707d11d57b
On PPC the cmov logic is generating incorrect code due to
instruction and register lifetimes are not being correctly
handled.
This patch mirrors the code used on the x86 which was fixed
a while back to address this issue. See bug 535705
--HG--
extra : convert_revision : 8047bc5db3b14ddc3588378c7f4c6fef76de7d98
Added comments clarifying the contract between canRemat() and asm_restore(),
and fixed the ARM, MIPS, PPC, and Sparc backends so canRemat() doesn't
return true for instructions that asm_restore() doesn't handle.
--HG--
extra : convert_revision : f4d4243db4cf3b8d7149012d5503c5441058f58e
This patch un-does the intel names that have been used so far within
nanojit, updates the aliases in LIR.h, and fixes the names used in
lirasm tests.
Host VM's will need to run rename_LIR.pl from bug 504506 if they have
already begun using the intel names; aliases are not provided for them in LIR.h.
--HG--
extra : convert_revision : 2787af46329c72796954ddb68f53326f0de661e4
This patch does two things, neither of which should affect generated code.
1. In case LIR_alloc in gen(), replace inlined code with a call to evict(),
since evict() does exactly what the inlined code does.
2. In backends, remove ins->clearReg() or deprecated_markAsClear() calls from
asm_restore(), since evict() takes care of the same thing as soon as
asm_restore() returns.
--HG--
extra : convert_revision : e89860f89d85e6d0a4ef538c5f19f0ae55e360da
Mechanically renamed using rename_LIR.pl, backed out the alias patch hunks,
and updated the pointer-sized aliases to use the new opcodes instead of
PTR_SIZE macros using old opcodes.
--HG--
extra : convert_revision : 944433df375988c65313759440ed1de757ab4ea8
RIP-relative addressing uses mod 00 "disp32" encoding, but mod_disp32() assumes
all instructions passed in can be optimized to disp8 encoding if the actual
displacement is 8-bit. This is invalid for mode 00 modes, including RIP addressing.
mod_disp32() can still do the right thing in the other arm of its branch; this
patch removes the assert and tightens the check for the disp8 case.
--HG--
extra : convert_revision : b534b9289ca8a111f16fbf0b0711b5277be440f4
Pushing this in advance of review; It appears to run fine in the tamarin-redux
acceptance suite, and i tested it also by stopping in asm_store32() with dbx,
and disassembling the generated STB instruction. Looked fine to the naked eye.
--HG--
extra : convert_revision : 1e26f7116dc4435461b56900454b02fa821a9e54
TR needs to support patching, the assert is too restrictive.
Support target == 0 with an explicit check instead of letting
it just work by accident.
--HG--
extra : convert_revision : 5f12e1da6b7f3b76116ccf2ffd878969e103f557
Patch also fixes an invalid assert that required load/store
displacements to be multiples of 4 on PPC.
--HG--
extra : convert_revision : e2a7f626b35179db953469ea94cdb39d16b10f7c
Issues with prior patch not compiling with tamarin due to missing vtable,
so make sure printf isn't available unless verbose is enabled.
--HG--
extra : convert_revision : 147e02ce8790c9e09f4c91b29b1bcc5d16862ee1
Took the opportunity to add a few asserts to ensure the implit RHS
register for x86 shift instructions is always ECX.
--HG--
extra : convert_revision : 6baccc0354a87ece92ccff6ff138986bf4d19a2c
if LogControl.printf is made a virtual method then consumers of nanojit can
more easily control how the output is managed.
--HG--
extra : convert_revision : 7fa9ad2e2d57661e4290df0b3902fd809f19d768
