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staging: ccree: move to generic device log infra

Browse Source 
Move over from using macro wrappers around to printk to
dev_err, dev_dbg and friends and clean up resulting fallout.

Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Gilad Ben-Yossef
2017-10-03 11:42:16 +01:00
committed by Greg Kroah-Hartman
parent a55ef6f52f
commit bdd0873dc2
13 changed files with 688 additions and 673 deletions
Download Patch File Download Diff File Expand all files Collapse all files

226
drivers/staging/ccree/ssi_aead.c
View File

File diff suppressed because it is too large Load Diff

394
drivers/staging/ccree/ssi_buffer_mgr.c
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File diff suppressed because it is too large Load Diff

5
drivers/staging/ccree/ssi_buffer_mgr.h
View File

@@ -80,7 +80,10 @@ int ssi_buffer_mgr_map_hash_request_update(struct ssi_drvdata *drvdata, void *ct
void ssi_buffer_mgr_unmap_hash_request(struct device *dev, void *ctx, struct scatterlist *src, bool do_revert);
void ssi_buffer_mgr_copy_scatterlist_portion(u8 *dest, struct scatterlist *sg, u32 to_skip, u32 end, enum ssi_sg_cpy_direct direct);
void ssi_buffer_mgr_copy_scatterlist_portion(struct device *dev, u8 *dest,
struct scatterlist *sg,
u32 to_skip, u32 end,
enum ssi_sg_cpy_direct direct);
void ssi_buffer_mgr_zero_sgl(struct scatterlist *sgl, u32 data_len);

138
drivers/staging/ccree/ssi_cipher.c
View File

@@ -185,8 +185,8 @@ static int ssi_blkcipher_init(struct crypto_tfm *tfm)
int rc = 0;
unsigned int max_key_buf_size = get_max_keysize(tfm);
SSI_LOG_DEBUG("Initializing context @%p for %s\n",
ctx_p, crypto_tfm_alg_name(tfm));
dev_dbg(dev, "Initializing context @%p for %s\n", ctx_p,
crypto_tfm_alg_name(tfm));
ctx_p->cipher_mode = ssi_alg->cipher_mode;
ctx_p->flow_mode = ssi_alg->flow_mode;
@@ -195,30 +195,29 @@ static int ssi_blkcipher_init(struct crypto_tfm *tfm)
/* Allocate key buffer, cache line aligned */
ctx_p->user.key = kmalloc(max_key_buf_size, GFP_KERNEL | GFP_DMA);
if (!ctx_p->user.key) {
SSI_LOG_ERR("Allocating key buffer in context failed\n");
dev_dbg(dev, "Allocating key buffer in context failed\n");
rc = -ENOMEM;
}
SSI_LOG_DEBUG("Allocated key buffer in context. key=@%p\n",
ctx_p->user.key);
dev_dbg(dev, "Allocated key buffer in context. key=@%p\n",
ctx_p->user.key);
/* Map key buffer */
ctx_p->user.key_dma_addr = dma_map_single(dev, (void *)ctx_p->user.key,
max_key_buf_size,
DMA_TO_DEVICE);
if (dma_mapping_error(dev, ctx_p->user.key_dma_addr)) {
SSI_LOG_ERR("Mapping Key %u B at va=%pK for DMA failed\n",
max_key_buf_size, ctx_p->user.key);
dev_err(dev, "Mapping Key %u B at va=%pK for DMA failed\n",
max_key_buf_size, ctx_p->user.key);
return -ENOMEM;
}
SSI_LOG_DEBUG("Mapped key %u B at va=%pK to dma=%pad\n",
max_key_buf_size, ctx_p->user.key,
ctx_p->user.key_dma_addr);
dev_dbg(dev, "Mapped key %u B at va=%pK to dma=%pad\n",
max_key_buf_size, ctx_p->user.key, &ctx_p->user.key_dma_addr);
if (ctx_p->cipher_mode == DRV_CIPHER_ESSIV) {
/* Alloc hash tfm for essiv */
ctx_p->shash_tfm = crypto_alloc_shash("sha256-generic", 0, 0);
if (IS_ERR(ctx_p->shash_tfm)) {
SSI_LOG_ERR("Error allocating hash tfm for ESSIV.\n");
dev_err(dev, "Error allocating hash tfm for ESSIV.\n");
return PTR_ERR(ctx_p->shash_tfm);
}
}
@@ -232,8 +231,8 @@ static void ssi_blkcipher_exit(struct crypto_tfm *tfm)
struct device *dev = drvdata_to_dev(ctx_p->drvdata);
unsigned int max_key_buf_size = get_max_keysize(tfm);
SSI_LOG_DEBUG("Clearing context @%p for %s\n",
crypto_tfm_ctx(tfm), crypto_tfm_alg_name(tfm));
dev_dbg(dev, "Clearing context @%p for %s\n",
crypto_tfm_ctx(tfm), crypto_tfm_alg_name(tfm));
if (ctx_p->cipher_mode == DRV_CIPHER_ESSIV) {
/* Free hash tfm for essiv */
@@ -244,12 +243,12 @@ static void ssi_blkcipher_exit(struct crypto_tfm *tfm)
/* Unmap key buffer */
dma_unmap_single(dev, ctx_p->user.key_dma_addr, max_key_buf_size,
DMA_TO_DEVICE);
SSI_LOG_DEBUG("Unmapped key buffer key_dma_addr=%pad\n",
ctx_p->user.key_dma_addr);
dev_dbg(dev, "Unmapped key buffer key_dma_addr=%pad\n",
&ctx_p->user.key_dma_addr);
/* Free key buffer in context */
kfree(ctx_p->user.key);
SSI_LOG_DEBUG("Free key buffer in context. key=@%p\n", ctx_p->user.key);
dev_dbg(dev, "Free key buffer in context. key=@%p\n", ctx_p->user.key);
}
struct tdes_keys {
@@ -301,12 +300,10 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
u32 tmp[DES_EXPKEY_WORDS];
unsigned int max_key_buf_size = get_max_keysize(tfm);
SSI_LOG_DEBUG("Setting key in context @%p for %s. keylen=%u\n",
ctx_p, crypto_tfm_alg_name(tfm), keylen);
dev_dbg(dev, "Setting key in context @%p for %s. keylen=%u\n",
ctx_p, crypto_tfm_alg_name(tfm), keylen);
dump_byte_array("key", (u8 *)key, keylen);
SSI_LOG_DEBUG("after FIPS check");
/* STAT_PHASE_0: Init and sanity checks */
#if SSI_CC_HAS_MULTI2
@@ -316,7 +313,7 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
#endif /*SSI_CC_HAS_MULTI2*/
if (unlikely(validate_keys_sizes(ctx_p, keylen) != 0)) {
SSI_LOG_ERR("Unsupported key size %d.\n", keylen);
dev_err(dev, "Unsupported key size %d.\n", keylen);
crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
return -EINVAL;
}
@@ -326,13 +323,14 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
struct arm_hw_key_info *hki = (struct arm_hw_key_info *)key;
if (unlikely(ctx_p->flow_mode != S_DIN_to_AES)) {
SSI_LOG_ERR("HW key not supported for non-AES flows\n");
dev_err(dev, "HW key not supported for non-AES flows\n");
return -EINVAL;
}
ctx_p->hw.key1_slot = hw_key_to_cc_hw_key(hki->hw_key1);
if (unlikely(ctx_p->hw.key1_slot == END_OF_KEYS)) {
SSI_LOG_ERR("Unsupported hw key1 number (%d)\n", hki->hw_key1);
dev_err(dev, "Unsupported hw key1 number (%d)\n",
hki->hw_key1);
return -EINVAL;
}
@@ -340,18 +338,20 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
(ctx_p->cipher_mode == DRV_CIPHER_ESSIV) ||
(ctx_p->cipher_mode == DRV_CIPHER_BITLOCKER)) {
if (unlikely(hki->hw_key1 == hki->hw_key2)) {
SSI_LOG_ERR("Illegal hw key numbers (%d,%d)\n", hki->hw_key1, hki->hw_key2);
dev_err(dev, "Illegal hw key numbers (%d,%d)\n",
hki->hw_key1, hki->hw_key2);
return -EINVAL;
}
ctx_p->hw.key2_slot = hw_key_to_cc_hw_key(hki->hw_key2);
if (unlikely(ctx_p->hw.key2_slot == END_OF_KEYS)) {
SSI_LOG_ERR("Unsupported hw key2 number (%d)\n", hki->hw_key2);
dev_err(dev, "Unsupported hw key2 number (%d)\n",
hki->hw_key2);
return -EINVAL;
}
}
ctx_p->keylen = keylen;
SSI_LOG_DEBUG("ssi_is_hw_key ret 0");
dev_dbg(dev, "ssi_is_hw_key ret 0");
return 0;
}
@@ -361,19 +361,19 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
if (unlikely(!des_ekey(tmp, key)) &&
(crypto_tfm_get_flags(tfm) & CRYPTO_TFM_REQ_WEAK_KEY)) {
tfm->crt_flags |= CRYPTO_TFM_RES_WEAK_KEY;
SSI_LOG_DEBUG("weak DES key");
dev_dbg(dev, "weak DES key");
return -EINVAL;
}
}
if ((ctx_p->cipher_mode == DRV_CIPHER_XTS) &&
xts_check_key(tfm, key, keylen) != 0) {
SSI_LOG_DEBUG("weak XTS key");
dev_dbg(dev, "weak XTS key");
return -EINVAL;
}
if ((ctx_p->flow_mode == S_DIN_to_DES) &&
(keylen == DES3_EDE_KEY_SIZE) &&
ssi_verify_3des_keys(key, keylen) != 0) {
SSI_LOG_DEBUG("weak 3DES key");
dev_dbg(dev, "weak 3DES key");
return -EINVAL;
}
@@ -388,7 +388,7 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
if (ctx_p->key_round_number < CC_MULTI2_MIN_NUM_ROUNDS ||
ctx_p->key_round_number > CC_MULTI2_MAX_NUM_ROUNDS) {
crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
SSI_LOG_DEBUG("SSI_CC_HAS_MULTI2 einval");
dev_dbg(dev, "SSI_CC_HAS_MULTI2 einval");
return -EINVAL;
#endif /*SSI_CC_HAS_MULTI2*/
} else {
@@ -406,7 +406,7 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
err = crypto_shash_digest(desc, ctx_p->user.key, key_len, ctx_p->user.key + key_len);
if (err) {
SSI_LOG_ERR("Failed to hash ESSIV key.\n");
dev_err(dev, "Failed to hash ESSIV key.\n");
return err;
}
}
@@ -415,7 +415,7 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
max_key_buf_size, DMA_TO_DEVICE);
ctx_p->keylen = keylen;
SSI_LOG_DEBUG("return safely");
dev_dbg(dev, "return safely");
return 0;
}
@@ -429,6 +429,7 @@ ssi_blkcipher_create_setup_desc(
unsigned int *seq_size)
{
struct ssi_ablkcipher_ctx *ctx_p = crypto_tfm_ctx(tfm);
struct device *dev = drvdata_to_dev(ctx_p->drvdata);
int cipher_mode = ctx_p->cipher_mode;
int flow_mode = ctx_p->flow_mode;
int direction = req_ctx->gen_ctx.op_type;
@@ -539,7 +540,7 @@ ssi_blkcipher_create_setup_desc(
(*seq_size)++;
break;
default:
SSI_LOG_ERR("Unsupported cipher mode (%d)\n", cipher_mode);
dev_err(dev, "Unsupported cipher mode (%d)\n", cipher_mode);
}
}
@@ -599,6 +600,7 @@ ssi_blkcipher_create_data_desc(
unsigned int *seq_size)
{
struct ssi_ablkcipher_ctx *ctx_p = crypto_tfm_ctx(tfm);
struct device *dev = drvdata_to_dev(ctx_p->drvdata);
unsigned int flow_mode = ctx_p->flow_mode;
switch (ctx_p->flow_mode) {
@@ -614,15 +616,15 @@ ssi_blkcipher_create_data_desc(
break;
#endif /*SSI_CC_HAS_MULTI2*/
default:
SSI_LOG_ERR("invalid flow mode, flow_mode = %d\n", flow_mode);
dev_err(dev, "invalid flow mode, flow_mode = %d\n", flow_mode);
return;
}
/* Process */
if (likely(req_ctx->dma_buf_type == SSI_DMA_BUF_DLLI)) {
SSI_LOG_DEBUG(" data params addr %pad length 0x%X\n",
sg_dma_address(src), nbytes);
SSI_LOG_DEBUG(" data params addr %pad length 0x%X\n",
sg_dma_address(dst), nbytes);
dev_dbg(dev, " data params addr %pad length 0x%X\n",
&sg_dma_address(src), nbytes);
dev_dbg(dev, " data params addr %pad length 0x%X\n",
&sg_dma_address(dst), nbytes);
hw_desc_init(&desc[*seq_size]);
set_din_type(&desc[*seq_size], DMA_DLLI, sg_dma_address(src),
nbytes, NS_BIT);
@@ -635,9 +637,8 @@ ssi_blkcipher_create_data_desc(
(*seq_size)++;
} else {
/* bypass */
SSI_LOG_DEBUG(" bypass params addr %pad "
"length 0x%X addr 0x%08X\n",
req_ctx->mlli_params.mlli_dma_addr,
dev_dbg(dev, " bypass params addr %pad length 0x%X addr 0x%08X\n",
&req_ctx->mlli_params.mlli_dma_addr,
req_ctx->mlli_params.mlli_len,
(unsigned int)ctx_p->drvdata->mlli_sram_addr);
hw_desc_init(&desc[*seq_size]);
@@ -655,21 +656,18 @@ ssi_blkcipher_create_data_desc(
ctx_p->drvdata->mlli_sram_addr,
req_ctx->in_mlli_nents, NS_BIT);
if (req_ctx->out_nents == 0) {
SSI_LOG_DEBUG(" din/dout params addr 0x%08X "
"addr 0x%08X\n",
(unsigned int)ctx_p->drvdata->mlli_sram_addr,
(unsigned int)ctx_p->drvdata->mlli_sram_addr);
dev_dbg(dev, " din/dout params addr 0x%08X addr 0x%08X\n",
(unsigned int)ctx_p->drvdata->mlli_sram_addr,
(unsigned int)ctx_p->drvdata->mlli_sram_addr);
set_dout_mlli(&desc[*seq_size],
ctx_p->drvdata->mlli_sram_addr,
req_ctx->in_mlli_nents, NS_BIT,
(!areq ? 0 : 1));
} else {
SSI_LOG_DEBUG(" din/dout params "
"addr 0x%08X addr 0x%08X\n",
dev_dbg(dev, " din/dout params addr 0x%08X addr 0x%08X\n",
(unsigned int)ctx_p->drvdata->mlli_sram_addr,
(unsigned int)ctx_p->drvdata->mlli_sram_addr +
(u32)LLI_ENTRY_BYTE_SIZE *
req_ctx->in_nents);
(u32)LLI_ENTRY_BYTE_SIZE * req_ctx->in_nents);
set_dout_mlli(&desc[*seq_size],
(ctx_p->drvdata->mlli_sram_addr +
(LLI_ENTRY_BYTE_SIZE *
@@ -742,15 +740,15 @@ static int ssi_blkcipher_process(
struct ssi_crypto_req ssi_req = {};
int rc, seq_len = 0, cts_restore_flag = 0;
SSI_LOG_DEBUG("%s areq=%p info=%p nbytes=%d\n",
((direction == DRV_CRYPTO_DIRECTION_ENCRYPT) ? "Encrypt" : "Decrypt"),
areq, info, nbytes);
dev_dbg(dev, "%s areq=%p info=%p nbytes=%d\n",
((direction == DRV_CRYPTO_DIRECTION_ENCRYPT) ?
"Encrypt" : "Decrypt"), areq, info, nbytes);
/* STAT_PHASE_0: Init and sanity checks */
/* TODO: check data length according to mode */
if (unlikely(validate_data_size(ctx_p, nbytes))) {
SSI_LOG_ERR("Unsupported data size %d.\n", nbytes);
dev_err(dev, "Unsupported data size %d.\n", nbytes);
crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_BLOCK_LEN);
rc = -EINVAL;
goto exit_process;
@@ -783,7 +781,7 @@ static int ssi_blkcipher_process(
rc = ssi_buffer_mgr_map_blkcipher_request(ctx_p->drvdata, req_ctx, ivsize, nbytes, info, src, dst);
if (unlikely(rc != 0)) {
SSI_LOG_ERR("map_request() failed\n");
dev_err(dev, "map_request() failed\n");
goto exit_process;
}
@@ -1240,14 +1238,15 @@ static struct ssi_alg_template blkcipher_algs[] = {
};
static
struct ssi_crypto_alg *ssi_ablkcipher_create_alg(struct ssi_alg_template *template)
struct ssi_crypto_alg *ssi_ablkcipher_create_alg(struct ssi_alg_template
*template, struct device *dev)
{
struct ssi_crypto_alg *t_alg;
struct crypto_alg *alg;
t_alg = kzalloc(sizeof(*t_alg), GFP_KERNEL);
if (!t_alg) {
SSI_LOG_ERR("failed to allocate t_alg\n");
dev_dbg(dev, "failed to allocate t_alg\n");
return ERR_PTR(-ENOMEM);
}
@@ -1299,6 +1298,7 @@ int ssi_ablkcipher_alloc(struct ssi_drvdata *drvdata)
{
struct ssi_blkcipher_handle *ablkcipher_handle;
struct ssi_crypto_alg *t_alg;
struct device *dev = drvdata_to_dev(drvdata);
int rc = -ENOMEM;
int alg;
@@ -1310,32 +1310,34 @@ int ssi_ablkcipher_alloc(struct ssi_drvdata *drvdata)
drvdata->blkcipher_handle = ablkcipher_handle;
/* Linux crypto */
SSI_LOG_DEBUG("Number of algorithms = %zu\n", ARRAY_SIZE(blkcipher_algs));
dev_dbg(dev, "Number of algorithms = %zu\n",
ARRAY_SIZE(blkcipher_algs));
for (alg = 0; alg < ARRAY_SIZE(blkcipher_algs); alg++) {
SSI_LOG_DEBUG("creating %s\n", blkcipher_algs[alg].driver_name);
t_alg = ssi_ablkcipher_create_alg(&blkcipher_algs[alg]);
dev_dbg(dev, "creating %s\n", blkcipher_algs[alg].driver_name);
t_alg = ssi_ablkcipher_create_alg(&blkcipher_algs[alg], dev);
if (IS_ERR(t_alg)) {
rc = PTR_ERR(t_alg);
SSI_LOG_ERR("%s alg allocation failed\n",
blkcipher_algs[alg].driver_name);
dev_err(dev, "%s alg allocation failed\n",
blkcipher_algs[alg].driver_name);
goto fail0;
}
t_alg->drvdata = drvdata;
SSI_LOG_DEBUG("registering %s\n", blkcipher_algs[alg].driver_name);
dev_dbg(dev, "registering %s\n",
blkcipher_algs[alg].driver_name);
rc = crypto_register_alg(&t_alg->crypto_alg);
SSI_LOG_DEBUG("%s alg registration rc = %x\n",
t_alg->crypto_alg.cra_driver_name, rc);
dev_dbg(dev, "%s alg registration rc = %x\n",
t_alg->crypto_alg.cra_driver_name, rc);
if (unlikely(rc != 0)) {
SSI_LOG_ERR("%s alg registration failed\n",
t_alg->crypto_alg.cra_driver_name);
dev_err(dev, "%s alg registration failed\n",
t_alg->crypto_alg.cra_driver_name);
kfree(t_alg);
goto fail0;
} else {
list_add_tail(&t_alg->entry,
&ablkcipher_handle->blkcipher_alg_list);
SSI_LOG_DEBUG("Registered %s\n",
t_alg->crypto_alg.cra_driver_name);
dev_dbg(dev, "Registered %s\n",
t_alg->crypto_alg.cra_driver_name);
}
}
return 0;

142
drivers/staging/ccree/ssi_driver.c
View File

@@ -74,41 +74,17 @@
#include "ssi_fips.h"
#ifdef DX_DUMP_BYTES
void dump_byte_array(const char *name, const u8 *the_array, unsigned long size)
void dump_byte_array(const char *name, const u8 *buf, size_t len)
{
int i, line_offset = 0, ret = 0;
const u8 *cur_byte;
char line_buf[80];
char prefix[NAME_LEN];
if (!the_array) {
SSI_LOG_ERR("cannot dump array - NULL pointer\n");
if (!buf)
return;
}
ret = snprintf(line_buf, sizeof(line_buf), "%s[%lu]: ", name, size);
if (ret < 0) {
SSI_LOG_ERR("snprintf returned %d . aborting buffer array dump\n", ret);
return;
}
line_offset = ret;
for (i = 0, cur_byte = the_array;
(i < size) && (line_offset < sizeof(line_buf)); i++, cur_byte++) {
ret = snprintf(line_buf + line_offset,
sizeof(line_buf) - line_offset,
"0x%02X ", *cur_byte);
if (ret < 0) {
SSI_LOG_ERR("snprintf returned %d . aborting buffer array dump\n", ret);
return;
}
line_offset += ret;
if (line_offset > 75) { /* Cut before line end */
SSI_LOG_DEBUG("%s\n", line_buf);
line_offset = 0;
}
}
snprintf(prefix, sizeof(prefix), "%s[%lu]: ", name, len);
if (line_offset > 0) /* Dump remaining line */
SSI_LOG_DEBUG("%s\n", line_buf);
print_hex_dump(KERN_DEBUG, prefix, DUMP_PREFIX_ADDRESS, 16, 1, len,
false);
}
#endif
@@ -116,6 +92,7 @@ static irqreturn_t cc_isr(int irq, void *dev_id)
{
struct ssi_drvdata *drvdata = (struct ssi_drvdata *)dev_id;
void __iomem *cc_base = drvdata->cc_base;
struct device *dev = drvdata_to_dev(drvdata);
u32 irr;
u32 imr;
@@ -123,9 +100,9 @@ static irqreturn_t cc_isr(int irq, void *dev_id)
/* read the interrupt status */
irr = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRR));
SSI_LOG_DEBUG("Got IRR=0x%08X\n", irr);
dev_dbg(dev, "Got IRR=0x%08X\n", irr);
if (unlikely(irr == 0)) { /* Probably shared interrupt line */
SSI_LOG_ERR("Got interrupt with empty IRR\n");
dev_err(dev, "Got interrupt with empty IRR\n");
return IRQ_NONE;
}
imr = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR));
@@ -156,13 +133,15 @@ static irqreturn_t cc_isr(int irq, void *dev_id)
/* Read the AXI error ID */
axi_err = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_MON_ERR));
SSI_LOG_DEBUG("AXI completion error: axim_mon_err=0x%08X\n", axi_err);
dev_dbg(dev, "AXI completion error: axim_mon_err=0x%08X\n",
axi_err);
irr &= ~SSI_AXI_ERR_IRQ_MASK;
}
if (unlikely(irr != 0)) {
SSI_LOG_DEBUG("IRR includes unknown cause bits (0x%08X)\n", irr);
dev_dbg(dev, "IRR includes unknown cause bits (0x%08X)\n",
irr);
/* Just warning */
}
@@ -173,15 +152,17 @@ int init_cc_regs(struct ssi_drvdata *drvdata, bool is_probe)
{
unsigned int val, cache_params;
void __iomem *cc_base = drvdata->cc_base;
struct device *dev = drvdata_to_dev(drvdata);
/* Unmask all AXI interrupt sources AXI_CFG1 register */
val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CFG));
CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CFG), val & ~SSI_AXI_IRQ_MASK);
SSI_LOG_DEBUG("AXIM_CFG=0x%08X\n", CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CFG)));
dev_dbg(dev, "AXIM_CFG=0x%08X\n",
CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CFG)));
/* Clear all pending interrupts */
val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRR));
SSI_LOG_DEBUG("IRR=0x%08X\n", val);
dev_dbg(dev, "IRR=0x%08X\n", val);
CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_ICR), val);
/* Unmask relevant interrupt cause */
@@ -196,8 +177,8 @@ int init_cc_regs(struct ssi_drvdata *drvdata, bool is_probe)
DX_IRQ_DELAY);
#endif
if (CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRQ_TIMER_INIT_VAL)) > 0) {
SSI_LOG_DEBUG("irq_delay=%d CC cycles\n",
CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRQ_TIMER_INIT_VAL)));
dev_dbg(dev, "irq_delay=%d CC cycles\n",
CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRQ_TIMER_INIT_VAL)));
}
#endif
@@ -206,15 +187,15 @@ int init_cc_regs(struct ssi_drvdata *drvdata, bool is_probe)
val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CACHE_PARAMS));
if (is_probe)
SSI_LOG_INFO("Cache params previous: 0x%08X\n", val);
dev_info(dev, "Cache params previous: 0x%08X\n", val);
CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CACHE_PARAMS),
cache_params);
val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CACHE_PARAMS));
if (is_probe)
SSI_LOG_INFO("Cache params current: 0x%08X (expect: 0x%08X)\n",
val, cache_params);
dev_info(dev, "Cache params current: 0x%08X (expect: 0x%08X)\n",
val, cache_params);
return 0;
}
@@ -231,7 +212,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
new_drvdata = devm_kzalloc(dev, sizeof(*new_drvdata), GFP_KERNEL);
if (!new_drvdata) {
SSI_LOG_ERR("Failed to allocate drvdata");
dev_dbg(dev, "Failed to allocate drvdata");
rc = -ENOMEM;
goto post_drvdata_err;
}
@@ -247,24 +228,22 @@ static int init_cc_resources(struct platform_device *plat_dev)
/* Map registers space */
new_drvdata->cc_base = devm_ioremap_resource(dev, req_mem_cc_regs);
if (IS_ERR(new_drvdata->cc_base)) {
SSI_LOG_ERR("Failed to ioremap registers");
dev_err(dev, "Failed to ioremap registers");
rc = PTR_ERR(new_drvdata->cc_base);
goto post_drvdata_err;
}
SSI_LOG_DEBUG("Got MEM resource (%s): start=%pad end=%pad\n",
req_mem_cc_regs->name,
req_mem_cc_regs->start,
req_mem_cc_regs->end);
SSI_LOG_DEBUG("CC registers mapped from %pa to 0x%p\n",
&req_mem_cc_regs->start, new_drvdata->cc_base);
dev_dbg(dev, "Got MEM resource (%s): %pR\n", req_mem_cc_regs->name,
req_mem_cc_regs);
dev_dbg(dev, "CC registers mapped from %pa to 0x%p\n",
&req_mem_cc_regs->start, new_drvdata->cc_base);
cc_base = new_drvdata->cc_base;
/* Then IRQ */
new_drvdata->irq = platform_get_irq(plat_dev, 0);
if (new_drvdata->irq < 0) {
SSI_LOG_ERR("Failed getting IRQ resource\n");
dev_err(dev, "Failed getting IRQ resource\n");
rc = new_drvdata->irq;
goto post_drvdata_err;
}
@@ -272,11 +251,11 @@ static int init_cc_resources(struct platform_device *plat_dev)
rc = devm_request_irq(dev, new_drvdata->irq, cc_isr,
IRQF_SHARED, "arm_cc7x", new_drvdata);
if (rc) {
SSI_LOG_ERR("Could not register to interrupt %d\n",
new_drvdata->irq);
dev_err(dev, "Could not register to interrupt %d\n",
new_drvdata->irq);
goto post_drvdata_err;
}
SSI_LOG_DEBUG("Registered to IRQ: %d\n", new_drvdata->irq);
dev_dbg(dev, "Registered to IRQ: %d\n", new_drvdata->irq);
rc = cc_clk_on(new_drvdata);
if (rc)
@@ -291,91 +270,93 @@ static int init_cc_resources(struct platform_device *plat_dev)
/* Verify correct mapping */
signature_val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_SIGNATURE));
if (signature_val != DX_DEV_SIGNATURE) {
SSI_LOG_ERR("Invalid CC signature: SIGNATURE=0x%08X != expected=0x%08X\n",
signature_val, (u32)DX_DEV_SIGNATURE);
dev_err(dev, "Invalid CC signature: SIGNATURE=0x%08X != expected=0x%08X\n",
signature_val, (u32)DX_DEV_SIGNATURE);
rc = -EINVAL;
goto post_clk_err;
}
SSI_LOG_DEBUG("CC SIGNATURE=0x%08X\n", signature_val);
dev_dbg(dev, "CC SIGNATURE=0x%08X\n", signature_val);
/* Display HW versions */
SSI_LOG(KERN_INFO, "ARM CryptoCell %s Driver: HW version 0x%08X, Driver version %s\n", SSI_DEV_NAME_STR,
CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_VERSION)), DRV_MODULE_VERSION);
dev_info(dev, "ARM CryptoCell %s Driver: HW version 0x%08X, Driver version %s\n",
SSI_DEV_NAME_STR,
CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_VERSION)),
DRV_MODULE_VERSION);
rc = init_cc_regs(new_drvdata, true);
if (unlikely(rc != 0)) {
SSI_LOG_ERR("init_cc_regs failed\n");
dev_err(dev, "init_cc_regs failed\n");
goto post_clk_err;
}
#ifdef ENABLE_CC_SYSFS
rc = ssi_sysfs_init(&dev->kobj, new_drvdata);
if (unlikely(rc != 0)) {
SSI_LOG_ERR("init_stat_db failed\n");
dev_err(dev, "init_stat_db failed\n");
goto post_regs_err;
}
#endif
rc = ssi_fips_init(new_drvdata);
if (unlikely(rc != 0)) {
SSI_LOG_ERR("SSI_FIPS_INIT failed 0x%x\n", rc);
dev_err(dev, "SSI_FIPS_INIT failed 0x%x\n", rc);
goto post_sysfs_err;
}
rc = ssi_sram_mgr_init(new_drvdata);
if (unlikely(rc != 0)) {
SSI_LOG_ERR("ssi_sram_mgr_init failed\n");
dev_err(dev, "ssi_sram_mgr_init failed\n");
goto post_fips_init_err;
}
new_drvdata->mlli_sram_addr =
ssi_sram_mgr_alloc(new_drvdata, MAX_MLLI_BUFF_SIZE);
if (unlikely(new_drvdata->mlli_sram_addr == NULL_SRAM_ADDR)) {
SSI_LOG_ERR("Failed to alloc MLLI Sram buffer\n");
dev_err(dev, "Failed to alloc MLLI Sram buffer\n");
rc = -ENOMEM;
goto post_sram_mgr_err;
}
rc = request_mgr_init(new_drvdata);
if (unlikely(rc != 0)) {
SSI_LOG_ERR("request_mgr_init failed\n");
dev_err(dev, "request_mgr_init failed\n");
goto post_sram_mgr_err;
}
rc = ssi_buffer_mgr_init(new_drvdata);
if (unlikely(rc != 0)) {
SSI_LOG_ERR("buffer_mgr_init failed\n");
dev_err(dev, "buffer_mgr_init failed\n");
goto post_req_mgr_err;
}
rc = ssi_power_mgr_init(new_drvdata);
if (unlikely(rc != 0)) {
SSI_LOG_ERR("ssi_power_mgr_init failed\n");
dev_err(dev, "ssi_power_mgr_init failed\n");
goto post_buf_mgr_err;
}
rc = ssi_ivgen_init(new_drvdata);
if (unlikely(rc != 0)) {
SSI_LOG_ERR("ssi_ivgen_init failed\n");
dev_err(dev, "ssi_ivgen_init failed\n");
goto post_power_mgr_err;
}
/* Allocate crypto algs */
rc = ssi_ablkcipher_alloc(new_drvdata);
if (unlikely(rc != 0)) {
SSI_LOG_ERR("ssi_ablkcipher_alloc failed\n");
dev_err(dev, "ssi_ablkcipher_alloc failed\n");
goto post_ivgen_err;
}
/* hash must be allocated before aead since hash exports APIs */
rc = ssi_hash_alloc(new_drvdata);
if (unlikely(rc != 0)) {
SSI_LOG_ERR("ssi_hash_alloc failed\n");
dev_err(dev, "ssi_hash_alloc failed\n");
goto post_cipher_err;
}
rc = ssi_aead_alloc(new_drvdata);
if (unlikely(rc != 0)) {
SSI_LOG_ERR("ssi_aead_alloc failed\n");
dev_err(dev, "ssi_aead_alloc failed\n");
goto post_hash_err;
}
@@ -412,7 +393,7 @@ post_regs_err:
post_clk_err:
cc_clk_off(new_drvdata);
post_drvdata_err:
SSI_LOG_ERR("ccree init error occurred!\n");
dev_err(dev, "ccree init error occurred!\n");
dev_set_drvdata(dev, NULL);
return rc;
}
@@ -476,18 +457,19 @@ void cc_clk_off(struct ssi_drvdata *drvdata)
static int cc7x_probe(struct platform_device *plat_dev)
{
int rc;
struct device *dev = &plat_dev->dev;
#if defined(CONFIG_ARM) && defined(CC_DEBUG)
u32 ctr, cacheline_size;
asm volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr));
cacheline_size = 4 << ((ctr >> 16) & 0xf);
SSI_LOG_DEBUG("CP15(L1_CACHE_BYTES) = %u , Kconfig(L1_CACHE_BYTES) = %u\n",
cacheline_size, L1_CACHE_BYTES);
dev_dbg(dev, "CP15(L1_CACHE_BYTES) = %u , Kconfig(L1_CACHE_BYTES) = %u\n",
cacheline_size, L1_CACHE_BYTES);
asm volatile("mrc p15, 0, %0, c0, c0, 0" : "=r" (ctr));
SSI_LOG_DEBUG("Main ID register (MIDR): Implementer 0x%02X, Arch 0x%01X, Part 0x%03X, Rev r%dp%d\n",
(ctr >> 24), (ctr >> 16) & 0xF, (ctr >> 4) & 0xFFF,
(ctr >> 20) & 0xF, ctr & 0xF);
dev_dbg(dev, "Main ID register (MIDR): Implementer 0x%02X, Arch 0x%01X, Part 0x%03X, Rev r%dp%d\n",
(ctr >> 24), (ctr >> 16) & 0xF, (ctr >> 4) & 0xFFF,
(ctr >> 20) & 0xF, ctr & 0xF);
#endif
/* Map registers space */
@@ -495,18 +477,20 @@ static int cc7x_probe(struct platform_device *plat_dev)
if (rc != 0)
return rc;
SSI_LOG(KERN_INFO, "ARM cc7x_ree device initialized\n");
dev_info(dev, "ARM ccree device initialized\n");
return 0;
}
static int cc7x_remove(struct platform_device *plat_dev)
{
SSI_LOG_DEBUG("Releasing cc7x resources...\n");
struct device *dev = &plat_dev->dev;
dev_dbg(dev, "Releasing cc7x resources...\n");
cleanup_cc_resources(plat_dev);
SSI_LOG(KERN_INFO, "ARM cc7x_ree device terminated\n");
dev_info(dev, "ARM ccree device terminated\n");
return 0;
}

13
drivers/staging/ccree/ssi_driver.h
View File

@@ -91,19 +91,6 @@
* field in the HW descriptor. The DMA engine +8 that value.
*/
/* Logging macros */
#define SSI_LOG(level, format, ...) \
printk(level "cc715ree::%s: " format, __func__, ##__VA_ARGS__)
#define SSI_LOG_ERR(format, ...) SSI_LOG(KERN_ERR, format, ##__VA_ARGS__)
#define SSI_LOG_WARNING(format, ...) SSI_LOG(KERN_WARNING, format, ##__VA_ARGS__)
#define SSI_LOG_NOTICE(format, ...) SSI_LOG(KERN_NOTICE, format, ##__VA_ARGS__)
#define SSI_LOG_INFO(format, ...) SSI_LOG(KERN_INFO, format, ##__VA_ARGS__)
#ifdef CC_DEBUG
#define SSI_LOG_DEBUG(format, ...) SSI_LOG(KERN_DEBUG, format, ##__VA_ARGS__)
#else /* Debug log messages are removed at compile time for non-DEBUG config. */
#define SSI_LOG_DEBUG(format, ...) do {} while (0)
#endif
#define MIN(a, b) (((a) < (b)) ? (a) : (b))
#define MAX(a, b) (((a) > (b)) ? (a) : (b))

12
drivers/staging/ccree/ssi_fips.c
View File

@@ -76,18 +76,19 @@ void fips_handler(struct ssi_drvdata *drvdata)
tasklet_schedule(&fips_handle_ptr->tasklet);
}
static inline void tee_fips_error(void)
static inline void tee_fips_error(struct device *dev)
{
if (fips_enabled)
panic("ccree: TEE reported cryptographic error in fips mode!\n");
else
SSI_LOG_ERR("TEE reported error!\n");
dev_err(dev, "TEE reported error!\n");
}
/* Deferred service handler, run as interrupt-fired tasklet */
static void fips_dsr(unsigned long devarg)
{
struct ssi_drvdata *drvdata = (struct ssi_drvdata *)devarg;
struct device *dev = drvdata_to_dev(drvdata);
void __iomem *cc_base = drvdata->cc_base;
u32 irq, state, val;
@@ -97,7 +98,7 @@ static void fips_dsr(unsigned long devarg)
state = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, GPR_HOST));
if (state != (CC_FIPS_SYNC_TEE_STATUS | CC_FIPS_SYNC_MODULE_OK))
tee_fips_error();
tee_fips_error(dev);
}
/* after verifing that there is nothing to do,
@@ -111,6 +112,7 @@ static void fips_dsr(unsigned long devarg)
int ssi_fips_init(struct ssi_drvdata *p_drvdata)
{
struct ssi_fips_handle *fips_h;
struct device *dev = drvdata_to_dev(p_drvdata);
fips_h = kzalloc(sizeof(*fips_h), GFP_KERNEL);
if (!fips_h)
@@ -118,11 +120,11 @@ int ssi_fips_init(struct ssi_drvdata *p_drvdata)
p_drvdata->fips_handle = fips_h;
SSI_LOG_DEBUG("Initializing fips tasklet\n");
dev_dbg(dev, "Initializing fips tasklet\n");
tasklet_init(&fips_h->tasklet, fips_dsr, (unsigned long)p_drvdata);
if (!cc_get_tee_fips_status(p_drvdata))
tee_fips_error();
tee_fips_error(dev);
return 0;
}

297
drivers/staging/ccree/ssi_hash.c
View File

File diff suppressed because it is too large Load Diff

13
drivers/staging/ccree/ssi_ivgen.c
View File

@@ -194,8 +194,8 @@ int ssi_ivgen_init(struct ssi_drvdata *drvdata)
drvdata->ivgen_handle = kzalloc(sizeof(*drvdata->ivgen_handle),
GFP_KERNEL);
if (!drvdata->ivgen_handle) {
SSI_LOG_ERR("Not enough memory to allocate IVGEN context "
"(%zu B)\n", sizeof(*drvdata->ivgen_handle));
dev_err(device, "Not enough memory to allocate IVGEN context (%zu B)\n",
sizeof(*drvdata->ivgen_handle));
rc = -ENOMEM;
goto out;
}
@@ -206,15 +206,15 @@ int ssi_ivgen_init(struct ssi_drvdata *drvdata)
&ivgen_ctx->pool_meta_dma,
GFP_KERNEL);
if (!ivgen_ctx->pool_meta) {
SSI_LOG_ERR("Not enough memory to allocate DMA of pool_meta "
"(%u B)\n", SSI_IVPOOL_META_SIZE);
dev_err(device, "Not enough memory to allocate DMA of pool_meta (%u B)\n",
SSI_IVPOOL_META_SIZE);
rc = -ENOMEM;
goto out;
}
/* Allocate IV pool in SRAM */
ivgen_ctx->pool = ssi_sram_mgr_alloc(drvdata, SSI_IVPOOL_SIZE);
if (ivgen_ctx->pool == NULL_SRAM_ADDR) {
SSI_LOG_ERR("SRAM pool exhausted\n");
dev_err(device, "SRAM pool exhausted\n");
rc = -ENOMEM;
goto out;
}
@@ -248,6 +248,7 @@ int ssi_ivgen_getiv(
{
struct ssi_ivgen_ctx *ivgen_ctx = drvdata->ivgen_handle;
unsigned int idx = *iv_seq_len;
struct device *dev = drvdata_to_dev(drvdata);
unsigned int t;
if ((iv_out_size != CC_AES_IV_SIZE) &&
@@ -291,7 +292,7 @@ int ssi_ivgen_getiv(
ivgen_ctx->next_iv_ofs += iv_out_size;
if ((SSI_IVPOOL_SIZE - ivgen_ctx->next_iv_ofs) < CC_AES_IV_SIZE) {
SSI_LOG_DEBUG("Pool exhausted, regenerating iv-pool\n");
dev_dbg(dev, "Pool exhausted, regenerating iv-pool\n");
/* pool is drained -regenerate it! */
return ssi_ivgen_generate_pool(ivgen_ctx, iv_seq, iv_seq_len);
}

15
drivers/staging/ccree/ssi_pm.c
View File

@@ -40,11 +40,12 @@ int ssi_power_mgr_runtime_suspend(struct device *dev)
(struct ssi_drvdata *)dev_get_drvdata(dev);
int rc;
SSI_LOG_DEBUG("set HOST_POWER_DOWN_EN\n");
dev_dbg(dev, "set HOST_POWER_DOWN_EN\n");
WRITE_REGISTER(drvdata->cc_base + CC_REG_OFFSET(HOST_RGF, HOST_POWER_DOWN_EN), POWER_DOWN_ENABLE);
rc = ssi_request_mgr_runtime_suspend_queue(drvdata);
if (rc != 0) {
SSI_LOG_ERR("ssi_request_mgr_runtime_suspend_queue (%x)\n", rc);
dev_err(dev, "ssi_request_mgr_runtime_suspend_queue (%x)\n",
rc);
return rc;
}
fini_cc_regs(drvdata);
@@ -58,24 +59,24 @@ int ssi_power_mgr_runtime_resume(struct device *dev)
struct ssi_drvdata *drvdata =
(struct ssi_drvdata *)dev_get_drvdata(dev);
SSI_LOG_DEBUG("unset HOST_POWER_DOWN_EN\n");
dev_dbg(dev, "unset HOST_POWER_DOWN_EN\n");
WRITE_REGISTER(drvdata->cc_base + CC_REG_OFFSET(HOST_RGF, HOST_POWER_DOWN_EN), POWER_DOWN_DISABLE);
rc = cc_clk_on(drvdata);
if (rc) {
SSI_LOG_ERR("failed getting clock back on. We're toast.\n");
dev_err(dev, "failed getting clock back on. We're toast.\n");
return rc;
}
rc = init_cc_regs(drvdata, false);
if (rc != 0) {
SSI_LOG_ERR("init_cc_regs (%x)\n", rc);
dev_err(dev, "init_cc_regs (%x)\n", rc);
return rc;
}
rc = ssi_request_mgr_runtime_resume_queue(drvdata);
if (rc != 0) {
SSI_LOG_ERR("ssi_request_mgr_runtime_resume_queue (%x)\n", rc);
dev_err(dev, "ssi_request_mgr_runtime_resume_queue (%x)\n", rc);
return rc;
}
@@ -109,7 +110,7 @@ int ssi_power_mgr_runtime_put_suspend(struct device *dev)
rc = pm_runtime_put_autosuspend(dev);
} else {
/* Something wrong happens*/
SSI_LOG_ERR("request to suspend already suspended queue");
dev_err(dev, "request to suspend already suspended queue");
rc = -EBUSY;
}
return rc;

87
drivers/staging/ccree/ssi_request_mgr.c
View File

@@ -78,9 +78,9 @@ void request_mgr_fini(struct ssi_drvdata *drvdata)
req_mgr_h->dummy_comp_buff_dma);
}
SSI_LOG_DEBUG("max_used_hw_slots=%d\n", (req_mgr_h->hw_queue_size -
dev_dbg(dev, "max_used_hw_slots=%d\n", (req_mgr_h->hw_queue_size -
req_mgr_h->min_free_hw_slots));
SSI_LOG_DEBUG("max_used_sw_slots=%d\n", req_mgr_h->max_used_sw_slots);
dev_dbg(dev, "max_used_sw_slots=%d\n", req_mgr_h->max_used_sw_slots);
#ifdef COMP_IN_WQ
flush_workqueue(req_mgr_h->workq);
@@ -110,24 +110,24 @@ int request_mgr_init(struct ssi_drvdata *drvdata)
spin_lock_init(&req_mgr_h->hw_lock);
#ifdef COMP_IN_WQ
SSI_LOG_DEBUG("Initializing completion workqueue\n");
dev_dbg(dev, "Initializing completion workqueue\n");
req_mgr_h->workq = create_singlethread_workqueue("arm_cc7x_wq");
if (unlikely(!req_mgr_h->workq)) {
SSI_LOG_ERR("Failed creating work queue\n");
dev_err(dev, "Failed creating work queue\n");
rc = -ENOMEM;
goto req_mgr_init_err;
}
INIT_DELAYED_WORK(&req_mgr_h->compwork, comp_work_handler);
#else
SSI_LOG_DEBUG("Initializing completion tasklet\n");
dev_dbg(dev, "Initializing completion tasklet\n");
tasklet_init(&req_mgr_h->comptask, comp_handler, (unsigned long)drvdata);
#endif
req_mgr_h->hw_queue_size = READ_REGISTER(drvdata->cc_base +
CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_SRAM_SIZE));
SSI_LOG_DEBUG("hw_queue_size=0x%08X\n", req_mgr_h->hw_queue_size);
dev_dbg(dev, "hw_queue_size=0x%08X\n", req_mgr_h->hw_queue_size);
if (req_mgr_h->hw_queue_size < MIN_HW_QUEUE_SIZE) {
SSI_LOG_ERR("Invalid HW queue size = %u (Min. required is %u)\n",
req_mgr_h->hw_queue_size, MIN_HW_QUEUE_SIZE);
dev_err(dev, "Invalid HW queue size = %u (Min. required is %u)\n",
req_mgr_h->hw_queue_size, MIN_HW_QUEUE_SIZE);
rc = -ENOMEM;
goto req_mgr_init_err;
}
@@ -139,8 +139,8 @@ int request_mgr_init(struct ssi_drvdata *drvdata)
&req_mgr_h->dummy_comp_buff_dma,
GFP_KERNEL);
if (!req_mgr_h->dummy_comp_buff) {
SSI_LOG_ERR("Not enough memory to allocate DMA (%zu) dropped "
"buffer\n", sizeof(u32));
dev_err(dev, "Not enough memory to allocate DMA (%zu) dropped buffer\n",
sizeof(u32));
rc = -ENOMEM;
goto req_mgr_init_err;
}
@@ -175,9 +175,9 @@ static inline void enqueue_seq(
wmb();
writel_relaxed(seq[i].word[5], (volatile void __iomem *)(cc_base + CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0)));
#ifdef DX_DUMP_DESCS
SSI_LOG_DEBUG("desc[%02d]: 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n", i,
seq[i].word[0], seq[i].word[1], seq[i].word[2],
seq[i].word[3], seq[i].word[4], seq[i].word[5]);
dev_dbg(dev, "desc[%02d]: 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
i, seq[i].word[0], seq[i].word[1], seq[i].word[2],
seq[i].word[3], seq[i].word[4], seq[i].word[5]);
#endif
}
}
@@ -197,6 +197,7 @@ static void request_mgr_complete(struct device *dev, void *dx_compl_h, void __io
}
static inline int request_mgr_queues_status_check(
struct device *dev,
struct ssi_request_mgr_handle *req_mgr_h,
void __iomem *cc_base,
unsigned int total_seq_len)
@@ -210,8 +211,8 @@ static inline int request_mgr_queues_status_check(
if (unlikely(((req_mgr_h->req_queue_head + 1) &
(MAX_REQUEST_QUEUE_SIZE - 1)) ==
req_mgr_h->req_queue_tail)) {
SSI_LOG_ERR("SW FIFO is full. req_queue_head=%d sw_fifo_len=%d\n",
req_mgr_h->req_queue_head, MAX_REQUEST_QUEUE_SIZE);
dev_err(dev, "SW FIFO is full. req_queue_head=%d sw_fifo_len=%d\n",
req_mgr_h->req_queue_head, MAX_REQUEST_QUEUE_SIZE);
return -EBUSY;
}
@@ -233,16 +234,13 @@ static inline int request_mgr_queues_status_check(
return 0;
}
SSI_LOG_DEBUG("HW FIFO is full. q_free_slots=%d total_seq_len=%d\n",
req_mgr_h->q_free_slots, total_seq_len);
dev_dbg(dev, "HW FIFO is full. q_free_slots=%d total_seq_len=%d\n",
req_mgr_h->q_free_slots, total_seq_len);
}
/* No room in the HW queue try again later */
SSI_LOG_DEBUG("HW FIFO full, timeout. req_queue_head=%d "
"sw_fifo_len=%d q_free_slots=%d total_seq_len=%d\n",
req_mgr_h->req_queue_head,
MAX_REQUEST_QUEUE_SIZE,
req_mgr_h->q_free_slots,
total_seq_len);
dev_dbg(dev, "HW FIFO full, timeout. req_queue_head=%d sw_fifo_len=%d q_free_slots=%d total_seq_len=%d\n",
req_mgr_h->req_queue_head, MAX_REQUEST_QUEUE_SIZE,
req_mgr_h->q_free_slots, total_seq_len);
return -EAGAIN;
}
@@ -269,9 +267,7 @@ int send_request(
unsigned int iv_seq_len = 0;
unsigned int total_seq_len = len; /*initial sequence length*/
struct cc_hw_desc iv_seq[SSI_IVPOOL_SEQ_LEN];
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
struct device *dev = drvdata_to_dev(drvdata);
#endif
int rc;
unsigned int max_required_seq_len = (total_seq_len +
((ssi_req->ivgen_dma_addr_len == 0) ? 0 :
@@ -281,7 +277,7 @@ int send_request(
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
rc = ssi_power_mgr_runtime_get(dev);
if (rc != 0) {
SSI_LOG_ERR("ssi_power_mgr_runtime_get returned %x\n", rc);
dev_err(dev, "ssi_power_mgr_runtime_get returned %x\n", rc);
return rc;
}
#endif
@@ -293,7 +289,7 @@ int send_request(
* in case iv gen add the max size and in case of no dout add 1
* for the internal completion descriptor
*/
rc = request_mgr_queues_status_check(req_mgr_h, cc_base,
rc = request_mgr_queues_status_check(dev, req_mgr_h, cc_base,
max_required_seq_len);
if (likely(rc == 0))
/* There is enough place in the queue */
@@ -326,12 +322,12 @@ int send_request(
}
if (ssi_req->ivgen_dma_addr_len > 0) {
SSI_LOG_DEBUG("Acquire IV from pool into %d DMA addresses %pad, %pad, %pad, IV-size=%u\n",
ssi_req->ivgen_dma_addr_len,
ssi_req->ivgen_dma_addr[0],
ssi_req->ivgen_dma_addr[1],
ssi_req->ivgen_dma_addr[2],
ssi_req->ivgen_size);
dev_dbg(dev, "Acquire IV from pool into %d DMA addresses %pad, %pad, %pad, IV-size=%u\n",
ssi_req->ivgen_dma_addr_len,
&ssi_req->ivgen_dma_addr[0],
&ssi_req->ivgen_dma_addr[1],
&ssi_req->ivgen_dma_addr[2],
ssi_req->ivgen_size);
/* Acquire IV from pool */
rc = ssi_ivgen_getiv(drvdata, ssi_req->ivgen_dma_addr,
@@ -339,7 +335,7 @@ int send_request(
ssi_req->ivgen_size, iv_seq, &iv_seq_len);
if (unlikely(rc != 0)) {
SSI_LOG_ERR("Failed to generate IV (rc=%d)\n", rc);
dev_err(dev, "Failed to generate IV (rc=%d)\n", rc);
spin_unlock_bh(&req_mgr_h->hw_lock);
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
ssi_power_mgr_runtime_put_suspend(dev);
@@ -359,7 +355,7 @@ int send_request(
req_mgr_h->req_queue_head = (req_mgr_h->req_queue_head + 1) & (MAX_REQUEST_QUEUE_SIZE - 1);
/* TODO: Use circ_buf.h ? */
SSI_LOG_DEBUG("Enqueue request head=%u\n", req_mgr_h->req_queue_head);
dev_dbg(dev, "Enqueue request head=%u\n", req_mgr_h->req_queue_head);
#ifdef FLUSH_CACHE_ALL
flush_cache_all();
@@ -375,7 +371,7 @@ int send_request(
* with resuming power. Set the free slot count to 0 and hope
* for the best.
*/
SSI_LOG_ERR("HW free slot count mismatch.");
dev_err(dev, "HW free slot count mismatch.");
req_mgr_h->q_free_slots = 0;
} else {
/* Update the free slots in HW queue */
@@ -410,13 +406,15 @@ int send_request(
int send_request_init(
struct ssi_drvdata *drvdata, struct cc_hw_desc *desc, unsigned int len)
{
struct device *dev = drvdata_to_dev(drvdata);
void __iomem *cc_base = drvdata->cc_base;
struct ssi_request_mgr_handle *req_mgr_h = drvdata->request_mgr_handle;
unsigned int total_seq_len = len; /*initial sequence length*/
int rc = 0;
/* Wait for space in HW and SW FIFO. Poll for as much as FIFO_TIMEOUT. */
rc = request_mgr_queues_status_check(req_mgr_h, cc_base, total_seq_len);
rc = request_mgr_queues_status_check(dev, req_mgr_h, cc_base,
total_seq_len);
if (unlikely(rc != 0))
return rc;
@@ -471,8 +469,8 @@ static void proc_completions(struct ssi_drvdata *drvdata)
* queue is empty. This is not normal. Return and
* hope for the best.
*/
SSI_LOG_ERR("Request queue is empty head == tail %u\n",
request_mgr_handle->req_queue_head);
dev_err(dev, "Request queue is empty head == tail %u\n",
request_mgr_handle->req_queue_head);
break;
}
@@ -488,7 +486,7 @@ static void proc_completions(struct ssi_drvdata *drvdata)
u32 axi_err;
int i;
SSI_LOG_INFO("Delay\n");
dev_info(dev, "Delay\n");
for (i = 0; i < 1000000; i++)
axi_err = READ_REGISTER(drvdata->cc_base + CC_REG_OFFSET(CRY_KERNEL, AXIM_MON_ERR));
}
@@ -498,12 +496,15 @@ static void proc_completions(struct ssi_drvdata *drvdata)
ssi_req->user_cb(dev, ssi_req->user_arg,
drvdata->cc_base);
request_mgr_handle->req_queue_tail = (request_mgr_handle->req_queue_tail + 1) & (MAX_REQUEST_QUEUE_SIZE - 1);
SSI_LOG_DEBUG("Dequeue request tail=%u\n", request_mgr_handle->req_queue_tail);
SSI_LOG_DEBUG("Request completed. axi_completed=%d\n", request_mgr_handle->axi_completed);
dev_dbg(dev, "Dequeue request tail=%u\n",
request_mgr_handle->req_queue_tail);
dev_dbg(dev, "Request completed. axi_completed=%d\n",
request_mgr_handle->axi_completed);
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
rc = ssi_power_mgr_runtime_put_suspend(dev);
if (rc != 0)
SSI_LOG_ERR("Failed to set runtime suspension %d\n", rc);
dev_err(dev, "Failed to set runtime suspension %d\n",
rc);
#endif
}
}

16
drivers/staging/ccree/ssi_sram_mgr.c
View File

@@ -51,14 +51,15 @@ void ssi_sram_mgr_fini(struct ssi_drvdata *drvdata)
int ssi_sram_mgr_init(struct ssi_drvdata *drvdata)
{
struct ssi_sram_mgr_ctx *smgr_ctx;
struct device *dev = drvdata_to_dev(drvdata);
int rc;
/* Allocate "this" context */
drvdata->sram_mgr_handle = kzalloc(
sizeof(struct ssi_sram_mgr_ctx), GFP_KERNEL);
if (!drvdata->sram_mgr_handle) {
SSI_LOG_ERR("Not enough memory to allocate SRAM_MGR ctx (%zu)\n",
sizeof(struct ssi_sram_mgr_ctx));
dev_err(dev, "Not enough memory to allocate SRAM_MGR ctx (%zu)\n",
sizeof(struct ssi_sram_mgr_ctx));
rc = -ENOMEM;
goto out;
}
@@ -86,22 +87,23 @@ out:
ssi_sram_addr_t ssi_sram_mgr_alloc(struct ssi_drvdata *drvdata, u32 size)
{
struct ssi_sram_mgr_ctx *smgr_ctx = drvdata->sram_mgr_handle;
struct device *dev = drvdata_to_dev(drvdata);
ssi_sram_addr_t p;
if (unlikely((size & 0x3) != 0)) {
SSI_LOG_ERR("Requested buffer size (%u) is not multiple of 4",
size);
dev_err(dev, "Requested buffer size (%u) is not multiple of 4",
size);
return NULL_SRAM_ADDR;
}
if (unlikely(size > (SSI_CC_SRAM_SIZE - smgr_ctx->sram_free_offset))) {
SSI_LOG_ERR("Not enough space to allocate %u B (at offset %llu)\n",
size, smgr_ctx->sram_free_offset);
dev_err(dev, "Not enough space to allocate %u B (at offset %llu)\n",
size, smgr_ctx->sram_free_offset);
return NULL_SRAM_ADDR;
}
p = smgr_ctx->sram_free_offset;
smgr_ctx->sram_free_offset += size;
SSI_LOG_DEBUG("Allocated %u B @ %u\n", size, (unsigned int)p);
dev_dbg(dev, "Allocated %u B @ %u\n", size, (unsigned int)p);
return p;
}

3
drivers/staging/ccree/ssi_sysfs.c
View File

@@ -153,8 +153,9 @@ static void sys_free_dir(struct sys_dir *sys_dir)
int ssi_sysfs_init(struct kobject *sys_dev_obj, struct ssi_drvdata *drvdata)
{
int retval;
struct device *dev = drvdata_to_dev(drvdata);
SSI_LOG_ERR("setup sysfs under %s\n", sys_dev_obj->name);
dev_info(dev, "setup sysfs under %s\n", sys_dev_obj->name);
/* Initialize top directory */
retval = sys_init_dir(&sys_top_dir, drvdata, sys_dev_obj, "cc_info",