mirror of
https://github.com/ukui/kernel.git
synced 2026-03-09 10:07:04 -07:00
Merge branch 'for-linus' into for-next
Taking the 5.5 devel branch back into the main devel branch. A USB-audio fix needs to be adjusted to adapt the changes that have been formerly applied for stop_sync. Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
@@ -1150,6 +1150,7 @@ struct snd_soc_pcm_runtime {
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unsigned int num_codecs;
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struct delayed_work delayed_work;
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void (*close_delayed_work_func)(struct snd_soc_pcm_runtime *rtd);
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#ifdef CONFIG_DEBUG_FS
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struct dentry *debugfs_dpcm_root;
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#endif
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@@ -740,6 +740,10 @@ static int snd_pcm_hw_params(struct snd_pcm_substream *substream,
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while (runtime->boundary * 2 <= LONG_MAX - runtime->buffer_size)
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runtime->boundary *= 2;
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/* clear the buffer for avoiding possible kernel info leaks */
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if (runtime->dma_area && !substream->ops->copy_user)
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memset(runtime->dma_area, 0, runtime->dma_bytes);
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snd_pcm_timer_resolution_change(substream);
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snd_pcm_set_state(substream, SNDRV_PCM_STATE_SETUP);
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@@ -120,10 +120,8 @@ void snd_hdac_stream_clear(struct hdac_stream *azx_dev)
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snd_hdac_stream_updateb(azx_dev, SD_CTL,
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SD_CTL_DMA_START | SD_INT_MASK, 0);
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snd_hdac_stream_writeb(azx_dev, SD_STS, SD_INT_MASK); /* to be sure */
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if (azx_dev->stripe) {
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if (azx_dev->stripe)
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snd_hdac_stream_updateb(azx_dev, SD_CTL_3B, SD_CTL_STRIPE_MASK, 0);
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azx_dev->stripe = 0;
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}
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azx_dev->running = false;
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}
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EXPORT_SYMBOL_GPL(snd_hdac_stream_clear);
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@@ -835,7 +835,7 @@ static int azx_rirb_get_response(struct hdac_bus *bus, unsigned int addr,
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return -EAGAIN; /* give a chance to retry */
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}
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dev_WARN(chip->card->dev,
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dev_err(chip->card->dev,
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"azx_get_response timeout, switching to single_cmd mode: last cmd=0x%08x\n",
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bus->last_cmd[addr]);
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chip->single_cmd = 1;
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@@ -1809,13 +1809,14 @@ struct scp_msg {
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static void dspio_clear_response_queue(struct hda_codec *codec)
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{
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unsigned long timeout = jiffies + msecs_to_jiffies(1000);
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unsigned int dummy = 0;
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int status = -1;
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int status;
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/* clear all from the response queue */
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do {
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status = dspio_read(codec, &dummy);
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} while (status == 0);
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} while (status == 0 && time_before(jiffies, timeout));
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}
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static int dspio_get_response_data(struct hda_codec *codec)
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@@ -7588,12 +7589,14 @@ static void ca0132_process_dsp_response(struct hda_codec *codec,
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struct ca0132_spec *spec = codec->spec;
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codec_dbg(codec, "ca0132_process_dsp_response\n");
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snd_hda_power_up_pm(codec);
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if (spec->wait_scp) {
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if (dspio_get_response_data(codec) >= 0)
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spec->wait_scp = 0;
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}
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dspio_clear_response_queue(codec);
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snd_hda_power_down_pm(codec);
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}
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static void hp_callback(struct hda_codec *codec, struct hda_jack_callback *cb)
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@@ -7604,11 +7607,10 @@ static void hp_callback(struct hda_codec *codec, struct hda_jack_callback *cb)
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/* Delay enabling the HP amp, to let the mic-detection
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* state machine run.
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*/
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cancel_delayed_work(&spec->unsol_hp_work);
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schedule_delayed_work(&spec->unsol_hp_work, msecs_to_jiffies(500));
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tbl = snd_hda_jack_tbl_get(codec, cb->nid);
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if (tbl)
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tbl->block_report = 1;
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schedule_delayed_work(&spec->unsol_hp_work, msecs_to_jiffies(500));
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}
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static void amic_callback(struct hda_codec *codec, struct hda_jack_callback *cb)
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@@ -8454,12 +8456,25 @@ static void ca0132_reboot_notify(struct hda_codec *codec)
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codec->patch_ops.free(codec);
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}
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#ifdef CONFIG_PM
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static int ca0132_suspend(struct hda_codec *codec)
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{
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struct ca0132_spec *spec = codec->spec;
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cancel_delayed_work_sync(&spec->unsol_hp_work);
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return 0;
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}
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#endif
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static const struct hda_codec_ops ca0132_patch_ops = {
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.build_controls = ca0132_build_controls,
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.build_pcms = ca0132_build_pcms,
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.init = ca0132_init,
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.free = ca0132_free,
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.unsol_event = snd_hda_jack_unsol_event,
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#ifdef CONFIG_PM
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.suspend = ca0132_suspend,
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#endif
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.reboot_notify = ca0132_reboot_notify,
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};
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@@ -2021,6 +2021,8 @@ static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
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per_cvt->assigned = 0;
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hinfo->nid = 0;
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azx_stream(get_azx_dev(substream))->stripe = 0;
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mutex_lock(&spec->pcm_lock);
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snd_hda_spdif_ctls_unassign(codec, pcm_idx);
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clear_bit(pcm_idx, &spec->pcm_in_use);
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@@ -7643,11 +7643,6 @@ static const struct snd_hda_pin_quirk alc269_pin_fixup_tbl[] = {
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{0x1a, 0x90a70130},
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{0x1b, 0x90170110},
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{0x21, 0x03211020}),
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SND_HDA_PIN_QUIRK(0x10ec0274, 0x1028, "Dell", ALC274_FIXUP_DELL_AIO_LINEOUT_VERB,
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{0x12, 0xb7a60130},
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{0x13, 0xb8a61140},
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{0x16, 0x90170110},
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{0x21, 0x04211020}),
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SND_HDA_PIN_QUIRK(0x10ec0280, 0x103c, "HP", ALC280_FIXUP_HP_GPIO4,
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{0x12, 0x90a60130},
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{0x14, 0x90170110},
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@@ -7841,6 +7836,9 @@ static const struct snd_hda_pin_quirk alc269_fallback_pin_fixup_tbl[] = {
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SND_HDA_PIN_QUIRK(0x10ec0236, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
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{0x19, 0x40000000},
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{0x1a, 0x40000000}),
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SND_HDA_PIN_QUIRK(0x10ec0274, 0x1028, "Dell", ALC274_FIXUP_DELL_AIO_LINEOUT_VERB,
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{0x19, 0x40000000},
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{0x1a, 0x40000000}),
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{}
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};
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@@ -96,14 +96,19 @@ static int cz_da7219_init(struct snd_soc_pcm_runtime *rtd)
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return 0;
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}
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static int da7219_clk_enable(struct snd_pcm_substream *substream,
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int wclk_rate, int bclk_rate)
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static int da7219_clk_enable(struct snd_pcm_substream *substream)
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{
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int ret = 0;
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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clk_set_rate(da7219_dai_wclk, wclk_rate);
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clk_set_rate(da7219_dai_bclk, bclk_rate);
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/*
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* Set wclk to 48000 because the rate constraint of this driver is
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* 48000. ADAU7002 spec: "The ADAU7002 requires a BCLK rate that is
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* minimum of 64x the LRCLK sample rate." DA7219 is the only clk
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* source so for all codecs we have to limit bclk to 64X lrclk.
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*/
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clk_set_rate(da7219_dai_wclk, 48000);
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clk_set_rate(da7219_dai_bclk, 48000 * 64);
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ret = clk_prepare_enable(da7219_dai_bclk);
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if (ret < 0) {
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dev_err(rtd->dev, "can't enable master clock %d\n", ret);
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@@ -156,7 +161,7 @@ static int cz_da7219_play_startup(struct snd_pcm_substream *substream)
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&constraints_rates);
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machine->play_i2s_instance = I2S_SP_INSTANCE;
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return 0;
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return da7219_clk_enable(substream);
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}
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static int cz_da7219_cap_startup(struct snd_pcm_substream *substream)
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@@ -178,7 +183,7 @@ static int cz_da7219_cap_startup(struct snd_pcm_substream *substream)
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machine->cap_i2s_instance = I2S_SP_INSTANCE;
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machine->capture_channel = CAP_CHANNEL1;
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return 0;
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return da7219_clk_enable(substream);
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}
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static int cz_max_startup(struct snd_pcm_substream *substream)
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@@ -199,7 +204,7 @@ static int cz_max_startup(struct snd_pcm_substream *substream)
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&constraints_rates);
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machine->play_i2s_instance = I2S_BT_INSTANCE;
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return 0;
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return da7219_clk_enable(substream);
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}
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static int cz_dmic0_startup(struct snd_pcm_substream *substream)
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@@ -220,7 +225,7 @@ static int cz_dmic0_startup(struct snd_pcm_substream *substream)
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&constraints_rates);
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machine->cap_i2s_instance = I2S_BT_INSTANCE;
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return 0;
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return da7219_clk_enable(substream);
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}
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static int cz_dmic1_startup(struct snd_pcm_substream *substream)
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@@ -242,25 +247,7 @@ static int cz_dmic1_startup(struct snd_pcm_substream *substream)
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machine->cap_i2s_instance = I2S_SP_INSTANCE;
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machine->capture_channel = CAP_CHANNEL0;
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return 0;
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}
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static int cz_da7219_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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int wclk, bclk;
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wclk = params_rate(params);
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bclk = wclk * params_channels(params) *
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snd_pcm_format_width(params_format(params));
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/* ADAU7002 spec: "The ADAU7002 requires a BCLK rate
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* that is minimum of 64x the LRCLK sample rate."
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* DA7219 is the only clk source so for all codecs
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* we have to limit bclk to 64X lrclk.
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*/
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if (bclk < (wclk * 64))
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bclk = wclk * 64;
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return da7219_clk_enable(substream, wclk, bclk);
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return da7219_clk_enable(substream);
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}
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static void cz_da7219_shutdown(struct snd_pcm_substream *substream)
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@@ -271,31 +258,26 @@ static void cz_da7219_shutdown(struct snd_pcm_substream *substream)
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static const struct snd_soc_ops cz_da7219_play_ops = {
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.startup = cz_da7219_play_startup,
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.shutdown = cz_da7219_shutdown,
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.hw_params = cz_da7219_params,
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};
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static const struct snd_soc_ops cz_da7219_cap_ops = {
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.startup = cz_da7219_cap_startup,
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.shutdown = cz_da7219_shutdown,
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.hw_params = cz_da7219_params,
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};
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static const struct snd_soc_ops cz_max_play_ops = {
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.startup = cz_max_startup,
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.shutdown = cz_da7219_shutdown,
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.hw_params = cz_da7219_params,
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};
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static const struct snd_soc_ops cz_dmic0_cap_ops = {
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.startup = cz_dmic0_startup,
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.shutdown = cz_da7219_shutdown,
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.hw_params = cz_da7219_params,
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};
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static const struct snd_soc_ops cz_dmic1_cap_ops = {
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.startup = cz_dmic1_startup,
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.shutdown = cz_da7219_shutdown,
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.hw_params = cz_da7219_params,
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};
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SND_SOC_DAILINK_DEF(designware1,
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@@ -2103,26 +2103,40 @@ static void max98090_pll_det_disable_work(struct work_struct *work)
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M98090_IULK_MASK, 0);
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}
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static void max98090_pll_work(struct work_struct *work)
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static void max98090_pll_work(struct max98090_priv *max98090)
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{
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struct max98090_priv *max98090 =
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container_of(work, struct max98090_priv, pll_work);
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struct snd_soc_component *component = max98090->component;
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unsigned int pll;
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int i;
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if (!snd_soc_component_is_active(component))
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return;
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dev_info_ratelimited(component->dev, "PLL unlocked\n");
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/*
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* As the datasheet suggested, the maximum PLL lock time should be
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* 7 msec. The workaround resets the codec softly by toggling SHDN
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* off and on if PLL failed to lock for 10 msec. Notably, there is
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* no suggested hold time for SHDN off.
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*/
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/* Toggle shutdown OFF then ON */
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snd_soc_component_update_bits(component, M98090_REG_DEVICE_SHUTDOWN,
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M98090_SHDNN_MASK, 0);
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msleep(10);
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snd_soc_component_update_bits(component, M98090_REG_DEVICE_SHUTDOWN,
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M98090_SHDNN_MASK, M98090_SHDNN_MASK);
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/* Give PLL time to lock */
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msleep(10);
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for (i = 0; i < 10; ++i) {
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/* Give PLL time to lock */
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usleep_range(1000, 1200);
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/* Check lock status */
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pll = snd_soc_component_read32(
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component, M98090_REG_DEVICE_STATUS);
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if (!(pll & M98090_ULK_MASK))
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break;
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}
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}
|
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|
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static void max98090_jack_work(struct work_struct *work)
|
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@@ -2259,7 +2273,7 @@ static irqreturn_t max98090_interrupt(int irq, void *data)
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|
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if (active & M98090_ULK_MASK) {
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dev_dbg(component->dev, "M98090_ULK_MASK\n");
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schedule_work(&max98090->pll_work);
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max98090_pll_work(max98090);
|
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}
|
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|
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if (active & M98090_JDET_MASK) {
|
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@@ -2422,7 +2436,6 @@ static int max98090_probe(struct snd_soc_component *component)
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max98090_pll_det_enable_work);
|
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INIT_WORK(&max98090->pll_det_disable_work,
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max98090_pll_det_disable_work);
|
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INIT_WORK(&max98090->pll_work, max98090_pll_work);
|
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|
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/* Enable jack detection */
|
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snd_soc_component_write(component, M98090_REG_JACK_DETECT,
|
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@@ -2475,7 +2488,6 @@ static void max98090_remove(struct snd_soc_component *component)
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cancel_delayed_work_sync(&max98090->jack_work);
|
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cancel_delayed_work_sync(&max98090->pll_det_enable_work);
|
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cancel_work_sync(&max98090->pll_det_disable_work);
|
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cancel_work_sync(&max98090->pll_work);
|
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max98090->component = NULL;
|
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}
|
||||
|
||||
|
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@@ -1530,7 +1530,6 @@ struct max98090_priv {
|
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struct delayed_work jack_work;
|
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struct delayed_work pll_det_enable_work;
|
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struct work_struct pll_det_disable_work;
|
||||
struct work_struct pll_work;
|
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struct snd_soc_jack *jack;
|
||||
unsigned int dai_fmt;
|
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int tdm_slots;
|
||||
|
||||
@@ -9,9 +9,25 @@
|
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#ifndef __RT5677_SPI_H__
|
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#define __RT5677_SPI_H__
|
||||
|
||||
#if IS_ENABLED(CONFIG_SND_SOC_RT5677_SPI)
|
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int rt5677_spi_read(u32 addr, void *rxbuf, size_t len);
|
||||
int rt5677_spi_write(u32 addr, const void *txbuf, size_t len);
|
||||
int rt5677_spi_write_firmware(u32 addr, const struct firmware *fw);
|
||||
void rt5677_spi_hotword_detected(void);
|
||||
#else
|
||||
static inline int rt5677_spi_read(u32 addr, void *rxbuf, size_t len)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
static inline int rt5677_spi_write(u32 addr, const void *txbuf, size_t len)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
static inline int rt5677_spi_write_firmware(u32 addr, const struct firmware *fw)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
static inline void rt5677_spi_hotword_detected(void){}
|
||||
#endif
|
||||
|
||||
#endif /* __RT5677_SPI_H__ */
|
||||
|
||||
@@ -73,6 +73,7 @@ struct rt5682_priv {
|
||||
static const struct reg_sequence patch_list[] = {
|
||||
{RT5682_HP_IMP_SENS_CTRL_19, 0x1000},
|
||||
{RT5682_DAC_ADC_DIG_VOL1, 0xa020},
|
||||
{RT5682_I2C_CTRL, 0x000f},
|
||||
};
|
||||
|
||||
static const struct reg_default rt5682_reg[] = {
|
||||
@@ -2474,6 +2475,7 @@ static void rt5682_calibrate(struct rt5682_priv *rt5682)
|
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mutex_lock(&rt5682->calibrate_mutex);
|
||||
|
||||
rt5682_reset(rt5682->regmap);
|
||||
regmap_write(rt5682->regmap, RT5682_I2C_CTRL, 0x000f);
|
||||
regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0xa2af);
|
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usleep_range(15000, 20000);
|
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regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0xf2af);
|
||||
|
||||
@@ -1806,6 +1806,12 @@ static int wm8904_set_sysclk(struct snd_soc_dai *dai, int clk_id,
|
||||
|
||||
switch (clk_id) {
|
||||
case WM8904_CLK_AUTO:
|
||||
/* We don't have any rate constraints, so just ignore the
|
||||
* request to disable constraining.
|
||||
*/
|
||||
if (!freq)
|
||||
return 0;
|
||||
|
||||
mclk_freq = clk_get_rate(priv->mclk);
|
||||
/* enable FLL if a different sysclk is desired */
|
||||
if (mclk_freq != freq) {
|
||||
|
||||
@@ -2788,7 +2788,7 @@ static int fll_factors(struct _fll_div *fll_div, unsigned int Fref,
|
||||
|
||||
if (target % Fref == 0) {
|
||||
fll_div->theta = 0;
|
||||
fll_div->lambda = 0;
|
||||
fll_div->lambda = 1;
|
||||
} else {
|
||||
gcd_fll = gcd(target, fratio * Fref);
|
||||
|
||||
@@ -2858,7 +2858,7 @@ static int wm8962_set_fll(struct snd_soc_component *component, int fll_id, int s
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (fll_div.theta || fll_div.lambda)
|
||||
if (fll_div.theta)
|
||||
fll1 |= WM8962_FLL_FRAC;
|
||||
|
||||
/* Stop the FLL while we reconfigure */
|
||||
|
||||
@@ -371,6 +371,7 @@ static int simple_for_each_link(struct asoc_simple_priv *priv,
|
||||
do {
|
||||
struct asoc_simple_data adata;
|
||||
struct device_node *codec;
|
||||
struct device_node *plat;
|
||||
struct device_node *np;
|
||||
int num = of_get_child_count(node);
|
||||
|
||||
@@ -381,6 +382,9 @@ static int simple_for_each_link(struct asoc_simple_priv *priv,
|
||||
ret = -ENODEV;
|
||||
goto error;
|
||||
}
|
||||
/* get platform */
|
||||
plat = of_get_child_by_name(node, is_top ?
|
||||
PREFIX "plat" : "plat");
|
||||
|
||||
/* get convert-xxx property */
|
||||
memset(&adata, 0, sizeof(adata));
|
||||
@@ -389,6 +393,8 @@ static int simple_for_each_link(struct asoc_simple_priv *priv,
|
||||
|
||||
/* loop for all CPU/Codec node */
|
||||
for_each_child_of_node(node, np) {
|
||||
if (plat == np)
|
||||
continue;
|
||||
/*
|
||||
* It is DPCM
|
||||
* if it has many CPUs,
|
||||
|
||||
@@ -14,6 +14,7 @@
|
||||
#include <linux/module.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/firmware.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/pm_qos.h>
|
||||
|
||||
@@ -707,13 +707,17 @@ static const struct dmi_system_id byt_rt5640_quirk_table[] = {
|
||||
BYT_RT5640_MCLK_EN),
|
||||
},
|
||||
{
|
||||
/* Teclast X89 */
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR, "TECLAST"),
|
||||
DMI_MATCH(DMI_BOARD_NAME, "tPAD"),
|
||||
},
|
||||
.driver_data = (void *)(BYT_RT5640_IN3_MAP |
|
||||
BYT_RT5640_MCLK_EN |
|
||||
BYT_RT5640_SSP0_AIF1),
|
||||
BYT_RT5640_JD_SRC_JD1_IN4P |
|
||||
BYT_RT5640_OVCD_TH_2000UA |
|
||||
BYT_RT5640_OVCD_SF_1P0 |
|
||||
BYT_RT5640_SSP0_AIF1 |
|
||||
BYT_RT5640_MCLK_EN),
|
||||
},
|
||||
{ /* Toshiba Satellite Click Mini L9W-B */
|
||||
.matches = {
|
||||
|
||||
@@ -9,45 +9,52 @@
|
||||
#include <sound/soc-acpi.h>
|
||||
#include <sound/soc-acpi-intel-match.h>
|
||||
|
||||
static struct snd_soc_acpi_codecs cml_codecs = {
|
||||
static struct snd_soc_acpi_codecs rt1011_spk_codecs = {
|
||||
.num_codecs = 1,
|
||||
.codecs = {"10EC5682"}
|
||||
.codecs = {"10EC1011"}
|
||||
};
|
||||
|
||||
static struct snd_soc_acpi_codecs cml_spk_codecs = {
|
||||
static struct snd_soc_acpi_codecs max98357a_spk_codecs = {
|
||||
.num_codecs = 1,
|
||||
.codecs = {"MX98357A"}
|
||||
};
|
||||
|
||||
/*
|
||||
* The order of the three entries with .id = "10EC5682" matters
|
||||
* here, because DSDT tables expose an ACPI HID for the MAX98357A
|
||||
* speaker amplifier which is not populated on the board.
|
||||
*/
|
||||
struct snd_soc_acpi_mach snd_soc_acpi_intel_cml_machines[] = {
|
||||
{
|
||||
.id = "DLGS7219",
|
||||
.drv_name = "cml_da7219_max98357a",
|
||||
.quirk_data = &cml_spk_codecs,
|
||||
.sof_fw_filename = "sof-cml.ri",
|
||||
.sof_tplg_filename = "sof-cml-da7219-max98357a.tplg",
|
||||
},
|
||||
{
|
||||
.id = "MX98357A",
|
||||
.drv_name = "sof_rt5682",
|
||||
.quirk_data = &cml_codecs,
|
||||
.sof_fw_filename = "sof-cml.ri",
|
||||
.sof_tplg_filename = "sof-cml-rt5682-max98357a.tplg",
|
||||
},
|
||||
{
|
||||
.id = "10EC1011",
|
||||
.id = "10EC5682",
|
||||
.drv_name = "cml_rt1011_rt5682",
|
||||
.quirk_data = &cml_codecs,
|
||||
.machine_quirk = snd_soc_acpi_codec_list,
|
||||
.quirk_data = &rt1011_spk_codecs,
|
||||
.sof_fw_filename = "sof-cml.ri",
|
||||
.sof_tplg_filename = "sof-cml-rt1011-rt5682.tplg",
|
||||
},
|
||||
{
|
||||
.id = "10EC5682",
|
||||
.drv_name = "sof_rt5682",
|
||||
.machine_quirk = snd_soc_acpi_codec_list,
|
||||
.quirk_data = &max98357a_spk_codecs,
|
||||
.sof_fw_filename = "sof-cml.ri",
|
||||
.sof_tplg_filename = "sof-cml-rt5682-max98357a.tplg",
|
||||
},
|
||||
{
|
||||
.id = "10EC5682",
|
||||
.drv_name = "sof_rt5682",
|
||||
.sof_fw_filename = "sof-cml.ri",
|
||||
.sof_tplg_filename = "sof-cml-rt5682.tplg",
|
||||
},
|
||||
|
||||
{
|
||||
.id = "DLGS7219",
|
||||
.drv_name = "cml_da7219_max98357a",
|
||||
.machine_quirk = snd_soc_acpi_codec_list,
|
||||
.quirk_data = &max98357a_spk_codecs,
|
||||
.sof_fw_filename = "sof-cml.ri",
|
||||
.sof_tplg_filename = "sof-cml-da7219-max98357a.tplg",
|
||||
},
|
||||
{},
|
||||
};
|
||||
EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_cml_machines);
|
||||
|
||||
@@ -214,10 +214,8 @@ be_err:
|
||||
* This is to ensure there are no pops or clicks in between any music tracks
|
||||
* due to DAPM power cycling.
|
||||
*/
|
||||
static void close_delayed_work(struct work_struct *work)
|
||||
static void close_delayed_work(struct snd_soc_pcm_runtime *rtd)
|
||||
{
|
||||
struct snd_soc_pcm_runtime *rtd =
|
||||
container_of(work, struct snd_soc_pcm_runtime, delayed_work.work);
|
||||
struct snd_soc_dai *codec_dai = rtd->codec_dai;
|
||||
|
||||
mutex_lock_nested(&rtd->card->pcm_mutex, rtd->card->pcm_subclass);
|
||||
@@ -929,7 +927,7 @@ int snd_soc_new_compress(struct snd_soc_pcm_runtime *rtd, int num)
|
||||
}
|
||||
|
||||
/* DAPM dai link stream work */
|
||||
INIT_DELAYED_WORK(&rtd->delayed_work, close_delayed_work);
|
||||
rtd->close_delayed_work_func = close_delayed_work;
|
||||
|
||||
rtd->compr = compr;
|
||||
compr->private_data = rtd;
|
||||
|
||||
+12
-1
@@ -419,7 +419,8 @@ static void soc_free_pcm_runtime(struct snd_soc_pcm_runtime *rtd)
|
||||
|
||||
list_del(&rtd->list);
|
||||
|
||||
flush_delayed_work(&rtd->delayed_work);
|
||||
if (delayed_work_pending(&rtd->delayed_work))
|
||||
flush_delayed_work(&rtd->delayed_work);
|
||||
snd_soc_pcm_component_free(rtd);
|
||||
|
||||
/*
|
||||
@@ -435,6 +436,15 @@ static void soc_free_pcm_runtime(struct snd_soc_pcm_runtime *rtd)
|
||||
device_unregister(rtd->dev);
|
||||
}
|
||||
|
||||
static void close_delayed_work(struct work_struct *work) {
|
||||
struct snd_soc_pcm_runtime *rtd =
|
||||
container_of(work, struct snd_soc_pcm_runtime,
|
||||
delayed_work.work);
|
||||
|
||||
if (rtd->close_delayed_work_func)
|
||||
rtd->close_delayed_work_func(rtd);
|
||||
}
|
||||
|
||||
static struct snd_soc_pcm_runtime *soc_new_pcm_runtime(
|
||||
struct snd_soc_card *card, struct snd_soc_dai_link *dai_link)
|
||||
{
|
||||
@@ -470,6 +480,7 @@ static struct snd_soc_pcm_runtime *soc_new_pcm_runtime(
|
||||
|
||||
rtd->dev = dev;
|
||||
dev_set_drvdata(dev, rtd);
|
||||
INIT_DELAYED_WORK(&rtd->delayed_work, close_delayed_work);
|
||||
|
||||
/*
|
||||
* for rtd->codec_dais
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user