mirror of
https://github.com/ukui/kernel.git
synced 2026-03-09 10:07:04 -07:00
Merge branch 'for-davem' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6
This commit is contained in:
@@ -110,6 +110,8 @@ static struct usb_device_id ar9170_usb_ids[] = {
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{ USB_DEVICE(0x0409, 0x0249) },
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/* AVM FRITZ!WLAN USB Stick N 2.4 */
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{ USB_DEVICE(0x057C, 0x8402), .driver_info = AR9170_REQ_FW1_ONLY },
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/* Qwest/Actiontec 802AIN Wireless N USB Network Adapter */
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{ USB_DEVICE(0x1668, 0x1200) },
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/* terminate */
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{}
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@@ -1932,12 +1932,6 @@ ath5k_tasklet_rx(unsigned long data)
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sc->stats.rx_all_count++;
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if (unlikely(rs.rs_more)) {
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ATH5K_WARN(sc, "unsupported jumbo\n");
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sc->stats.rxerr_jumbo++;
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goto next;
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}
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if (unlikely(rs.rs_status)) {
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if (rs.rs_status & AR5K_RXERR_CRC)
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sc->stats.rxerr_crc++;
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@@ -1977,6 +1971,12 @@ ath5k_tasklet_rx(unsigned long data)
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sc->opmode != NL80211_IFTYPE_MONITOR)
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goto next;
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}
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if (unlikely(rs.rs_more)) {
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sc->stats.rxerr_jumbo++;
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goto next;
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}
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accept:
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next_skb = ath5k_rx_skb_alloc(sc, &next_skb_addr);
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@@ -38,6 +38,9 @@
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#define AR_SWITCH_TABLE_ALL (0xfff)
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#define AR_SWITCH_TABLE_ALL_S (0)
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#define LE16(x) __constant_cpu_to_le16(x)
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#define LE32(x) __constant_cpu_to_le32(x)
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static const struct ar9300_eeprom ar9300_default = {
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.eepromVersion = 2,
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.templateVersion = 2,
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@@ -45,7 +48,7 @@ static const struct ar9300_eeprom ar9300_default = {
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.custData = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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.baseEepHeader = {
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.regDmn = {0, 0x1f},
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.regDmn = { LE16(0), LE16(0x1f) },
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.txrxMask = 0x77, /* 4 bits tx and 4 bits rx */
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.opCapFlags = {
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.opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
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@@ -76,15 +79,15 @@ static const struct ar9300_eeprom ar9300_default = {
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.modalHeader2G = {
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/* ar9300_modal_eep_header 2g */
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/* 4 idle,t1,t2,b(4 bits per setting) */
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.antCtrlCommon = 0x110,
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.antCtrlCommon = LE32(0x110),
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/* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */
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.antCtrlCommon2 = 0x22222,
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.antCtrlCommon2 = LE32(0x22222),
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/*
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* antCtrlChain[AR9300_MAX_CHAINS]; 6 idle, t, r,
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* rx1, rx12, b (2 bits each)
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*/
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.antCtrlChain = {0x150, 0x150, 0x150},
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.antCtrlChain = { LE16(0x150), LE16(0x150), LE16(0x150) },
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/*
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* xatten1DB[AR9300_MAX_CHAINS]; 3 xatten1_db
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@@ -287,12 +290,12 @@ static const struct ar9300_eeprom ar9300_default = {
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},
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.modalHeader5G = {
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/* 4 idle,t1,t2,b (4 bits per setting) */
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.antCtrlCommon = 0x110,
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.antCtrlCommon = LE32(0x110),
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/* 4 ra1l1, ra2l1, ra1l2,ra2l2,ra12 */
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.antCtrlCommon2 = 0x22222,
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.antCtrlCommon2 = LE32(0x22222),
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/* antCtrlChain 6 idle, t,r,rx1,rx12,b (2 bits each) */
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.antCtrlChain = {
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0x000, 0x000, 0x000,
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LE16(0x000), LE16(0x000), LE16(0x000),
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},
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/* xatten1DB 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */
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.xatten1DB = {0, 0, 0},
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@@ -620,9 +623,9 @@ static u32 ath9k_hw_ar9300_get_eeprom(struct ath_hw *ah,
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case EEP_MAC_MSW:
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return eep->macAddr[4] << 8 | eep->macAddr[5];
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case EEP_REG_0:
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return pBase->regDmn[0];
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return le16_to_cpu(pBase->regDmn[0]);
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case EEP_REG_1:
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return pBase->regDmn[1];
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return le16_to_cpu(pBase->regDmn[1]);
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case EEP_OP_CAP:
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return pBase->deviceCap;
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case EEP_OP_MODE:
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@@ -640,93 +643,80 @@ static u32 ath9k_hw_ar9300_get_eeprom(struct ath_hw *ah,
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/* Bit 4 is internal regulator flag */
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return (pBase->featureEnable & 0x10) >> 4;
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case EEP_SWREG:
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return pBase->swreg;
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return le32_to_cpu(pBase->swreg);
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default:
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return 0;
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}
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}
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#ifdef __BIG_ENDIAN
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static void ar9300_swap_eeprom(struct ar9300_eeprom *eep)
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static bool ar9300_eeprom_read_byte(struct ath_common *common, int address,
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u8 *buffer)
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{
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u32 dword;
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u16 word;
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int i;
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u16 val;
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word = swab16(eep->baseEepHeader.regDmn[0]);
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eep->baseEepHeader.regDmn[0] = word;
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if (unlikely(!ath9k_hw_nvram_read(common, address / 2, &val)))
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return false;
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word = swab16(eep->baseEepHeader.regDmn[1]);
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eep->baseEepHeader.regDmn[1] = word;
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dword = swab32(eep->baseEepHeader.swreg);
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eep->baseEepHeader.swreg = dword;
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dword = swab32(eep->modalHeader2G.antCtrlCommon);
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eep->modalHeader2G.antCtrlCommon = dword;
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dword = swab32(eep->modalHeader2G.antCtrlCommon2);
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eep->modalHeader2G.antCtrlCommon2 = dword;
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dword = swab32(eep->modalHeader5G.antCtrlCommon);
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eep->modalHeader5G.antCtrlCommon = dword;
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dword = swab32(eep->modalHeader5G.antCtrlCommon2);
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eep->modalHeader5G.antCtrlCommon2 = dword;
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for (i = 0; i < AR9300_MAX_CHAINS; i++) {
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word = swab16(eep->modalHeader2G.antCtrlChain[i]);
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eep->modalHeader2G.antCtrlChain[i] = word;
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word = swab16(eep->modalHeader5G.antCtrlChain[i]);
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eep->modalHeader5G.antCtrlChain[i] = word;
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}
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*buffer = (val >> (8 * (address % 2))) & 0xff;
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return true;
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}
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#endif
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static bool ar9300_hw_read_eeprom(struct ath_hw *ah,
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long address, u8 *buffer, int many)
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static bool ar9300_eeprom_read_word(struct ath_common *common, int address,
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u8 *buffer)
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{
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int i;
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u8 value[2];
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unsigned long eepAddr;
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unsigned long byteAddr;
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u16 *svalue;
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struct ath_common *common = ath9k_hw_common(ah);
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u16 val;
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if ((address < 0) || ((address + many) > AR9300_EEPROM_SIZE - 1)) {
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if (unlikely(!ath9k_hw_nvram_read(common, address / 2, &val)))
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return false;
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buffer[0] = val >> 8;
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buffer[1] = val & 0xff;
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return true;
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}
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static bool ar9300_read_eeprom(struct ath_hw *ah, int address, u8 *buffer,
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int count)
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{
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struct ath_common *common = ath9k_hw_common(ah);
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int i;
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if ((address < 0) || ((address + count) / 2 > AR9300_EEPROM_SIZE - 1)) {
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ath_print(common, ATH_DBG_EEPROM,
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"eeprom address not in range\n");
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return false;
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}
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for (i = 0; i < many; i++) {
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eepAddr = (u16) (address + i) / 2;
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byteAddr = (u16) (address + i) % 2;
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svalue = (u16 *) value;
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if (!ath9k_hw_nvram_read(common, eepAddr, svalue)) {
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ath_print(common, ATH_DBG_EEPROM,
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"unable to read eeprom region\n");
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return false;
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}
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*svalue = le16_to_cpu(*svalue);
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buffer[i] = value[byteAddr];
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/*
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* Since we're reading the bytes in reverse order from a little-endian
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* word stream, an even address means we only use the lower half of
|
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* the 16-bit word at that address
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*/
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if (address % 2 == 0) {
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if (!ar9300_eeprom_read_byte(common, address--, buffer++))
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goto error;
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count--;
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}
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return true;
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}
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for (i = 0; i < count / 2; i++) {
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if (!ar9300_eeprom_read_word(common, address, buffer))
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goto error;
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static bool ar9300_read_eeprom(struct ath_hw *ah,
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int address, u8 *buffer, int many)
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{
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int it;
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address -= 2;
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buffer += 2;
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}
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if (count % 2)
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if (!ar9300_eeprom_read_byte(common, address, buffer))
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goto error;
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for (it = 0; it < many; it++)
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if (!ar9300_hw_read_eeprom(ah,
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(address - it),
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(buffer + it), 1))
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return false;
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return true;
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|
||||
error:
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ath_print(common, ATH_DBG_EEPROM,
|
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"unable to read eeprom region at offset %d\n", address);
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return false;
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}
|
||||
|
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static void ar9300_comp_hdr_unpack(u8 *best, int *code, int *reference,
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@@ -927,30 +917,13 @@ fail:
|
||||
*/
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static bool ath9k_hw_ar9300_fill_eeprom(struct ath_hw *ah)
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{
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u8 *mptr = NULL;
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int mdata_size;
|
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u8 *mptr = (u8 *) &ah->eeprom.ar9300_eep;
|
||||
|
||||
mptr = (u8 *) &ah->eeprom.ar9300_eep;
|
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mdata_size = sizeof(struct ar9300_eeprom);
|
||||
if (ar9300_eeprom_restore_internal(ah, mptr,
|
||||
sizeof(struct ar9300_eeprom)) < 0)
|
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return false;
|
||||
|
||||
if (mptr && mdata_size > 0) {
|
||||
/* At this point, mptr points to the eeprom data structure
|
||||
* in it's "default" state. If this is big endian, swap the
|
||||
* data structures back to "little endian"
|
||||
*/
|
||||
/* First swap, default to Little Endian */
|
||||
#ifdef __BIG_ENDIAN
|
||||
ar9300_swap_eeprom((struct ar9300_eeprom *)mptr);
|
||||
#endif
|
||||
if (ar9300_eeprom_restore_internal(ah, mptr, mdata_size) >= 0)
|
||||
return true;
|
||||
|
||||
/* Second Swap, back to Big Endian */
|
||||
#ifdef __BIG_ENDIAN
|
||||
ar9300_swap_eeprom((struct ar9300_eeprom *)mptr);
|
||||
#endif
|
||||
}
|
||||
return false;
|
||||
return true;
|
||||
}
|
||||
|
||||
/* XXX: review hardware docs */
|
||||
@@ -998,21 +971,25 @@ static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz)
|
||||
static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz)
|
||||
{
|
||||
struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
__le32 val;
|
||||
|
||||
if (is2ghz)
|
||||
return eep->modalHeader2G.antCtrlCommon;
|
||||
val = eep->modalHeader2G.antCtrlCommon;
|
||||
else
|
||||
return eep->modalHeader5G.antCtrlCommon;
|
||||
val = eep->modalHeader5G.antCtrlCommon;
|
||||
return le32_to_cpu(val);
|
||||
}
|
||||
|
||||
static u32 ar9003_hw_ant_ctrl_common_2_get(struct ath_hw *ah, bool is2ghz)
|
||||
{
|
||||
struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
__le32 val;
|
||||
|
||||
if (is2ghz)
|
||||
return eep->modalHeader2G.antCtrlCommon2;
|
||||
val = eep->modalHeader2G.antCtrlCommon2;
|
||||
else
|
||||
return eep->modalHeader5G.antCtrlCommon2;
|
||||
val = eep->modalHeader5G.antCtrlCommon2;
|
||||
return le32_to_cpu(val);
|
||||
}
|
||||
|
||||
static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah,
|
||||
@@ -1020,15 +997,16 @@ static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah,
|
||||
bool is2ghz)
|
||||
{
|
||||
struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
|
||||
__le16 val = 0;
|
||||
|
||||
if (chain >= 0 && chain < AR9300_MAX_CHAINS) {
|
||||
if (is2ghz)
|
||||
return eep->modalHeader2G.antCtrlChain[chain];
|
||||
val = eep->modalHeader2G.antCtrlChain[chain];
|
||||
else
|
||||
return eep->modalHeader5G.antCtrlChain[chain];
|
||||
val = eep->modalHeader5G.antCtrlChain[chain];
|
||||
}
|
||||
|
||||
return 0;
|
||||
return le16_to_cpu(val);
|
||||
}
|
||||
|
||||
static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)
|
||||
|
||||
@@ -169,7 +169,7 @@ enum CompressAlgorithm {
|
||||
};
|
||||
|
||||
struct ar9300_base_eep_hdr {
|
||||
u16 regDmn[2];
|
||||
__le16 regDmn[2];
|
||||
/* 4 bits tx and 4 bits rx */
|
||||
u8 txrxMask;
|
||||
struct eepFlags opCapFlags;
|
||||
@@ -199,16 +199,16 @@ struct ar9300_base_eep_hdr {
|
||||
u8 rxBandSelectGpio;
|
||||
u8 txrxgain;
|
||||
/* SW controlled internal regulator fields */
|
||||
u32 swreg;
|
||||
__le32 swreg;
|
||||
} __packed;
|
||||
|
||||
struct ar9300_modal_eep_header {
|
||||
/* 4 idle, t1, t2, b (4 bits per setting) */
|
||||
u32 antCtrlCommon;
|
||||
__le32 antCtrlCommon;
|
||||
/* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */
|
||||
u32 antCtrlCommon2;
|
||||
__le32 antCtrlCommon2;
|
||||
/* 6 idle, t, r, rx1, rx12, b (2 bits each) */
|
||||
u16 antCtrlChain[AR9300_MAX_CHAINS];
|
||||
__le16 antCtrlChain[AR9300_MAX_CHAINS];
|
||||
/* 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */
|
||||
u8 xatten1DB[AR9300_MAX_CHAINS];
|
||||
/* 3 xatten1_margin for merlin (0xa20c/b20c 16:12 */
|
||||
|
||||
@@ -25,8 +25,11 @@ static const u32 ar9300_2p0_radio_postamble[][5] = {
|
||||
{0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800},
|
||||
{0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20},
|
||||
{0x0001610c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
|
||||
{0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
|
||||
{0x0001650c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
|
||||
{0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
|
||||
{0x0001690c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
|
||||
{0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
|
||||
};
|
||||
|
||||
static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p0[][5] = {
|
||||
@@ -97,13 +100,13 @@ static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p0[][5] = {
|
||||
{0x0000a5f8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},
|
||||
{0x0000a5fc, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},
|
||||
{0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
|
||||
{0x00016048, 0x60001a61, 0x60001a61, 0x60001a61, 0x60001a61},
|
||||
{0x00016048, 0x62480001, 0x62480001, 0x62480001, 0x62480001},
|
||||
{0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
|
||||
{0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
|
||||
{0x00016448, 0x60001a61, 0x60001a61, 0x60001a61, 0x60001a61},
|
||||
{0x00016448, 0x62480001, 0x62480001, 0x62480001, 0x62480001},
|
||||
{0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
|
||||
{0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
|
||||
{0x00016848, 0x60001a61, 0x60001a61, 0x60001a61, 0x60001a61},
|
||||
{0x00016848, 0x62480001, 0x62480001, 0x62480001, 0x62480001},
|
||||
{0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
|
||||
};
|
||||
|
||||
@@ -129,7 +132,7 @@ static const u32 ar9300_2p0_radio_core[][2] = {
|
||||
{0x00016040, 0x7f80fff8},
|
||||
{0x0001604c, 0x76d005b5},
|
||||
{0x00016050, 0x556cf031},
|
||||
{0x00016054, 0x43449440},
|
||||
{0x00016054, 0x13449440},
|
||||
{0x00016058, 0x0c51c92c},
|
||||
{0x0001605c, 0x3db7fffc},
|
||||
{0x00016060, 0xfffffffc},
|
||||
@@ -152,12 +155,11 @@ static const u32 ar9300_2p0_radio_core[][2] = {
|
||||
{0x00016100, 0x3fffbe01},
|
||||
{0x00016104, 0xfff80000},
|
||||
{0x00016108, 0x00080010},
|
||||
{0x00016140, 0x10804008},
|
||||
{0x00016144, 0x02084080},
|
||||
{0x00016148, 0x00000000},
|
||||
{0x00016280, 0x058a0001},
|
||||
{0x00016284, 0x3d840208},
|
||||
{0x00016288, 0x01a20408},
|
||||
{0x00016288, 0x05a20408},
|
||||
{0x0001628c, 0x00038c07},
|
||||
{0x00016290, 0x40000004},
|
||||
{0x00016294, 0x458aa14f},
|
||||
@@ -190,7 +192,7 @@ static const u32 ar9300_2p0_radio_core[][2] = {
|
||||
{0x00016440, 0x7f80fff8},
|
||||
{0x0001644c, 0x76d005b5},
|
||||
{0x00016450, 0x556cf031},
|
||||
{0x00016454, 0x43449440},
|
||||
{0x00016454, 0x13449440},
|
||||
{0x00016458, 0x0c51c92c},
|
||||
{0x0001645c, 0x3db7fffc},
|
||||
{0x00016460, 0xfffffffc},
|
||||
@@ -199,7 +201,6 @@ static const u32 ar9300_2p0_radio_core[][2] = {
|
||||
{0x00016500, 0x3fffbe01},
|
||||
{0x00016504, 0xfff80000},
|
||||
{0x00016508, 0x00080010},
|
||||
{0x00016540, 0x10804008},
|
||||
{0x00016544, 0x02084080},
|
||||
{0x00016548, 0x00000000},
|
||||
{0x00016780, 0x00000000},
|
||||
@@ -231,7 +232,7 @@ static const u32 ar9300_2p0_radio_core[][2] = {
|
||||
{0x00016840, 0x7f80fff8},
|
||||
{0x0001684c, 0x76d005b5},
|
||||
{0x00016850, 0x556cf031},
|
||||
{0x00016854, 0x43449440},
|
||||
{0x00016854, 0x13449440},
|
||||
{0x00016858, 0x0c51c92c},
|
||||
{0x0001685c, 0x3db7fffc},
|
||||
{0x00016860, 0xfffffffc},
|
||||
@@ -240,7 +241,6 @@ static const u32 ar9300_2p0_radio_core[][2] = {
|
||||
{0x00016900, 0x3fffbe01},
|
||||
{0x00016904, 0xfff80000},
|
||||
{0x00016908, 0x00080010},
|
||||
{0x00016940, 0x10804008},
|
||||
{0x00016944, 0x02084080},
|
||||
{0x00016948, 0x00000000},
|
||||
{0x00016b80, 0x00000000},
|
||||
@@ -588,12 +588,12 @@ static const u32 ar9200_merlin_2p0_radio_core[][2] = {
|
||||
|
||||
static const u32 ar9300_2p0_baseband_postamble[][5] = {
|
||||
/* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
|
||||
{0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8005, 0xd00a800b},
|
||||
{0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
|
||||
{0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e},
|
||||
{0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
|
||||
{0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
|
||||
{0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
|
||||
{0x00009830, 0x0000059c, 0x0000059c, 0x0000059c, 0x00000b9c},
|
||||
{0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c},
|
||||
{0x00009c00, 0x00000044, 0x000000c4, 0x000000c4, 0x00000044},
|
||||
{0x00009e00, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0},
|
||||
{0x00009e04, 0x00802020, 0x00802020, 0x00802020, 0x00802020},
|
||||
@@ -604,8 +604,8 @@ static const u32 ar9300_2p0_baseband_postamble[][5] = {
|
||||
{0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
|
||||
{0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
|
||||
{0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
|
||||
{0x00009e44, 0x02321e27, 0x02321e27, 0x02282324, 0x02282324},
|
||||
{0x00009e48, 0x5030201a, 0x5030201a, 0x50302010, 0x50302010},
|
||||
{0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27},
|
||||
{0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},
|
||||
{0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
|
||||
{0x0000a204, 0x000037c0, 0x000037c4, 0x000037c4, 0x000037c0},
|
||||
{0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
|
||||
@@ -674,7 +674,7 @@ static const u32 ar9300_2p0_baseband_core[][2] = {
|
||||
{0x00009d10, 0x01834061},
|
||||
{0x00009d14, 0x00c0040b},
|
||||
{0x00009d18, 0x00000000},
|
||||
{0x00009e08, 0x0038233c},
|
||||
{0x00009e08, 0x0038230c},
|
||||
{0x00009e24, 0x990bb515},
|
||||
{0x00009e28, 0x0c6f0000},
|
||||
{0x00009e30, 0x06336f77},
|
||||
@@ -901,13 +901,13 @@ static const u32 ar9300Modes_high_power_tx_gain_table_2p0[][5] = {
|
||||
{0x0000a5f8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec},
|
||||
{0x0000a5fc, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec},
|
||||
{0x00016044, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6},
|
||||
{0x00016048, 0xae481a61, 0xae481a61, 0xae481a61, 0xae481a61},
|
||||
{0x00016048, 0xae480001, 0xae480001, 0xae480001, 0xae480001},
|
||||
{0x00016068, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c},
|
||||
{0x00016444, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6},
|
||||
{0x00016448, 0xae481a61, 0xae481a61, 0xae481a61, 0xae481a61},
|
||||
{0x00016448, 0xae480001, 0xae480001, 0xae480001, 0xae480001},
|
||||
{0x00016468, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c},
|
||||
{0x00016844, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6},
|
||||
{0x00016848, 0xae481a61, 0xae481a61, 0xae481a61, 0xae481a61},
|
||||
{0x00016848, 0xae480001, 0xae480001, 0xae480001, 0xae480001},
|
||||
{0x00016868, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c},
|
||||
};
|
||||
|
||||
@@ -979,13 +979,13 @@ static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p0[][5] = {
|
||||
{0x0000a5f8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec},
|
||||
{0x0000a5fc, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec},
|
||||
{0x00016044, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4},
|
||||
{0x00016048, 0x8e481a61, 0x8e481a61, 0x8e481a61, 0x8e481a61},
|
||||
{0x00016048, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001},
|
||||
{0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
|
||||
{0x00016444, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4},
|
||||
{0x00016448, 0x8e481a61, 0x8e481a61, 0x8e481a61, 0x8e481a61},
|
||||
{0x00016448, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001},
|
||||
{0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
|
||||
{0x00016844, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4},
|
||||
{0x00016848, 0x8e481a61, 0x8e481a61, 0x8e481a61, 0x8e481a61},
|
||||
{0x00016848, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001},
|
||||
{0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
|
||||
};
|
||||
|
||||
@@ -995,22 +995,22 @@ static const u32 ar9300Common_rx_gain_table_2p0[][2] = {
|
||||
{0x0000a004, 0x00030002},
|
||||
{0x0000a008, 0x00050004},
|
||||
{0x0000a00c, 0x00810080},
|
||||
{0x0000a010, 0x01800082},
|
||||
{0x0000a014, 0x01820181},
|
||||
{0x0000a018, 0x01840183},
|
||||
{0x0000a01c, 0x01880185},
|
||||
{0x0000a020, 0x018a0189},
|
||||
{0x0000a024, 0x02850284},
|
||||
{0x0000a028, 0x02890288},
|
||||
{0x0000a02c, 0x028b028a},
|
||||
{0x0000a030, 0x028d028c},
|
||||
{0x0000a034, 0x02910290},
|
||||
{0x0000a038, 0x02930292},
|
||||
{0x0000a03c, 0x03910390},
|
||||
{0x0000a040, 0x03930392},
|
||||
{0x0000a044, 0x03950394},
|
||||
{0x0000a048, 0x00000396},
|
||||
{0x0000a04c, 0x00000000},
|
||||
{0x0000a010, 0x00830082},
|
||||
{0x0000a014, 0x01810180},
|
||||
{0x0000a018, 0x01830182},
|
||||
{0x0000a01c, 0x01850184},
|
||||
{0x0000a020, 0x01890188},
|
||||
{0x0000a024, 0x018b018a},
|
||||
{0x0000a028, 0x018d018c},
|
||||
{0x0000a02c, 0x01910190},
|
||||
{0x0000a030, 0x01930192},
|
||||
{0x0000a034, 0x01950194},
|
||||
{0x0000a038, 0x038a0196},
|
||||
{0x0000a03c, 0x038c038b},
|
||||
{0x0000a040, 0x0390038d},
|
||||
{0x0000a044, 0x03920391},
|
||||
{0x0000a048, 0x03940393},
|
||||
{0x0000a04c, 0x03960395},
|
||||
{0x0000a050, 0x00000000},
|
||||
{0x0000a054, 0x00000000},
|
||||
{0x0000a058, 0x00000000},
|
||||
@@ -1023,14 +1023,14 @@ static const u32 ar9300Common_rx_gain_table_2p0[][2] = {
|
||||
{0x0000a074, 0x00000000},
|
||||
{0x0000a078, 0x00000000},
|
||||
{0x0000a07c, 0x00000000},
|
||||
{0x0000a080, 0x28282828},
|
||||
{0x0000a084, 0x21212128},
|
||||
{0x0000a088, 0x21212121},
|
||||
{0x0000a08c, 0x1c1c1c21},
|
||||
{0x0000a090, 0x1c1c1c1c},
|
||||
{0x0000a094, 0x17171c1c},
|
||||
{0x0000a098, 0x02020212},
|
||||
{0x0000a09c, 0x02020202},
|
||||
{0x0000a080, 0x22222229},
|
||||
{0x0000a084, 0x1d1d1d1d},
|
||||
{0x0000a088, 0x1d1d1d1d},
|
||||
{0x0000a08c, 0x1d1d1d1d},
|
||||
{0x0000a090, 0x171d1d1d},
|
||||
{0x0000a094, 0x11111717},
|
||||
{0x0000a098, 0x00030311},
|
||||
{0x0000a09c, 0x00000000},
|
||||
{0x0000a0a0, 0x00000000},
|
||||
{0x0000a0a4, 0x00000000},
|
||||
{0x0000a0a8, 0x00000000},
|
||||
@@ -1040,26 +1040,26 @@ static const u32 ar9300Common_rx_gain_table_2p0[][2] = {
|
||||
{0x0000a0b8, 0x00000000},
|
||||
{0x0000a0bc, 0x00000000},
|
||||
{0x0000a0c0, 0x001f0000},
|
||||
{0x0000a0c4, 0x011f0100},
|
||||
{0x0000a0c8, 0x011d011e},
|
||||
{0x0000a0cc, 0x011b011c},
|
||||
{0x0000a0c4, 0x01000101},
|
||||
{0x0000a0c8, 0x011e011f},
|
||||
{0x0000a0cc, 0x011c011d},
|
||||
{0x0000a0d0, 0x02030204},
|
||||
{0x0000a0d4, 0x02010202},
|
||||
{0x0000a0d8, 0x021f0200},
|
||||
{0x0000a0dc, 0x021d021e},
|
||||
{0x0000a0e0, 0x03010302},
|
||||
{0x0000a0e4, 0x031f0300},
|
||||
{0x0000a0e8, 0x0402031e},
|
||||
{0x0000a0dc, 0x0302021e},
|
||||
{0x0000a0e0, 0x03000301},
|
||||
{0x0000a0e4, 0x031e031f},
|
||||
{0x0000a0e8, 0x0402031d},
|
||||
{0x0000a0ec, 0x04000401},
|
||||
{0x0000a0f0, 0x041e041f},
|
||||
{0x0000a0f4, 0x05010502},
|
||||
{0x0000a0f8, 0x051f0500},
|
||||
{0x0000a0fc, 0x0602051e},
|
||||
{0x0000a100, 0x06000601},
|
||||
{0x0000a104, 0x061e061f},
|
||||
{0x0000a108, 0x0703061d},
|
||||
{0x0000a10c, 0x07010702},
|
||||
{0x0000a110, 0x00000700},
|
||||
{0x0000a0f4, 0x0502041d},
|
||||
{0x0000a0f8, 0x05000501},
|
||||
{0x0000a0fc, 0x051e051f},
|
||||
{0x0000a100, 0x06010602},
|
||||
{0x0000a104, 0x061f0600},
|
||||
{0x0000a108, 0x061d061e},
|
||||
{0x0000a10c, 0x07020703},
|
||||
{0x0000a110, 0x07000701},
|
||||
{0x0000a114, 0x00000000},
|
||||
{0x0000a118, 0x00000000},
|
||||
{0x0000a11c, 0x00000000},
|
||||
@@ -1072,26 +1072,26 @@ static const u32 ar9300Common_rx_gain_table_2p0[][2] = {
|
||||
{0x0000a138, 0x00000000},
|
||||
{0x0000a13c, 0x00000000},
|
||||
{0x0000a140, 0x001f0000},
|
||||
{0x0000a144, 0x011f0100},
|
||||
{0x0000a148, 0x011d011e},
|
||||
{0x0000a14c, 0x011b011c},
|
||||
{0x0000a144, 0x01000101},
|
||||
{0x0000a148, 0x011e011f},
|
||||
{0x0000a14c, 0x011c011d},
|
||||
{0x0000a150, 0x02030204},
|
||||
{0x0000a154, 0x02010202},
|
||||
{0x0000a158, 0x021f0200},
|
||||
{0x0000a15c, 0x021d021e},
|
||||
{0x0000a160, 0x03010302},
|
||||
{0x0000a164, 0x031f0300},
|
||||
{0x0000a168, 0x0402031e},
|
||||
{0x0000a15c, 0x0302021e},
|
||||
{0x0000a160, 0x03000301},
|
||||
{0x0000a164, 0x031e031f},
|
||||
{0x0000a168, 0x0402031d},
|
||||
{0x0000a16c, 0x04000401},
|
||||
{0x0000a170, 0x041e041f},
|
||||
{0x0000a174, 0x05010502},
|
||||
{0x0000a178, 0x051f0500},
|
||||
{0x0000a17c, 0x0602051e},
|
||||
{0x0000a180, 0x06000601},
|
||||
{0x0000a184, 0x061e061f},
|
||||
{0x0000a188, 0x0703061d},
|
||||
{0x0000a18c, 0x07010702},
|
||||
{0x0000a190, 0x00000700},
|
||||
{0x0000a174, 0x0502041d},
|
||||
{0x0000a178, 0x05000501},
|
||||
{0x0000a17c, 0x051e051f},
|
||||
{0x0000a180, 0x06010602},
|
||||
{0x0000a184, 0x061f0600},
|
||||
{0x0000a188, 0x061d061e},
|
||||
{0x0000a18c, 0x07020703},
|
||||
{0x0000a190, 0x07000701},
|
||||
{0x0000a194, 0x00000000},
|
||||
{0x0000a198, 0x00000000},
|
||||
{0x0000a19c, 0x00000000},
|
||||
@@ -1317,13 +1317,13 @@ static const u32 ar9300Modes_low_ob_db_tx_gain_table_2p0[][5] = {
|
||||
{0x0000a5f8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},
|
||||
{0x0000a5fc, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},
|
||||
{0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
|
||||
{0x00016048, 0x64001a61, 0x64001a61, 0x64001a61, 0x64001a61},
|
||||
{0x00016048, 0x64000001, 0x64000001, 0x64000001, 0x64000001},
|
||||
{0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
|
||||
{0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
|
||||
{0x00016448, 0x64001a61, 0x64001a61, 0x64001a61, 0x64001a61},
|
||||
{0x00016448, 0x64000001, 0x64000001, 0x64000001, 0x64000001},
|
||||
{0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
|
||||
{0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
|
||||
{0x00016848, 0x64001a61, 0x64001a61, 0x64001a61, 0x64001a61},
|
||||
{0x00016848, 0x64000001, 0x64000001, 0x64000001, 0x64000001},
|
||||
{0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
|
||||
};
|
||||
|
||||
@@ -1497,22 +1497,22 @@ static const u32 ar9300Common_wo_xlna_rx_gain_table_2p0[][2] = {
|
||||
{0x0000a004, 0x00030002},
|
||||
{0x0000a008, 0x00050004},
|
||||
{0x0000a00c, 0x00810080},
|
||||
{0x0000a010, 0x01800082},
|
||||
{0x0000a014, 0x01820181},
|
||||
{0x0000a018, 0x01840183},
|
||||
{0x0000a01c, 0x01880185},
|
||||
{0x0000a020, 0x018a0189},
|
||||
{0x0000a024, 0x02850284},
|
||||
{0x0000a028, 0x02890288},
|
||||
{0x0000a02c, 0x03850384},
|
||||
{0x0000a030, 0x03890388},
|
||||
{0x0000a034, 0x038b038a},
|
||||
{0x0000a038, 0x038d038c},
|
||||
{0x0000a03c, 0x03910390},
|
||||
{0x0000a040, 0x03930392},
|
||||
{0x0000a044, 0x03950394},
|
||||
{0x0000a048, 0x00000396},
|
||||
{0x0000a04c, 0x00000000},
|
||||
{0x0000a010, 0x00830082},
|
||||
{0x0000a014, 0x01810180},
|
||||
{0x0000a018, 0x01830182},
|
||||
{0x0000a01c, 0x01850184},
|
||||
{0x0000a020, 0x01890188},
|
||||
{0x0000a024, 0x018b018a},
|
||||
{0x0000a028, 0x018d018c},
|
||||
{0x0000a02c, 0x03820190},
|
||||
{0x0000a030, 0x03840383},
|
||||
{0x0000a034, 0x03880385},
|
||||
{0x0000a038, 0x038a0389},
|
||||
{0x0000a03c, 0x038c038b},
|
||||
{0x0000a040, 0x0390038d},
|
||||
{0x0000a044, 0x03920391},
|
||||
{0x0000a048, 0x03940393},
|
||||
{0x0000a04c, 0x03960395},
|
||||
{0x0000a050, 0x00000000},
|
||||
{0x0000a054, 0x00000000},
|
||||
{0x0000a058, 0x00000000},
|
||||
@@ -1525,15 +1525,15 @@ static const u32 ar9300Common_wo_xlna_rx_gain_table_2p0[][2] = {
|
||||
{0x0000a074, 0x00000000},
|
||||
{0x0000a078, 0x00000000},
|
||||
{0x0000a07c, 0x00000000},
|
||||
{0x0000a080, 0x28282828},
|
||||
{0x0000a084, 0x28282828},
|
||||
{0x0000a088, 0x28282828},
|
||||
{0x0000a08c, 0x28282828},
|
||||
{0x0000a090, 0x28282828},
|
||||
{0x0000a094, 0x21212128},
|
||||
{0x0000a098, 0x171c1c1c},
|
||||
{0x0000a09c, 0x02020212},
|
||||
{0x0000a0a0, 0x00000202},
|
||||
{0x0000a080, 0x29292929},
|
||||
{0x0000a084, 0x29292929},
|
||||
{0x0000a088, 0x29292929},
|
||||
{0x0000a08c, 0x29292929},
|
||||
{0x0000a090, 0x22292929},
|
||||
{0x0000a094, 0x1d1d2222},
|
||||
{0x0000a098, 0x0c111117},
|
||||
{0x0000a09c, 0x00030303},
|
||||
{0x0000a0a0, 0x00000000},
|
||||
{0x0000a0a4, 0x00000000},
|
||||
{0x0000a0a8, 0x00000000},
|
||||
{0x0000a0ac, 0x00000000},
|
||||
@@ -1542,26 +1542,26 @@ static const u32 ar9300Common_wo_xlna_rx_gain_table_2p0[][2] = {
|
||||
{0x0000a0b8, 0x00000000},
|
||||
{0x0000a0bc, 0x00000000},
|
||||
{0x0000a0c0, 0x001f0000},
|
||||
{0x0000a0c4, 0x011f0100},
|
||||
{0x0000a0c8, 0x011d011e},
|
||||
{0x0000a0cc, 0x011b011c},
|
||||
{0x0000a0c4, 0x01000101},
|
||||
{0x0000a0c8, 0x011e011f},
|
||||
{0x0000a0cc, 0x011c011d},
|
||||
{0x0000a0d0, 0x02030204},
|
||||
{0x0000a0d4, 0x02010202},
|
||||
{0x0000a0d8, 0x021f0200},
|
||||
{0x0000a0dc, 0x021d021e},
|
||||
{0x0000a0e0, 0x03010302},
|
||||
{0x0000a0e4, 0x031f0300},
|
||||
{0x0000a0e8, 0x0402031e},
|
||||
{0x0000a0dc, 0x0302021e},
|
||||
{0x0000a0e0, 0x03000301},
|
||||
{0x0000a0e4, 0x031e031f},
|
||||
{0x0000a0e8, 0x0402031d},
|
||||
{0x0000a0ec, 0x04000401},
|
||||
{0x0000a0f0, 0x041e041f},
|
||||
{0x0000a0f4, 0x05010502},
|
||||
{0x0000a0f8, 0x051f0500},
|
||||
{0x0000a0fc, 0x0602051e},
|
||||
{0x0000a100, 0x06000601},
|
||||
{0x0000a104, 0x061e061f},
|
||||
{0x0000a108, 0x0703061d},
|
||||
{0x0000a10c, 0x07010702},
|
||||
{0x0000a110, 0x00000700},
|
||||
{0x0000a0f4, 0x0502041d},
|
||||
{0x0000a0f8, 0x05000501},
|
||||
{0x0000a0fc, 0x051e051f},
|
||||
{0x0000a100, 0x06010602},
|
||||
{0x0000a104, 0x061f0600},
|
||||
{0x0000a108, 0x061d061e},
|
||||
{0x0000a10c, 0x07020703},
|
||||
{0x0000a110, 0x07000701},
|
||||
{0x0000a114, 0x00000000},
|
||||
{0x0000a118, 0x00000000},
|
||||
{0x0000a11c, 0x00000000},
|
||||
@@ -1574,26 +1574,26 @@ static const u32 ar9300Common_wo_xlna_rx_gain_table_2p0[][2] = {
|
||||
{0x0000a138, 0x00000000},
|
||||
{0x0000a13c, 0x00000000},
|
||||
{0x0000a140, 0x001f0000},
|
||||
{0x0000a144, 0x011f0100},
|
||||
{0x0000a148, 0x011d011e},
|
||||
{0x0000a14c, 0x011b011c},
|
||||
{0x0000a144, 0x01000101},
|
||||
{0x0000a148, 0x011e011f},
|
||||
{0x0000a14c, 0x011c011d},
|
||||
{0x0000a150, 0x02030204},
|
||||
{0x0000a154, 0x02010202},
|
||||
{0x0000a158, 0x021f0200},
|
||||
{0x0000a15c, 0x021d021e},
|
||||
{0x0000a160, 0x03010302},
|
||||
{0x0000a164, 0x031f0300},
|
||||
{0x0000a168, 0x0402031e},
|
||||
{0x0000a15c, 0x0302021e},
|
||||
{0x0000a160, 0x03000301},
|
||||
{0x0000a164, 0x031e031f},
|
||||
{0x0000a168, 0x0402031d},
|
||||
{0x0000a16c, 0x04000401},
|
||||
{0x0000a170, 0x041e041f},
|
||||
{0x0000a174, 0x05010502},
|
||||
{0x0000a178, 0x051f0500},
|
||||
{0x0000a17c, 0x0602051e},
|
||||
{0x0000a180, 0x06000601},
|
||||
{0x0000a184, 0x061e061f},
|
||||
{0x0000a188, 0x0703061d},
|
||||
{0x0000a18c, 0x07010702},
|
||||
{0x0000a190, 0x00000700},
|
||||
{0x0000a174, 0x0502041d},
|
||||
{0x0000a178, 0x05000501},
|
||||
{0x0000a17c, 0x051e051f},
|
||||
{0x0000a180, 0x06010602},
|
||||
{0x0000a184, 0x061f0600},
|
||||
{0x0000a188, 0x061d061e},
|
||||
{0x0000a18c, 0x07020703},
|
||||
{0x0000a190, 0x07000701},
|
||||
{0x0000a194, 0x00000000},
|
||||
{0x0000a198, 0x00000000},
|
||||
{0x0000a19c, 0x00000000},
|
||||
@@ -1620,7 +1620,7 @@ static const u32 ar9300Common_wo_xlna_rx_gain_table_2p0[][2] = {
|
||||
{0x0000a1f0, 0x00000396},
|
||||
{0x0000a1f4, 0x00000396},
|
||||
{0x0000a1f8, 0x00000396},
|
||||
{0x0000a1fc, 0x00000296},
|
||||
{0x0000a1fc, 0x00000196},
|
||||
{0x0000b000, 0x00010000},
|
||||
{0x0000b004, 0x00030002},
|
||||
{0x0000b008, 0x00050004},
|
||||
|
||||
@@ -78,6 +78,90 @@ static const struct file_operations fops_debug = {
|
||||
|
||||
#define DMA_BUF_LEN 1024
|
||||
|
||||
static ssize_t read_file_tx_chainmask(struct file *file, char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||
char buf[32];
|
||||
unsigned int len;
|
||||
|
||||
len = snprintf(buf, sizeof(buf), "0x%08x\n", common->tx_chainmask);
|
||||
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
|
||||
}
|
||||
|
||||
static ssize_t write_file_tx_chainmask(struct file *file, const char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||
unsigned long mask;
|
||||
char buf[32];
|
||||
ssize_t len;
|
||||
|
||||
len = min(count, sizeof(buf) - 1);
|
||||
if (copy_from_user(buf, user_buf, len))
|
||||
return -EINVAL;
|
||||
|
||||
buf[len] = '\0';
|
||||
if (strict_strtoul(buf, 0, &mask))
|
||||
return -EINVAL;
|
||||
|
||||
common->tx_chainmask = mask;
|
||||
sc->sc_ah->caps.tx_chainmask = mask;
|
||||
return count;
|
||||
}
|
||||
|
||||
static const struct file_operations fops_tx_chainmask = {
|
||||
.read = read_file_tx_chainmask,
|
||||
.write = write_file_tx_chainmask,
|
||||
.open = ath9k_debugfs_open,
|
||||
.owner = THIS_MODULE
|
||||
};
|
||||
|
||||
|
||||
static ssize_t read_file_rx_chainmask(struct file *file, char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||
char buf[32];
|
||||
unsigned int len;
|
||||
|
||||
len = snprintf(buf, sizeof(buf), "0x%08x\n", common->rx_chainmask);
|
||||
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
|
||||
}
|
||||
|
||||
static ssize_t write_file_rx_chainmask(struct file *file, const char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||
unsigned long mask;
|
||||
char buf[32];
|
||||
ssize_t len;
|
||||
|
||||
len = min(count, sizeof(buf) - 1);
|
||||
if (copy_from_user(buf, user_buf, len))
|
||||
return -EINVAL;
|
||||
|
||||
buf[len] = '\0';
|
||||
if (strict_strtoul(buf, 0, &mask))
|
||||
return -EINVAL;
|
||||
|
||||
common->rx_chainmask = mask;
|
||||
sc->sc_ah->caps.rx_chainmask = mask;
|
||||
return count;
|
||||
}
|
||||
|
||||
static const struct file_operations fops_rx_chainmask = {
|
||||
.read = read_file_rx_chainmask,
|
||||
.write = write_file_rx_chainmask,
|
||||
.open = ath9k_debugfs_open,
|
||||
.owner = THIS_MODULE
|
||||
};
|
||||
|
||||
|
||||
static ssize_t read_file_dma(struct file *file, char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
@@ -711,6 +795,86 @@ static const struct file_operations fops_recv = {
|
||||
.owner = THIS_MODULE
|
||||
};
|
||||
|
||||
static ssize_t read_file_regidx(struct file *file, char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
char buf[32];
|
||||
unsigned int len;
|
||||
|
||||
len = snprintf(buf, sizeof(buf), "0x%08x\n", sc->debug.regidx);
|
||||
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
|
||||
}
|
||||
|
||||
static ssize_t write_file_regidx(struct file *file, const char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
unsigned long regidx;
|
||||
char buf[32];
|
||||
ssize_t len;
|
||||
|
||||
len = min(count, sizeof(buf) - 1);
|
||||
if (copy_from_user(buf, user_buf, len))
|
||||
return -EINVAL;
|
||||
|
||||
buf[len] = '\0';
|
||||
if (strict_strtoul(buf, 0, ®idx))
|
||||
return -EINVAL;
|
||||
|
||||
sc->debug.regidx = regidx;
|
||||
return count;
|
||||
}
|
||||
|
||||
static const struct file_operations fops_regidx = {
|
||||
.read = read_file_regidx,
|
||||
.write = write_file_regidx,
|
||||
.open = ath9k_debugfs_open,
|
||||
.owner = THIS_MODULE
|
||||
};
|
||||
|
||||
static ssize_t read_file_regval(struct file *file, char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
char buf[32];
|
||||
unsigned int len;
|
||||
u32 regval;
|
||||
|
||||
regval = REG_READ_D(ah, sc->debug.regidx);
|
||||
len = snprintf(buf, sizeof(buf), "0x%08x\n", regval);
|
||||
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
|
||||
}
|
||||
|
||||
static ssize_t write_file_regval(struct file *file, const char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
unsigned long regval;
|
||||
char buf[32];
|
||||
ssize_t len;
|
||||
|
||||
len = min(count, sizeof(buf) - 1);
|
||||
if (copy_from_user(buf, user_buf, len))
|
||||
return -EINVAL;
|
||||
|
||||
buf[len] = '\0';
|
||||
if (strict_strtoul(buf, 0, ®val))
|
||||
return -EINVAL;
|
||||
|
||||
REG_WRITE_D(ah, sc->debug.regidx, regval);
|
||||
return count;
|
||||
}
|
||||
|
||||
static const struct file_operations fops_regval = {
|
||||
.read = read_file_regval,
|
||||
.write = write_file_regval,
|
||||
.open = ath9k_debugfs_open,
|
||||
.owner = THIS_MODULE
|
||||
};
|
||||
|
||||
int ath9k_init_debug(struct ath_hw *ah)
|
||||
{
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
@@ -722,54 +886,55 @@ int ath9k_init_debug(struct ath_hw *ah)
|
||||
sc->debug.debugfs_phy = debugfs_create_dir(wiphy_name(sc->hw->wiphy),
|
||||
ath9k_debugfs_root);
|
||||
if (!sc->debug.debugfs_phy)
|
||||
goto err;
|
||||
return -ENOMEM;
|
||||
|
||||
#ifdef CONFIG_ATH_DEBUG
|
||||
sc->debug.debugfs_debug = debugfs_create_file("debug",
|
||||
S_IRUSR | S_IWUSR, sc->debug.debugfs_phy, sc, &fops_debug);
|
||||
if (!sc->debug.debugfs_debug)
|
||||
if (!debugfs_create_file("debug", S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc, &fops_debug))
|
||||
goto err;
|
||||
#endif
|
||||
|
||||
sc->debug.debugfs_dma = debugfs_create_file("dma", S_IRUSR,
|
||||
sc->debug.debugfs_phy, sc, &fops_dma);
|
||||
if (!sc->debug.debugfs_dma)
|
||||
if (!debugfs_create_file("dma", S_IRUSR, sc->debug.debugfs_phy,
|
||||
sc, &fops_dma))
|
||||
goto err;
|
||||
|
||||
sc->debug.debugfs_interrupt = debugfs_create_file("interrupt",
|
||||
S_IRUSR,
|
||||
sc->debug.debugfs_phy,
|
||||
sc, &fops_interrupt);
|
||||
if (!sc->debug.debugfs_interrupt)
|
||||
if (!debugfs_create_file("interrupt", S_IRUSR, sc->debug.debugfs_phy,
|
||||
sc, &fops_interrupt))
|
||||
goto err;
|
||||
|
||||
sc->debug.debugfs_rcstat = debugfs_create_file("rcstat",
|
||||
S_IRUSR,
|
||||
sc->debug.debugfs_phy,
|
||||
sc, &fops_rcstat);
|
||||
if (!sc->debug.debugfs_rcstat)
|
||||
if (!debugfs_create_file("rcstat", S_IRUSR, sc->debug.debugfs_phy,
|
||||
sc, &fops_rcstat))
|
||||
goto err;
|
||||
|
||||
sc->debug.debugfs_wiphy = debugfs_create_file(
|
||||
"wiphy", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy, sc,
|
||||
&fops_wiphy);
|
||||
if (!sc->debug.debugfs_wiphy)
|
||||
if (!debugfs_create_file("wiphy", S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc, &fops_wiphy))
|
||||
goto err;
|
||||
|
||||
sc->debug.debugfs_xmit = debugfs_create_file("xmit",
|
||||
S_IRUSR,
|
||||
sc->debug.debugfs_phy,
|
||||
sc, &fops_xmit);
|
||||
if (!sc->debug.debugfs_xmit)
|
||||
if (!debugfs_create_file("xmit", S_IRUSR, sc->debug.debugfs_phy,
|
||||
sc, &fops_xmit))
|
||||
goto err;
|
||||
|
||||
sc->debug.debugfs_recv = debugfs_create_file("recv",
|
||||
S_IRUSR,
|
||||
sc->debug.debugfs_phy,
|
||||
sc, &fops_recv);
|
||||
if (!sc->debug.debugfs_recv)
|
||||
if (!debugfs_create_file("recv", S_IRUSR, sc->debug.debugfs_phy,
|
||||
sc, &fops_recv))
|
||||
goto err;
|
||||
|
||||
if (!debugfs_create_file("rx_chainmask", S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc, &fops_rx_chainmask))
|
||||
goto err;
|
||||
|
||||
if (!debugfs_create_file("tx_chainmask", S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc, &fops_tx_chainmask))
|
||||
goto err;
|
||||
|
||||
if (!debugfs_create_file("regidx", S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc, &fops_regidx))
|
||||
goto err;
|
||||
|
||||
if (!debugfs_create_file("regval", S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc, &fops_regval))
|
||||
goto err;
|
||||
|
||||
sc->debug.regidx = 0;
|
||||
return 0;
|
||||
err:
|
||||
ath9k_exit_debug(ah);
|
||||
@@ -781,14 +946,7 @@ void ath9k_exit_debug(struct ath_hw *ah)
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
struct ath_softc *sc = (struct ath_softc *) common->priv;
|
||||
|
||||
debugfs_remove(sc->debug.debugfs_recv);
|
||||
debugfs_remove(sc->debug.debugfs_xmit);
|
||||
debugfs_remove(sc->debug.debugfs_wiphy);
|
||||
debugfs_remove(sc->debug.debugfs_rcstat);
|
||||
debugfs_remove(sc->debug.debugfs_interrupt);
|
||||
debugfs_remove(sc->debug.debugfs_dma);
|
||||
debugfs_remove(sc->debug.debugfs_debug);
|
||||
debugfs_remove(sc->debug.debugfs_phy);
|
||||
debugfs_remove_recursive(sc->debug.debugfs_phy);
|
||||
}
|
||||
|
||||
int ath9k_debug_create_root(void)
|
||||
|
||||
@@ -153,13 +153,7 @@ struct ath_stats {
|
||||
|
||||
struct ath9k_debug {
|
||||
struct dentry *debugfs_phy;
|
||||
struct dentry *debugfs_debug;
|
||||
struct dentry *debugfs_dma;
|
||||
struct dentry *debugfs_interrupt;
|
||||
struct dentry *debugfs_rcstat;
|
||||
struct dentry *debugfs_wiphy;
|
||||
struct dentry *debugfs_xmit;
|
||||
struct dentry *debugfs_recv;
|
||||
u32 regidx;
|
||||
struct ath_stats stats;
|
||||
};
|
||||
|
||||
|
||||
@@ -735,6 +735,14 @@ err:
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
static void ath9k_hif_usb_dealloc_urbs(struct hif_device_usb *hif_dev)
|
||||
{
|
||||
usb_kill_anchored_urbs(&hif_dev->regout_submitted);
|
||||
ath9k_hif_usb_dealloc_reg_in_urb(hif_dev);
|
||||
ath9k_hif_usb_dealloc_tx_urbs(hif_dev);
|
||||
ath9k_hif_usb_dealloc_rx_urbs(hif_dev);
|
||||
}
|
||||
|
||||
static int ath9k_hif_usb_download_fw(struct hif_device_usb *hif_dev)
|
||||
{
|
||||
int transfer, err;
|
||||
@@ -794,14 +802,6 @@ static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev,
|
||||
goto err_fw_req;
|
||||
}
|
||||
|
||||
/* Download firmware */
|
||||
ret = ath9k_hif_usb_download_fw(hif_dev);
|
||||
if (ret) {
|
||||
dev_err(&hif_dev->udev->dev,
|
||||
"ath9k_htc: Firmware - %s download failed\n", fw_name);
|
||||
goto err_fw_download;
|
||||
}
|
||||
|
||||
/* Alloc URBs */
|
||||
ret = ath9k_hif_usb_alloc_urbs(hif_dev);
|
||||
if (ret) {
|
||||
@@ -810,25 +810,25 @@ static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev,
|
||||
goto err_urb;
|
||||
}
|
||||
|
||||
/* Download firmware */
|
||||
ret = ath9k_hif_usb_download_fw(hif_dev);
|
||||
if (ret) {
|
||||
dev_err(&hif_dev->udev->dev,
|
||||
"ath9k_htc: Firmware - %s download failed\n", fw_name);
|
||||
goto err_fw_download;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_urb:
|
||||
/* Nothing */
|
||||
err_fw_download:
|
||||
ath9k_hif_usb_dealloc_urbs(hif_dev);
|
||||
err_urb:
|
||||
release_firmware(hif_dev->firmware);
|
||||
err_fw_req:
|
||||
hif_dev->firmware = NULL;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void ath9k_hif_usb_dealloc_urbs(struct hif_device_usb *hif_dev)
|
||||
{
|
||||
usb_kill_anchored_urbs(&hif_dev->regout_submitted);
|
||||
ath9k_hif_usb_dealloc_reg_in_urb(hif_dev);
|
||||
ath9k_hif_usb_dealloc_tx_urbs(hif_dev);
|
||||
ath9k_hif_usb_dealloc_rx_urbs(hif_dev);
|
||||
}
|
||||
|
||||
static void ath9k_hif_usb_dev_deinit(struct hif_device_usb *hif_dev)
|
||||
{
|
||||
ath9k_hif_usb_dealloc_urbs(hif_dev);
|
||||
@@ -859,21 +859,21 @@ static int ath9k_hif_usb_probe(struct usb_interface *interface,
|
||||
#endif
|
||||
usb_set_intfdata(interface, hif_dev);
|
||||
|
||||
hif_dev->htc_handle = ath9k_htc_hw_alloc(hif_dev, &hif_usb,
|
||||
&hif_dev->udev->dev);
|
||||
if (hif_dev->htc_handle == NULL) {
|
||||
ret = -ENOMEM;
|
||||
goto err_htc_hw_alloc;
|
||||
}
|
||||
|
||||
ret = ath9k_hif_usb_dev_init(hif_dev, fw_name);
|
||||
if (ret) {
|
||||
ret = -EINVAL;
|
||||
goto err_hif_init_usb;
|
||||
}
|
||||
|
||||
hif_dev->htc_handle = ath9k_htc_hw_alloc(hif_dev);
|
||||
if (hif_dev->htc_handle == NULL) {
|
||||
ret = -ENOMEM;
|
||||
goto err_htc_hw_alloc;
|
||||
}
|
||||
|
||||
ret = ath9k_htc_hw_init(&hif_usb, hif_dev->htc_handle, hif_dev,
|
||||
&hif_dev->udev->dev, hif_dev->device_id,
|
||||
ATH9K_HIF_USB);
|
||||
ret = ath9k_htc_hw_init(hif_dev->htc_handle,
|
||||
&hif_dev->udev->dev, hif_dev->device_id);
|
||||
if (ret) {
|
||||
ret = -EINVAL;
|
||||
goto err_htc_hw_init;
|
||||
@@ -884,10 +884,10 @@ static int ath9k_hif_usb_probe(struct usb_interface *interface,
|
||||
return 0;
|
||||
|
||||
err_htc_hw_init:
|
||||
ath9k_htc_hw_free(hif_dev->htc_handle);
|
||||
err_htc_hw_alloc:
|
||||
ath9k_hif_usb_dev_deinit(hif_dev);
|
||||
err_hif_init_usb:
|
||||
ath9k_htc_hw_free(hif_dev->htc_handle);
|
||||
err_htc_hw_alloc:
|
||||
usb_set_intfdata(interface, NULL);
|
||||
kfree(hif_dev);
|
||||
usb_put_dev(udev);
|
||||
|
||||
@@ -81,6 +81,11 @@ static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
|
||||
{
|
||||
int time_left;
|
||||
|
||||
if (atomic_read(&priv->htc->tgt_ready) > 0) {
|
||||
atomic_dec(&priv->htc->tgt_ready);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Firmware can take up to 50ms to get ready, to be safe use 1 second */
|
||||
time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
|
||||
if (!time_left) {
|
||||
@@ -88,6 +93,8 @@ static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
atomic_dec(&priv->htc->tgt_ready);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -1452,6 +1452,8 @@ static void ath9k_htc_sta_notify(struct ieee80211_hw *hw,
|
||||
struct ath9k_htc_priv *priv = hw->priv;
|
||||
int ret;
|
||||
|
||||
mutex_lock(&priv->mutex);
|
||||
|
||||
switch (cmd) {
|
||||
case STA_NOTIFY_ADD:
|
||||
ret = ath9k_htc_add_station(priv, vif, sta);
|
||||
@@ -1464,6 +1466,8 @@ static void ath9k_htc_sta_notify(struct ieee80211_hw *hw,
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
mutex_unlock(&priv->mutex);
|
||||
}
|
||||
|
||||
static int ath9k_htc_conf_tx(struct ieee80211_hw *hw, u16 queue,
|
||||
|
||||
@@ -39,7 +39,7 @@ static struct htc_endpoint *get_next_avail_ep(struct htc_endpoint *endpoint)
|
||||
{
|
||||
enum htc_endpoint_id avail_epid;
|
||||
|
||||
for (avail_epid = ENDPOINT_MAX; avail_epid > ENDPOINT0; avail_epid--)
|
||||
for (avail_epid = (ENDPOINT_MAX - 1); avail_epid > ENDPOINT0; avail_epid--)
|
||||
if (endpoint[avail_epid].service_id == 0)
|
||||
return &endpoint[avail_epid];
|
||||
return NULL;
|
||||
@@ -95,6 +95,7 @@ static void htc_process_target_rdy(struct htc_target *target,
|
||||
endpoint = &target->endpoint[ENDPOINT0];
|
||||
endpoint->service_id = HTC_CTRL_RSVD_SVC;
|
||||
endpoint->max_msglen = HTC_MAX_CONTROL_MESSAGE_LENGTH;
|
||||
atomic_inc(&target->tgt_ready);
|
||||
complete(&target->target_wait);
|
||||
}
|
||||
|
||||
@@ -116,7 +117,7 @@ static void htc_process_conn_rsp(struct htc_target *target,
|
||||
max_msglen = be16_to_cpu(svc_rspmsg->max_msg_len);
|
||||
endpoint = &target->endpoint[epid];
|
||||
|
||||
for (tepid = ENDPOINT_MAX; tepid > ENDPOINT0; tepid--) {
|
||||
for (tepid = (ENDPOINT_MAX - 1); tepid > ENDPOINT0; tepid--) {
|
||||
tmp_endpoint = &target->endpoint[tepid];
|
||||
if (tmp_endpoint->service_id == service_id) {
|
||||
tmp_endpoint->service_id = 0;
|
||||
@@ -124,7 +125,7 @@ static void htc_process_conn_rsp(struct htc_target *target,
|
||||
}
|
||||
}
|
||||
|
||||
if (!tmp_endpoint)
|
||||
if (tepid == ENDPOINT0)
|
||||
return;
|
||||
|
||||
endpoint->service_id = service_id;
|
||||
@@ -297,7 +298,7 @@ void htc_stop(struct htc_target *target)
|
||||
enum htc_endpoint_id epid;
|
||||
struct htc_endpoint *endpoint;
|
||||
|
||||
for (epid = ENDPOINT0; epid <= ENDPOINT_MAX; epid++) {
|
||||
for (epid = ENDPOINT0; epid < ENDPOINT_MAX; epid++) {
|
||||
endpoint = &target->endpoint[epid];
|
||||
if (endpoint->service_id != 0)
|
||||
target->hif->stop(target->hif_dev, endpoint->ul_pipeid);
|
||||
@@ -309,7 +310,7 @@ void htc_start(struct htc_target *target)
|
||||
enum htc_endpoint_id epid;
|
||||
struct htc_endpoint *endpoint;
|
||||
|
||||
for (epid = ENDPOINT0; epid <= ENDPOINT_MAX; epid++) {
|
||||
for (epid = ENDPOINT0; epid < ENDPOINT_MAX; epid++) {
|
||||
endpoint = &target->endpoint[epid];
|
||||
if (endpoint->service_id != 0)
|
||||
target->hif->start(target->hif_dev,
|
||||
@@ -425,29 +426,19 @@ void ath9k_htc_rx_msg(struct htc_target *htc_handle,
|
||||
}
|
||||
}
|
||||
|
||||
struct htc_target *ath9k_htc_hw_alloc(void *hif_handle)
|
||||
struct htc_target *ath9k_htc_hw_alloc(void *hif_handle,
|
||||
struct ath9k_htc_hif *hif,
|
||||
struct device *dev)
|
||||
{
|
||||
struct htc_endpoint *endpoint;
|
||||
struct htc_target *target;
|
||||
|
||||
target = kzalloc(sizeof(struct htc_target), GFP_KERNEL);
|
||||
if (!target)
|
||||
if (!target) {
|
||||
printk(KERN_ERR "Unable to allocate memory for"
|
||||
"target device\n");
|
||||
|
||||
return target;
|
||||
}
|
||||
|
||||
void ath9k_htc_hw_free(struct htc_target *htc)
|
||||
{
|
||||
kfree(htc);
|
||||
}
|
||||
|
||||
int ath9k_htc_hw_init(struct ath9k_htc_hif *hif, struct htc_target *target,
|
||||
void *hif_handle, struct device *dev, u16 devid,
|
||||
enum ath9k_hif_transports transport)
|
||||
{
|
||||
struct htc_endpoint *endpoint;
|
||||
int err = 0;
|
||||
return NULL;
|
||||
}
|
||||
|
||||
init_completion(&target->target_wait);
|
||||
init_completion(&target->cmd_wait);
|
||||
@@ -461,8 +452,20 @@ int ath9k_htc_hw_init(struct ath9k_htc_hif *hif, struct htc_target *target,
|
||||
endpoint->ul_pipeid = hif->control_ul_pipe;
|
||||
endpoint->dl_pipeid = hif->control_dl_pipe;
|
||||
|
||||
err = ath9k_htc_probe_device(target, dev, devid);
|
||||
if (err) {
|
||||
atomic_set(&target->tgt_ready, 0);
|
||||
|
||||
return target;
|
||||
}
|
||||
|
||||
void ath9k_htc_hw_free(struct htc_target *htc)
|
||||
{
|
||||
kfree(htc);
|
||||
}
|
||||
|
||||
int ath9k_htc_hw_init(struct htc_target *target,
|
||||
struct device *dev, u16 devid)
|
||||
{
|
||||
if (ath9k_htc_probe_device(target, dev, devid)) {
|
||||
printk(KERN_ERR "Failed to initialize the device\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
@@ -123,9 +123,6 @@ struct htc_endpoint {
|
||||
#define HTC_CONTROL_BUFFER_SIZE \
|
||||
(HTC_MAX_CONTROL_MESSAGE_LENGTH + sizeof(struct htc_frame_hdr))
|
||||
|
||||
#define NUM_CONTROL_BUFFERS 8
|
||||
#define HST_ENDPOINT_MAX 8
|
||||
|
||||
struct htc_control_buf {
|
||||
struct htc_packet htc_pkt;
|
||||
u8 buf[HTC_CONTROL_BUFFER_SIZE];
|
||||
@@ -139,7 +136,7 @@ struct htc_target {
|
||||
struct ath9k_htc_priv *drv_priv;
|
||||
struct device *dev;
|
||||
struct ath9k_htc_hif *hif;
|
||||
struct htc_endpoint endpoint[HST_ENDPOINT_MAX];
|
||||
struct htc_endpoint endpoint[ENDPOINT_MAX];
|
||||
struct completion target_wait;
|
||||
struct completion cmd_wait;
|
||||
struct list_head list;
|
||||
@@ -147,6 +144,7 @@ struct htc_target {
|
||||
u16 credits;
|
||||
u16 credit_size;
|
||||
u8 htc_flags;
|
||||
atomic_t tgt_ready;
|
||||
};
|
||||
|
||||
enum htc_msg_id {
|
||||
@@ -236,11 +234,12 @@ void ath9k_htc_rx_msg(struct htc_target *htc_handle,
|
||||
void ath9k_htc_txcompletion_cb(struct htc_target *htc_handle,
|
||||
struct sk_buff *skb, bool txok);
|
||||
|
||||
struct htc_target *ath9k_htc_hw_alloc(void *hif_handle);
|
||||
struct htc_target *ath9k_htc_hw_alloc(void *hif_handle,
|
||||
struct ath9k_htc_hif *hif,
|
||||
struct device *dev);
|
||||
void ath9k_htc_hw_free(struct htc_target *htc);
|
||||
int ath9k_htc_hw_init(struct ath9k_htc_hif *hif, struct htc_target *target,
|
||||
void *hif_handle, struct device *dev, u16 devid,
|
||||
enum ath9k_hif_transports transport);
|
||||
int ath9k_htc_hw_init(struct htc_target *target,
|
||||
struct device *dev, u16 devid);
|
||||
void ath9k_htc_hw_deinit(struct htc_target *target, bool hot_unplug);
|
||||
|
||||
#endif /* HTC_HST_H */
|
||||
|
||||
@@ -150,11 +150,9 @@ static bool ath_rx_edma_buf_link(struct ath_softc *sc,
|
||||
static void ath_rx_addbuffer_edma(struct ath_softc *sc,
|
||||
enum ath9k_rx_qtype qtype, int size)
|
||||
{
|
||||
struct ath_rx_edma *rx_edma;
|
||||
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||
u32 nbuf = 0;
|
||||
|
||||
rx_edma = &sc->rx.rx_edma[qtype];
|
||||
if (list_empty(&sc->rx.rxbuf)) {
|
||||
ath_print(common, ATH_DBG_QUEUE, "No free rx buf available\n");
|
||||
return;
|
||||
@@ -718,6 +716,7 @@ static bool ath_edma_get_buffers(struct ath_softc *sc,
|
||||
__skb_unlink(skb, &rx_edma->rx_fifo);
|
||||
list_add_tail(&bf->list, &sc->rx.rxbuf);
|
||||
ath_rx_edma_buf_link(sc, qtype);
|
||||
return true;
|
||||
}
|
||||
skb_queue_tail(&rx_edma->rx_buffers, skb);
|
||||
|
||||
|
||||
@@ -355,8 +355,7 @@ static struct hostap_bss_info *__hostap_add_bss(local_info_t *local, u8 *bssid,
|
||||
list_del(&bss->list);
|
||||
local->num_bss_info--;
|
||||
} else {
|
||||
bss = (struct hostap_bss_info *)
|
||||
kmalloc(sizeof(*bss), GFP_ATOMIC);
|
||||
bss = kmalloc(sizeof(*bss), GFP_ATOMIC);
|
||||
if (bss == NULL)
|
||||
return NULL;
|
||||
}
|
||||
|
||||
@@ -3039,8 +3039,7 @@ static int prism2_ioctl_priv_download(local_info_t *local, struct iw_point *p)
|
||||
p->length > 1024 || !p->pointer)
|
||||
return -EINVAL;
|
||||
|
||||
param = (struct prism2_download_param *)
|
||||
kmalloc(p->length, GFP_KERNEL);
|
||||
param = kmalloc(p->length, GFP_KERNEL);
|
||||
if (param == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
|
||||
@@ -212,7 +212,7 @@ static struct iwl_lib_ops iwl1000_lib = {
|
||||
.temperature = iwlagn_temperature,
|
||||
.set_ct_kill = iwl1000_set_ct_threshold,
|
||||
},
|
||||
.add_bcast_station = iwl_add_bcast_station,
|
||||
.manage_ibss_station = iwlagn_manage_ibss_station,
|
||||
.debugfs_ops = {
|
||||
.rx_stats_read = iwl_ucode_rx_stats_read,
|
||||
.tx_stats_read = iwl_ucode_tx_stats_read,
|
||||
@@ -224,7 +224,6 @@ static struct iwl_lib_ops iwl1000_lib = {
|
||||
};
|
||||
|
||||
static const struct iwl_ops iwl1000_ops = {
|
||||
.ucode = &iwlagn_ucode,
|
||||
.lib = &iwl1000_lib,
|
||||
.hcmd = &iwlagn_hcmd,
|
||||
.utils = &iwlagn_hcmd_utils,
|
||||
@@ -260,6 +259,9 @@ struct iwl_cfg iwl1000_bgn_cfg = {
|
||||
.chain_noise_scale = 1000,
|
||||
.monitor_recover_period = IWL_MONITORING_PERIOD,
|
||||
.max_event_log_size = 128,
|
||||
.ucode_tracing = true,
|
||||
.sensitivity_calib_by_driver = true,
|
||||
.chain_noise_calib_by_driver = true,
|
||||
};
|
||||
|
||||
struct iwl_cfg iwl1000_bg_cfg = {
|
||||
@@ -289,6 +291,9 @@ struct iwl_cfg iwl1000_bg_cfg = {
|
||||
.chain_noise_scale = 1000,
|
||||
.monitor_recover_period = IWL_MONITORING_PERIOD,
|
||||
.max_event_log_size = 128,
|
||||
.ucode_tracing = true,
|
||||
.sensitivity_calib_by_driver = true,
|
||||
.chain_noise_calib_by_driver = true,
|
||||
};
|
||||
|
||||
MODULE_FIRMWARE(IWL1000_MODULE_FIRMWARE(IWL1000_UCODE_API_MAX));
|
||||
|
||||
@@ -391,6 +391,67 @@ static void iwl3945_accumulative_statistics(struct iwl_priv *priv,
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* iwl3945_good_plcp_health - checks for plcp error.
|
||||
*
|
||||
* When the plcp error is exceeding the thresholds, reset the radio
|
||||
* to improve the throughput.
|
||||
*/
|
||||
static bool iwl3945_good_plcp_health(struct iwl_priv *priv,
|
||||
struct iwl_rx_packet *pkt)
|
||||
{
|
||||
bool rc = true;
|
||||
struct iwl3945_notif_statistics current_stat;
|
||||
int combined_plcp_delta;
|
||||
unsigned int plcp_msec;
|
||||
unsigned long plcp_received_jiffies;
|
||||
|
||||
memcpy(¤t_stat, pkt->u.raw, sizeof(struct
|
||||
iwl3945_notif_statistics));
|
||||
/*
|
||||
* check for plcp_err and trigger radio reset if it exceeds
|
||||
* the plcp error threshold plcp_delta.
|
||||
*/
|
||||
plcp_received_jiffies = jiffies;
|
||||
plcp_msec = jiffies_to_msecs((long) plcp_received_jiffies -
|
||||
(long) priv->plcp_jiffies);
|
||||
priv->plcp_jiffies = plcp_received_jiffies;
|
||||
/*
|
||||
* check to make sure plcp_msec is not 0 to prevent division
|
||||
* by zero.
|
||||
*/
|
||||
if (plcp_msec) {
|
||||
combined_plcp_delta =
|
||||
(le32_to_cpu(current_stat.rx.ofdm.plcp_err) -
|
||||
le32_to_cpu(priv->_3945.statistics.rx.ofdm.plcp_err));
|
||||
|
||||
if ((combined_plcp_delta > 0) &&
|
||||
((combined_plcp_delta * 100) / plcp_msec) >
|
||||
priv->cfg->plcp_delta_threshold) {
|
||||
/*
|
||||
* if plcp_err exceed the threshold, the following
|
||||
* data is printed in csv format:
|
||||
* Text: plcp_err exceeded %d,
|
||||
* Received ofdm.plcp_err,
|
||||
* Current ofdm.plcp_err,
|
||||
* combined_plcp_delta,
|
||||
* plcp_msec
|
||||
*/
|
||||
IWL_DEBUG_RADIO(priv, "plcp_err exceeded %u, "
|
||||
"%u, %d, %u mSecs\n",
|
||||
priv->cfg->plcp_delta_threshold,
|
||||
le32_to_cpu(current_stat.rx.ofdm.plcp_err),
|
||||
combined_plcp_delta, plcp_msec);
|
||||
/*
|
||||
* Reset the RF radio due to the high plcp
|
||||
* error rate
|
||||
*/
|
||||
rc = false;
|
||||
}
|
||||
}
|
||||
return rc;
|
||||
}
|
||||
|
||||
void iwl3945_hw_rx_statistics(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb)
|
||||
{
|
||||
@@ -402,6 +463,7 @@ void iwl3945_hw_rx_statistics(struct iwl_priv *priv,
|
||||
#ifdef CONFIG_IWLWIFI_DEBUG
|
||||
iwl3945_accumulative_statistics(priv, (__le32 *)&pkt->u.raw);
|
||||
#endif
|
||||
iwl_recover_from_statistics(priv, pkt);
|
||||
|
||||
memcpy(&priv->_3945.statistics, pkt->u.raw, sizeof(priv->_3945.statistics));
|
||||
}
|
||||
@@ -885,7 +947,8 @@ void iwl3945_hw_build_tx_cmd_rate(struct iwl_priv *priv,
|
||||
tx_cmd->supp_rates[1], tx_cmd->supp_rates[0]);
|
||||
}
|
||||
|
||||
u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate, u8 flags)
|
||||
static u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id,
|
||||
u16 tx_rate, u8 flags)
|
||||
{
|
||||
unsigned long flags_spin;
|
||||
struct iwl_station_entry *station;
|
||||
@@ -1715,6 +1778,11 @@ static int iwl3945_hw_reg_comp_txpower_temp(struct iwl_priv *priv)
|
||||
int ref_temp;
|
||||
int temperature = priv->temperature;
|
||||
|
||||
if (priv->disable_tx_power_cal ||
|
||||
test_bit(STATUS_SCANNING, &priv->status)) {
|
||||
/* do not perform tx power calibration */
|
||||
return 0;
|
||||
}
|
||||
/* set up new Tx power info for each and every channel, 2.4 and 5.x */
|
||||
for (i = 0; i < priv->channel_count; i++) {
|
||||
ch_info = &priv->channel_info[i];
|
||||
@@ -1925,7 +1993,7 @@ static int iwl3945_commit_rxon(struct iwl_priv *priv)
|
||||
"configuration (%d).\n", rc);
|
||||
return rc;
|
||||
}
|
||||
iwl_clear_ucode_stations(priv, false);
|
||||
iwl_clear_ucode_stations(priv);
|
||||
iwl_restore_stations(priv);
|
||||
}
|
||||
|
||||
@@ -1958,7 +2026,7 @@ static int iwl3945_commit_rxon(struct iwl_priv *priv)
|
||||
memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
|
||||
|
||||
if (!new_assoc) {
|
||||
iwl_clear_ucode_stations(priv, false);
|
||||
iwl_clear_ucode_stations(priv);
|
||||
iwl_restore_stations(priv);
|
||||
}
|
||||
|
||||
@@ -2391,6 +2459,30 @@ static u16 iwl3945_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
|
||||
return (u16)sizeof(struct iwl3945_addsta_cmd);
|
||||
}
|
||||
|
||||
static int iwl3945_manage_ibss_station(struct iwl_priv *priv,
|
||||
struct ieee80211_vif *vif, bool add)
|
||||
{
|
||||
struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
|
||||
int ret;
|
||||
|
||||
if (add) {
|
||||
ret = iwl_add_bssid_station(priv, vif->bss_conf.bssid, false,
|
||||
&vif_priv->ibss_bssid_sta_id);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
iwl3945_sync_sta(priv, vif_priv->ibss_bssid_sta_id,
|
||||
(priv->band == IEEE80211_BAND_5GHZ) ?
|
||||
IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
|
||||
CMD_ASYNC);
|
||||
iwl3945_rate_scale_init(priv->hw, vif_priv->ibss_bssid_sta_id);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
return iwl_remove_station(priv, vif_priv->ibss_bssid_sta_id,
|
||||
vif->bss_conf.bssid);
|
||||
}
|
||||
|
||||
/**
|
||||
* iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
|
||||
@@ -2720,51 +2812,12 @@ static int iwl3945_load_bsm(struct iwl_priv *priv)
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define IWL3945_UCODE_GET(item) \
|
||||
static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode,\
|
||||
u32 api_ver) \
|
||||
{ \
|
||||
return le32_to_cpu(ucode->u.v1.item); \
|
||||
}
|
||||
|
||||
static u32 iwl3945_ucode_get_header_size(u32 api_ver)
|
||||
{
|
||||
return UCODE_HEADER_SIZE(1);
|
||||
}
|
||||
static u32 iwl3945_ucode_get_build(const struct iwl_ucode_header *ucode,
|
||||
u32 api_ver)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode,
|
||||
u32 api_ver)
|
||||
{
|
||||
return (u8 *) ucode->u.v1.data;
|
||||
}
|
||||
|
||||
IWL3945_UCODE_GET(inst_size);
|
||||
IWL3945_UCODE_GET(data_size);
|
||||
IWL3945_UCODE_GET(init_size);
|
||||
IWL3945_UCODE_GET(init_data_size);
|
||||
IWL3945_UCODE_GET(boot_size);
|
||||
|
||||
static struct iwl_hcmd_ops iwl3945_hcmd = {
|
||||
.rxon_assoc = iwl3945_send_rxon_assoc,
|
||||
.commit_rxon = iwl3945_commit_rxon,
|
||||
.send_bt_config = iwl_send_bt_config,
|
||||
};
|
||||
|
||||
static struct iwl_ucode_ops iwl3945_ucode = {
|
||||
.get_header_size = iwl3945_ucode_get_header_size,
|
||||
.get_build = iwl3945_ucode_get_build,
|
||||
.get_inst_size = iwl3945_ucode_get_inst_size,
|
||||
.get_data_size = iwl3945_ucode_get_data_size,
|
||||
.get_init_size = iwl3945_ucode_get_init_size,
|
||||
.get_init_data_size = iwl3945_ucode_get_init_data_size,
|
||||
.get_boot_size = iwl3945_ucode_get_boot_size,
|
||||
.get_data = iwl3945_ucode_get_data,
|
||||
};
|
||||
|
||||
static struct iwl_lib_ops iwl3945_lib = {
|
||||
.txq_attach_buf_to_tfd = iwl3945_hw_txq_attach_buf_to_tfd,
|
||||
.txq_free_tfd = iwl3945_hw_txq_free_tfd,
|
||||
@@ -2798,7 +2851,8 @@ static struct iwl_lib_ops iwl3945_lib = {
|
||||
.post_associate = iwl3945_post_associate,
|
||||
.isr = iwl_isr_legacy,
|
||||
.config_ap = iwl3945_config_ap,
|
||||
.add_bcast_station = iwl3945_add_bcast_station,
|
||||
.manage_ibss_station = iwl3945_manage_ibss_station,
|
||||
.check_plcp_health = iwl3945_good_plcp_health,
|
||||
|
||||
.debugfs_ops = {
|
||||
.rx_stats_read = iwl3945_ucode_rx_stats_read,
|
||||
@@ -2815,7 +2869,6 @@ static struct iwl_hcmd_utils_ops iwl3945_hcmd_utils = {
|
||||
};
|
||||
|
||||
static const struct iwl_ops iwl3945_ops = {
|
||||
.ucode = &iwl3945_ucode,
|
||||
.lib = &iwl3945_lib,
|
||||
.hcmd = &iwl3945_hcmd,
|
||||
.utils = &iwl3945_hcmd_utils,
|
||||
@@ -2840,9 +2893,10 @@ static struct iwl_cfg iwl3945_bg_cfg = {
|
||||
.ht_greenfield_support = false,
|
||||
.led_compensation = 64,
|
||||
.broken_powersave = true,
|
||||
.plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
|
||||
.plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
|
||||
.monitor_recover_period = IWL_MONITORING_PERIOD,
|
||||
.max_event_log_size = 512,
|
||||
.tx_power_by_driver = true,
|
||||
};
|
||||
|
||||
static struct iwl_cfg iwl3945_abg_cfg = {
|
||||
@@ -2860,9 +2914,10 @@ static struct iwl_cfg iwl3945_abg_cfg = {
|
||||
.ht_greenfield_support = false,
|
||||
.led_compensation = 64,
|
||||
.broken_powersave = true,
|
||||
.plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
|
||||
.plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
|
||||
.monitor_recover_period = IWL_MONITORING_PERIOD,
|
||||
.max_event_log_size = 512,
|
||||
.tx_power_by_driver = true,
|
||||
};
|
||||
|
||||
DEFINE_PCI_DEVICE_TABLE(iwl3945_hw_card_ids) = {
|
||||
|
||||
@@ -106,7 +106,12 @@ struct iwl3945_rs_sta {
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* The common struct MUST be first because it is shared between
|
||||
* 3945 and agn!
|
||||
*/
|
||||
struct iwl3945_sta_priv {
|
||||
struct iwl_station_priv_common common;
|
||||
struct iwl3945_rs_sta rs_sta;
|
||||
};
|
||||
|
||||
@@ -211,13 +216,6 @@ extern int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
|
||||
char **buf, bool display);
|
||||
extern void iwl3945_dump_nic_error_log(struct iwl_priv *priv);
|
||||
|
||||
/*
|
||||
* Currently used by iwl-3945-rs... look at restructuring so that it doesn't
|
||||
* call this... todo... fix that.
|
||||
*/
|
||||
extern u8 iwl3945_sync_station(struct iwl_priv *priv, int sta_id,
|
||||
u16 tx_rate, u8 flags);
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Functions implemented in iwl-[34]*.c which are forward declared here
|
||||
@@ -268,8 +266,10 @@ void iwl3945_reply_statistics(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb);
|
||||
extern void iwl3945_disable_events(struct iwl_priv *priv);
|
||||
extern int iwl4965_get_temperature(const struct iwl_priv *priv);
|
||||
extern void iwl3945_post_associate(struct iwl_priv *priv);
|
||||
extern void iwl3945_config_ap(struct iwl_priv *priv);
|
||||
extern void iwl3945_post_associate(struct iwl_priv *priv,
|
||||
struct ieee80211_vif *vif);
|
||||
extern void iwl3945_config_ap(struct iwl_priv *priv,
|
||||
struct ieee80211_vif *vif);
|
||||
|
||||
/**
|
||||
* iwl3945_hw_find_station - Find station id for a given BSSID
|
||||
@@ -288,8 +288,6 @@ extern __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv);
|
||||
extern int iwl3945_init_hw_rate_table(struct iwl_priv *priv);
|
||||
extern void iwl3945_reg_txpower_periodic(struct iwl_priv *priv);
|
||||
extern int iwl3945_txpower_set_from_eeprom(struct iwl_priv *priv);
|
||||
extern u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id,
|
||||
u16 tx_rate, u8 flags);
|
||||
|
||||
extern const struct iwl_channel_info *iwl3945_get_channel_info(
|
||||
const struct iwl_priv *priv, enum ieee80211_band band, u16 channel);
|
||||
@@ -297,7 +295,7 @@ extern const struct iwl_channel_info *iwl3945_get_channel_info(
|
||||
extern int iwl3945_rs_next_rate(struct iwl_priv *priv, int rate);
|
||||
|
||||
/* scanning */
|
||||
void iwl3945_request_scan(struct iwl_priv *priv);
|
||||
void iwl3945_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif);
|
||||
|
||||
/* Requires full declaration of iwl_priv before including */
|
||||
#include "iwl-io.h"
|
||||
|
||||
@@ -1953,6 +1953,60 @@ static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static u8 iwl_find_station(struct iwl_priv *priv, const u8 *addr)
|
||||
{
|
||||
int i;
|
||||
int start = 0;
|
||||
int ret = IWL_INVALID_STATION;
|
||||
unsigned long flags;
|
||||
|
||||
if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) ||
|
||||
(priv->iw_mode == NL80211_IFTYPE_AP))
|
||||
start = IWL_STA_ID;
|
||||
|
||||
if (is_broadcast_ether_addr(addr))
|
||||
return priv->hw_params.bcast_sta_id;
|
||||
|
||||
spin_lock_irqsave(&priv->sta_lock, flags);
|
||||
for (i = start; i < priv->hw_params.max_stations; i++)
|
||||
if (priv->stations[i].used &&
|
||||
(!compare_ether_addr(priv->stations[i].sta.sta.addr,
|
||||
addr))) {
|
||||
ret = i;
|
||||
goto out;
|
||||
}
|
||||
|
||||
IWL_DEBUG_ASSOC_LIMIT(priv, "can not find STA %pM total %d\n",
|
||||
addr, priv->num_stations);
|
||||
|
||||
out:
|
||||
/*
|
||||
* It may be possible that more commands interacting with stations
|
||||
* arrive before we completed processing the adding of
|
||||
* station
|
||||
*/
|
||||
if (ret != IWL_INVALID_STATION &&
|
||||
(!(priv->stations[ret].used & IWL_STA_UCODE_ACTIVE) ||
|
||||
((priv->stations[ret].used & IWL_STA_UCODE_ACTIVE) &&
|
||||
(priv->stations[ret].used & IWL_STA_UCODE_INPROGRESS)))) {
|
||||
IWL_ERR(priv, "Requested station info for sta %d before ready.\n",
|
||||
ret);
|
||||
ret = IWL_INVALID_STATION;
|
||||
}
|
||||
spin_unlock_irqrestore(&priv->sta_lock, flags);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int iwl_get_ra_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
|
||||
{
|
||||
if (priv->iw_mode == NL80211_IFTYPE_STATION) {
|
||||
return IWL_AP_ID;
|
||||
} else {
|
||||
u8 *da = ieee80211_get_DA(hdr);
|
||||
return iwl_find_station(priv, da);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
|
||||
*/
|
||||
@@ -2112,34 +2166,6 @@ static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
|
||||
cancel_work_sync(&priv->txpower_work);
|
||||
}
|
||||
|
||||
#define IWL4965_UCODE_GET(item) \
|
||||
static u32 iwl4965_ucode_get_##item(const struct iwl_ucode_header *ucode,\
|
||||
u32 api_ver) \
|
||||
{ \
|
||||
return le32_to_cpu(ucode->u.v1.item); \
|
||||
}
|
||||
|
||||
static u32 iwl4965_ucode_get_header_size(u32 api_ver)
|
||||
{
|
||||
return UCODE_HEADER_SIZE(1);
|
||||
}
|
||||
static u32 iwl4965_ucode_get_build(const struct iwl_ucode_header *ucode,
|
||||
u32 api_ver)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static u8 *iwl4965_ucode_get_data(const struct iwl_ucode_header *ucode,
|
||||
u32 api_ver)
|
||||
{
|
||||
return (u8 *) ucode->u.v1.data;
|
||||
}
|
||||
|
||||
IWL4965_UCODE_GET(inst_size);
|
||||
IWL4965_UCODE_GET(data_size);
|
||||
IWL4965_UCODE_GET(init_size);
|
||||
IWL4965_UCODE_GET(init_data_size);
|
||||
IWL4965_UCODE_GET(boot_size);
|
||||
|
||||
static struct iwl_hcmd_ops iwl4965_hcmd = {
|
||||
.rxon_assoc = iwl4965_send_rxon_assoc,
|
||||
.commit_rxon = iwl_commit_rxon,
|
||||
@@ -2147,16 +2173,6 @@ static struct iwl_hcmd_ops iwl4965_hcmd = {
|
||||
.send_bt_config = iwl_send_bt_config,
|
||||
};
|
||||
|
||||
static struct iwl_ucode_ops iwl4965_ucode = {
|
||||
.get_header_size = iwl4965_ucode_get_header_size,
|
||||
.get_build = iwl4965_ucode_get_build,
|
||||
.get_inst_size = iwl4965_ucode_get_inst_size,
|
||||
.get_data_size = iwl4965_ucode_get_data_size,
|
||||
.get_init_size = iwl4965_ucode_get_init_size,
|
||||
.get_init_data_size = iwl4965_ucode_get_init_data_size,
|
||||
.get_boot_size = iwl4965_ucode_get_boot_size,
|
||||
.get_data = iwl4965_ucode_get_data,
|
||||
};
|
||||
static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
|
||||
.get_hcmd_size = iwl4965_get_hcmd_size,
|
||||
.build_addsta_hcmd = iwl4965_build_addsta_hcmd,
|
||||
@@ -2218,7 +2234,7 @@ static struct iwl_lib_ops iwl4965_lib = {
|
||||
.temperature = iwl4965_temperature_calib,
|
||||
.set_ct_kill = iwl4965_set_ct_threshold,
|
||||
},
|
||||
.add_bcast_station = iwl_add_bcast_station,
|
||||
.manage_ibss_station = iwlagn_manage_ibss_station,
|
||||
.debugfs_ops = {
|
||||
.rx_stats_read = iwl_ucode_rx_stats_read,
|
||||
.tx_stats_read = iwl_ucode_tx_stats_read,
|
||||
@@ -2228,7 +2244,6 @@ static struct iwl_lib_ops iwl4965_lib = {
|
||||
};
|
||||
|
||||
static const struct iwl_ops iwl4965_ops = {
|
||||
.ucode = &iwl4965_ucode,
|
||||
.lib = &iwl4965_lib,
|
||||
.hcmd = &iwl4965_hcmd,
|
||||
.utils = &iwl4965_hcmd_utils,
|
||||
@@ -2262,7 +2277,10 @@ struct iwl_cfg iwl4965_agn_cfg = {
|
||||
.monitor_recover_period = IWL_MONITORING_PERIOD,
|
||||
.temperature_kelvin = true,
|
||||
.max_event_log_size = 512,
|
||||
|
||||
.tx_power_by_driver = true,
|
||||
.ucode_tracing = true,
|
||||
.sensitivity_calib_by_driver = true,
|
||||
.chain_noise_calib_by_driver = true,
|
||||
/*
|
||||
* Force use of chains B and C for scan RX on 5 GHz band
|
||||
* because the device has off-channel reception on chain A.
|
||||
|
||||
@@ -351,7 +351,7 @@ static struct iwl_lib_ops iwl5000_lib = {
|
||||
.temperature = iwlagn_temperature,
|
||||
.set_ct_kill = iwl5000_set_ct_threshold,
|
||||
},
|
||||
.add_bcast_station = iwl_add_bcast_station,
|
||||
.manage_ibss_station = iwlagn_manage_ibss_station,
|
||||
.debugfs_ops = {
|
||||
.rx_stats_read = iwl_ucode_rx_stats_read,
|
||||
.tx_stats_read = iwl_ucode_tx_stats_read,
|
||||
@@ -413,7 +413,7 @@ static struct iwl_lib_ops iwl5150_lib = {
|
||||
.temperature = iwl5150_temperature,
|
||||
.set_ct_kill = iwl5150_set_ct_threshold,
|
||||
},
|
||||
.add_bcast_station = iwl_add_bcast_station,
|
||||
.manage_ibss_station = iwlagn_manage_ibss_station,
|
||||
.debugfs_ops = {
|
||||
.rx_stats_read = iwl_ucode_rx_stats_read,
|
||||
.tx_stats_read = iwl_ucode_tx_stats_read,
|
||||
@@ -425,7 +425,6 @@ static struct iwl_lib_ops iwl5150_lib = {
|
||||
};
|
||||
|
||||
static const struct iwl_ops iwl5000_ops = {
|
||||
.ucode = &iwlagn_ucode,
|
||||
.lib = &iwl5000_lib,
|
||||
.hcmd = &iwlagn_hcmd,
|
||||
.utils = &iwlagn_hcmd_utils,
|
||||
@@ -433,7 +432,6 @@ static const struct iwl_ops iwl5000_ops = {
|
||||
};
|
||||
|
||||
static const struct iwl_ops iwl5150_ops = {
|
||||
.ucode = &iwlagn_ucode,
|
||||
.lib = &iwl5150_lib,
|
||||
.hcmd = &iwlagn_hcmd,
|
||||
.utils = &iwlagn_hcmd_utils,
|
||||
@@ -466,6 +464,9 @@ struct iwl_cfg iwl5300_agn_cfg = {
|
||||
.chain_noise_scale = 1000,
|
||||
.monitor_recover_period = IWL_MONITORING_PERIOD,
|
||||
.max_event_log_size = 512,
|
||||
.ucode_tracing = true,
|
||||
.sensitivity_calib_by_driver = true,
|
||||
.chain_noise_calib_by_driver = true,
|
||||
};
|
||||
|
||||
struct iwl_cfg iwl5100_bgn_cfg = {
|
||||
@@ -494,6 +495,9 @@ struct iwl_cfg iwl5100_bgn_cfg = {
|
||||
.chain_noise_scale = 1000,
|
||||
.monitor_recover_period = IWL_MONITORING_PERIOD,
|
||||
.max_event_log_size = 512,
|
||||
.ucode_tracing = true,
|
||||
.sensitivity_calib_by_driver = true,
|
||||
.chain_noise_calib_by_driver = true,
|
||||
};
|
||||
|
||||
struct iwl_cfg iwl5100_abg_cfg = {
|
||||
@@ -520,6 +524,9 @@ struct iwl_cfg iwl5100_abg_cfg = {
|
||||
.chain_noise_scale = 1000,
|
||||
.monitor_recover_period = IWL_MONITORING_PERIOD,
|
||||
.max_event_log_size = 512,
|
||||
.ucode_tracing = true,
|
||||
.sensitivity_calib_by_driver = true,
|
||||
.chain_noise_calib_by_driver = true,
|
||||
};
|
||||
|
||||
struct iwl_cfg iwl5100_agn_cfg = {
|
||||
@@ -548,6 +555,9 @@ struct iwl_cfg iwl5100_agn_cfg = {
|
||||
.chain_noise_scale = 1000,
|
||||
.monitor_recover_period = IWL_MONITORING_PERIOD,
|
||||
.max_event_log_size = 512,
|
||||
.ucode_tracing = true,
|
||||
.sensitivity_calib_by_driver = true,
|
||||
.chain_noise_calib_by_driver = true,
|
||||
};
|
||||
|
||||
struct iwl_cfg iwl5350_agn_cfg = {
|
||||
@@ -576,6 +586,9 @@ struct iwl_cfg iwl5350_agn_cfg = {
|
||||
.chain_noise_scale = 1000,
|
||||
.monitor_recover_period = IWL_MONITORING_PERIOD,
|
||||
.max_event_log_size = 512,
|
||||
.ucode_tracing = true,
|
||||
.sensitivity_calib_by_driver = true,
|
||||
.chain_noise_calib_by_driver = true,
|
||||
};
|
||||
|
||||
struct iwl_cfg iwl5150_agn_cfg = {
|
||||
@@ -604,6 +617,9 @@ struct iwl_cfg iwl5150_agn_cfg = {
|
||||
.chain_noise_scale = 1000,
|
||||
.monitor_recover_period = IWL_MONITORING_PERIOD,
|
||||
.max_event_log_size = 512,
|
||||
.ucode_tracing = true,
|
||||
.sensitivity_calib_by_driver = true,
|
||||
.chain_noise_calib_by_driver = true,
|
||||
};
|
||||
|
||||
struct iwl_cfg iwl5150_abg_cfg = {
|
||||
@@ -630,6 +646,9 @@ struct iwl_cfg iwl5150_abg_cfg = {
|
||||
.chain_noise_scale = 1000,
|
||||
.monitor_recover_period = IWL_MONITORING_PERIOD,
|
||||
.max_event_log_size = 512,
|
||||
.ucode_tracing = true,
|
||||
.sensitivity_calib_by_driver = true,
|
||||
.chain_noise_calib_by_driver = true,
|
||||
};
|
||||
|
||||
MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX));
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user