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https://github.com/ukui/kernel.git
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Merge tag 'iwlwifi-next-for-kalle-2019-02-04' of git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi-next
Third batch of iwlwifi patches intended for v5.1 * Work on the new debugging infrastructure continues; * HE radiotap; * Support for new FW version 44; * A couple of new FW API changes; * A bunch of fixes for static analyzer reported issues; * General bugfixes; * Other cleanups and small fixes;
This commit is contained in:
@@ -56,7 +56,7 @@
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#include "iwl-config.h"
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/* Highest firmware API version supported */
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#define IWL_22000_UCODE_API_MAX 43
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#define IWL_22000_UCODE_API_MAX 44
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/* Lowest firmware API version supported */
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#define IWL_22000_UCODE_API_MIN 39
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@@ -220,6 +220,7 @@ const struct iwl_cfg iwl22260_2ax_cfg = {
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* HT size; mac80211 would otherwise pick the HE max (256) by default.
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*/
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.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
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.bisr_workaround = 1,
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};
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const struct iwl_cfg killer1650x_2ax_cfg = {
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@@ -232,6 +233,7 @@ const struct iwl_cfg killer1650x_2ax_cfg = {
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* HT size; mac80211 would otherwise pick the HE max (256) by default.
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*/
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.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
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.bisr_workaround = 1,
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};
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const struct iwl_cfg killer1650w_2ax_cfg = {
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@@ -244,6 +246,7 @@ const struct iwl_cfg killer1650w_2ax_cfg = {
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* HT size; mac80211 would otherwise pick the HE max (256) by default.
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*/
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.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
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.bisr_workaround = 1,
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};
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/*
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@@ -57,7 +57,7 @@
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#include "fw/file.h"
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/* Highest firmware API version supported */
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#define IWL9000_UCODE_API_MAX 43
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#define IWL9000_UCODE_API_MAX 44
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/* Lowest firmware API version supported */
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#define IWL9000_UCODE_API_MIN 30
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@@ -3,6 +3,7 @@
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
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* Copyright (C) 2018 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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@@ -2238,7 +2239,7 @@ static ssize_t iwl_dbgfs_log_event_write(struct file *file,
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buf_size = min(count, sizeof(buf) - 1);
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if (copy_from_user(buf, user_buf, buf_size))
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return -EFAULT;
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if (sscanf(buf, "%d", &event_log_flag) != 1)
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if (sscanf(buf, "%u", &event_log_flag) != 1)
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return -EFAULT;
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if (event_log_flag == 1)
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iwl_dump_nic_event_log(priv, true, NULL);
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@@ -2,6 +2,7 @@
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*
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* Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2015 Intel Deutschland GmbH
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* Copyright(c) 2018 Intel Corporation
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*
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* Portions of this file are derived from the ipw3945 project, as well
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* as portionhelp of the ieee80211 subsystem header files.
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@@ -592,7 +593,7 @@ static int iwlagn_set_decrypted_flag(struct iwl_priv *priv,
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if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
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RX_RES_STATUS_BAD_KEY_TTAK)
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break;
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/* fall through */
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case RX_RES_STATUS_SEC_TYPE_WEP:
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if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
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RX_RES_STATUS_BAD_ICV_MIC) {
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@@ -601,6 +602,7 @@ static int iwlagn_set_decrypted_flag(struct iwl_priv *priv,
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IWL_DEBUG_RX(priv, "Packet destroyed\n");
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return -1;
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}
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/* fall through */
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case RX_RES_STATUS_SEC_TYPE_CCMP:
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if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
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RX_RES_STATUS_DECRYPT_OK) {
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@@ -729,7 +731,7 @@ static u32 iwlagn_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
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decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
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break;
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}
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/* fall through if TTAK OK */
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/* fall through */
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default:
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if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
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decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
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@@ -3,6 +3,7 @@
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2018 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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@@ -418,7 +419,7 @@ static u16 iwl_limit_dwell(struct iwl_priv *priv, u16 dwell_time)
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limit = (limits[1] * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
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limit /= 2;
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dwell_time = min(limit, dwell_time);
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/* fall through to limit further */
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/* fall through */
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case 1:
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limit = (limits[0] * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
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limit /= n_active;
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@@ -70,7 +70,7 @@ struct iwl_fw_ini_header {
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__le32 tlv_version;
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__le32 apply_point;
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u8 data[];
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} __packed; /* FW_INI_HEADER_TLV_S */
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} __packed; /* FW_DEBUG_TLV_HEADER_S */
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/**
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* struct iwl_fw_ini_allocation_tlv - (IWL_FW_INI_TLV_TYPE_BUFFER_ALLOCATION)
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@@ -92,7 +92,7 @@ struct iwl_fw_ini_allocation_tlv {
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__le32 size;
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__le32 max_fragments;
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__le32 min_frag_size;
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} __packed; /* FW_INI_BUFFER_ALLOCATION_TLV_S_VER_1 */
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} __packed; /* FW_DEBUG_TLV_BUFFER_ALLOCATION_TLV_S_VER_1 */
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/**
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* struct iwl_fw_ini_hcmd (IWL_FW_INI_TLV_TYPE_HCMD)
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@@ -108,7 +108,7 @@ struct iwl_fw_ini_hcmd {
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u8 group;
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__le16 padding;
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u8 data[0];
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} __packed; /* FW_INI_HCMD_S */
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} __packed; /* FW_DEBUG_TLV_HCMD_DATA_S */
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/**
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* struct iwl_fw_ini_hcmd_tlv
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@@ -118,7 +118,7 @@ struct iwl_fw_ini_hcmd {
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struct iwl_fw_ini_hcmd_tlv {
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struct iwl_fw_ini_header header;
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struct iwl_fw_ini_hcmd hcmd;
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} __packed; /* FW_INI_HCMD_TLV_S_VER_1 */
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} __packed; /* FW_DEBUG_TLV_HCMD_S_VER_1 */
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/*
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* struct iwl_fw_ini_debug_flow_tlv (IWL_FW_INI_TLV_TYPE_DEBUG_FLOW)
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@@ -129,20 +129,49 @@ struct iwl_fw_ini_hcmd_tlv {
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struct iwl_fw_ini_debug_flow_tlv {
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struct iwl_fw_ini_header header;
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__le32 debug_flow_cfg;
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} __packed; /* FW_INI_DEBUG_FLOW_TLV_S_VER_1 */
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} __packed; /* FW_DEBUG_TLV_FLOW_TLV_S_VER_1 */
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#define IWL_FW_INI_MAX_REGION_ID 20
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#define IWL_FW_INI_MAX_REGION_ID 64
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#define IWL_FW_INI_MAX_NAME 32
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/**
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* struct iwl_fw_ini_region_cfg_internal - meta data of internal memory region
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* @num_of_range: the amount of ranges in the region
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* @range_data_size: size of the data to read per range, in bytes.
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*/
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struct iwl_fw_ini_region_cfg_internal {
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__le32 num_of_ranges;
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__le32 range_data_size;
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} __packed; /* FW_DEBUG_TLV_REGION_NIC_INTERNAL_RANGES_S */
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/**
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* struct iwl_fw_ini_region_cfg_fifos - meta data of fifos region
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* @lmac1_id: bit map of lmac1 fifos to include in the region.
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* @lmac2_id: bit map of lmac2 fifos to include in the region.
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* @num_of_registers: number of prph registers in the region, each register is
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* 4 bytes size.
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* @header_only: none zero value indicates that this region does not include
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* fifo data and includes only the given registers.
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*/
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struct iwl_fw_ini_region_cfg_fifos {
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__le32 lmac1_id;
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__le32 lmac2_id;
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__le32 num_of_registers;
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__le32 header_only;
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} __packed; /* FW_DEBUG_TLV_REGION_FIFOS_S */
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/**
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* struct iwl_fw_ini_region_cfg
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* @region_id: ID of this dump configuration
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* @region_type: &enum iwl_fw_ini_region_type
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* @num_regions: amount of regions in the address array.
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* @allocation_id: For DRAM type field substitutes for allocation_id.
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* @name_len: name length
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* @name: file name to use for this region
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* @size: size of the data, in bytes.(unused for IWL_FW_INI_REGION_DRAM_BUFFER)
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* @start_addr: array of addresses. (unused for IWL_FW_INI_REGION_DRAM_BUFFER)
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* @internal: used in case the region uses internal memory.
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* @allocation_id: For DRAM type field substitutes for allocation_id
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* @fifos: used in case of fifos region.
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* @offset: offset to use for each memory base address
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* @start_addr: array of addresses.
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*/
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struct iwl_fw_ini_region_cfg {
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__le32 region_id;
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@@ -150,31 +179,32 @@ struct iwl_fw_ini_region_cfg {
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__le32 name_len;
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u8 name[IWL_FW_INI_MAX_NAME];
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union {
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__le32 num_regions;
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struct iwl_fw_ini_region_cfg_internal internal;
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__le32 allocation_id;
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struct iwl_fw_ini_region_cfg_fifos fifos;
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};
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__le32 size;
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__le32 offset;
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__le32 start_addr[];
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} __packed; /* FW_INI_REGION_CONFIG_S */
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} __packed; /* FW_DEBUG_TLV_REGION_CONFIG_S */
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/**
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* struct iwl_fw_ini_region_tlv - (IWL_FW_INI_TLV_TYPE_REGION_CFG)
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* DUMP sections define IDs and triggers that use those IDs TLV
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* @header: header
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* @num_regions: how many different region section and IDs are coming next
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* @iwl_fw_ini_dump dump_config: list of dump configurations
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* @region_config: list of dump configurations
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*/
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struct iwl_fw_ini_region_tlv {
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struct iwl_fw_ini_header header;
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__le32 num_regions;
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struct iwl_fw_ini_region_cfg region_config[];
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} __packed; /* FW_INI_REGION_CFG_S */
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} __packed; /* FW_DEBUG_TLV_REGIONS_S_VER_1 */
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/**
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* struct iwl_fw_ini_trigger - (IWL_FW_INI_TLV_TYPE_DUMP_CFG)
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* Region sections define IDs and triggers that use those IDs TLV
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*
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* @trigger_id: enum &iwl_fw_ini_tigger_id
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* @trigger_id: enum &iwl_fw_ini_trigger_id
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* @ignore_default: override FW TLV with binary TLV
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* @dump_delay: delay from trigger fire to dump, in usec
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* @occurrences: max amount of times to be fired
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@@ -196,7 +226,7 @@ struct iwl_fw_ini_trigger {
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__le32 trigger_data;
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__le32 num_regions;
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__le32 data[];
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} __packed; /* FW_INI_TRIGGER_CONFIG_S */
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} __packed; /* FW_TLV_DEBUG_TRIGGER_CONFIG_S */
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/**
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* struct iwl_fw_ini_trigger_tlv - (IWL_FW_INI_TLV_TYPE_TRIGGERS_CFG)
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@@ -210,20 +240,17 @@ struct iwl_fw_ini_trigger_tlv {
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struct iwl_fw_ini_header header;
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__le32 num_triggers;
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struct iwl_fw_ini_trigger trigger_config[];
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} __packed; /* FW_INI_TRIGGER_CFG_S */
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} __packed; /* FW_TLV_DEBUG_TRIGGERS_S_VER_1 */
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/**
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* enum iwl_fw_ini_trigger_id
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* @IWL_FW_TRIGGER_ID_FW_ASSERT: FW assert
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* @IWL_FW_TRIGGER_ID_FW_TFD_Q_HANG: TFD queue hang
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* @IWL_FW_TRIGGER_ID_FW_HW_ERROR: HW assert
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* @IWL_FW_TRIGGER_ID_FW_TRIGGER_ERROR: FW error notification
|
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* @IWL_FW_TRIGGER_ID_FW_TRIGGER_WARNING: FW warning notification
|
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* @IWL_FW_TRIGGER_ID_FW_TRIGGER_INFO: FW info notification
|
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* @IWL_FW_TRIGGER_ID_FW_TRIGGER_DEBUG: FW debug notification
|
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* @IWL_FW_TRIGGER_ID_FW_TFD_Q_HANG: TFD queue hang
|
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* @IWL_FW_TRIGGER_ID_FW_DEBUG_HOST_TRIGGER: FW debug notification
|
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* @IWL_FW_TRIGGER_ID_FW_GENERIC_NOTIFOCATION: FW generic notification
|
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* @IWL_FW_TRIGGER_ID_USER_TRIGGER: User trigger
|
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* @IWL_FW_TRIGGER_ID_HOST_PEER_CLIENT_INACTIVITY: peer inactivity
|
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* @FW_DEBUG_TLV_TRIGGER_ID_HOST_DID_INITIATED_EVENT: undefined
|
||||
* @IWL_FW_TRIGGER_ID_HOST_TX_LATENCY_THRESHOLD_CROSSED: TX latency
|
||||
* threshold was crossed
|
||||
* @IWL_FW_TRIGGER_ID_HOST_TX_RESPONSE_STATUS_FAILED: TX failed
|
||||
@@ -257,50 +284,53 @@ struct iwl_fw_ini_trigger_tlv {
|
||||
* @IWL_FW_TRIGGER_ID_NUM: number of trigger IDs
|
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*/
|
||||
enum iwl_fw_ini_trigger_id {
|
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IWL_FW_TRIGGER_ID_INVALID = 0,
|
||||
|
||||
/* Errors triggers */
|
||||
IWL_FW_TRIGGER_ID_FW_ASSERT = 1,
|
||||
IWL_FW_TRIGGER_ID_FW_TFD_Q_HANG = 2,
|
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IWL_FW_TRIGGER_ID_FW_HW_ERROR = 3,
|
||||
/* Generic triggers */
|
||||
IWL_FW_TRIGGER_ID_FW_TRIGGER_ERROR = 4,
|
||||
IWL_FW_TRIGGER_ID_FW_TRIGGER_WARNING = 5,
|
||||
IWL_FW_TRIGGER_ID_FW_TRIGGER_INFO = 6,
|
||||
IWL_FW_TRIGGER_ID_FW_TRIGGER_DEBUG = 7,
|
||||
/* User Trigger */
|
||||
IWL_FW_TRIGGER_ID_USER_TRIGGER = 8,
|
||||
IWL_FW_TRIGGER_ID_FW_HW_ERROR = 2,
|
||||
IWL_FW_TRIGGER_ID_FW_TFD_Q_HANG = 3,
|
||||
|
||||
/* FW triggers */
|
||||
IWL_FW_TRIGGER_ID_FW_DEBUG_HOST_TRIGGER = 4,
|
||||
IWL_FW_TRIGGER_ID_FW_GENERIC_NOTIFOCATION = 5,
|
||||
|
||||
/* User trigger */
|
||||
IWL_FW_TRIGGER_ID_USER_TRIGGER = 6,
|
||||
|
||||
/* Host triggers */
|
||||
IWL_FW_TRIGGER_ID_HOST_PEER_CLIENT_INACTIVITY = 9,
|
||||
IWL_FW_TRIGGER_ID_HOST_DID_INITIATED_EVENT = 10,
|
||||
IWL_FW_TRIGGER_ID_HOST_TX_LATENCY_THRESHOLD_CROSSED = 11,
|
||||
IWL_FW_TRIGGER_ID_HOST_TX_RESPONSE_STATUS_FAILED = 12,
|
||||
IWL_FW_TRIGGER_ID_HOST_OS_REQ_DEAUTH_PEER = 13,
|
||||
IWL_FW_TRIGGER_ID_HOST_STOP_GO_REQUEST = 14,
|
||||
IWL_FW_TRIGGER_ID_HOST_START_GO_REQUEST = 15,
|
||||
IWL_FW_TRIGGER_ID_HOST_JOIN_GROUP_REQUEST = 16,
|
||||
IWL_FW_TRIGGER_ID_HOST_SCAN_START = 17,
|
||||
IWL_FW_TRIGGER_ID_HOST_SCAN_SUBITTED = 18,
|
||||
IWL_FW_TRIGGER_ID_HOST_SCAN_PARAMS = 19,
|
||||
IWL_FW_TRIGGER_ID_HOST_CHECK_FOR_HANG = 20,
|
||||
IWL_FW_TRIGGER_ID_HOST_BAR_RECEIVED = 21,
|
||||
IWL_FW_TRIGGER_ID_HOST_AGG_TX_RESPONSE_STATUS_FAILED = 22,
|
||||
IWL_FW_TRIGGER_ID_HOST_EAPOL_TX_RESPONSE_FAILED = 23,
|
||||
IWL_FW_TRIGGER_ID_HOST_FAKE_TX_RESPONSE_SUSPECTED = 24,
|
||||
IWL_FW_TRIGGER_ID_HOST_AUTH_REQ_FROM_ASSOC_CLIENT = 25,
|
||||
IWL_FW_TRIGGER_ID_HOST_ROAM_COMPLETE = 26,
|
||||
IWL_FW_TRIGGER_ID_HOST_AUTH_ASSOC_FAST_FAILED = 27,
|
||||
IWL_FW_TRIGGER_ID_HOST_D3_START = 28,
|
||||
IWL_FW_TRIGGER_ID_HOST_D3_END = 29,
|
||||
IWL_FW_TRIGGER_ID_HOST_BSS_MISSED_BEACONS = 30,
|
||||
IWL_FW_TRIGGER_ID_HOST_P2P_CLIENT_MISSED_BEACONS = 31,
|
||||
IWL_FW_TRIGGER_ID_HOST_PEER_CLIENT_TX_FAILURES = 32,
|
||||
IWL_FW_TRIGGER_ID_HOST_TX_WFD_ACTION_FRAME_FAILED = 33,
|
||||
IWL_FW_TRIGGER_ID_HOST_AUTH_ASSOC_FAILED = 34,
|
||||
IWL_FW_TRIGGER_ID_HOST_SCAN_COMPLETE = 35,
|
||||
IWL_FW_TRIGGER_ID_HOST_SCAN_ABORT = 36,
|
||||
IWL_FW_TRIGGER_ID_HOST_NIC_ALIVE = 37,
|
||||
IWL_FW_TRIGGER_ID_HOST_CHANNEL_SWITCH_COMPLETE = 38,
|
||||
IWL_FW_TRIGGER_ID_HOST_PEER_CLIENT_INACTIVITY = 7,
|
||||
IWL_FW_TRIGGER_ID_HOST_TX_LATENCY_THRESHOLD_CROSSED = 8,
|
||||
IWL_FW_TRIGGER_ID_HOST_TX_RESPONSE_STATUS_FAILED = 9,
|
||||
IWL_FW_TRIGGER_ID_HOST_OS_REQ_DEAUTH_PEER = 10,
|
||||
IWL_FW_TRIGGER_ID_HOST_STOP_GO_REQUEST = 11,
|
||||
IWL_FW_TRIGGER_ID_HOST_START_GO_REQUEST = 12,
|
||||
IWL_FW_TRIGGER_ID_HOST_JOIN_GROUP_REQUEST = 13,
|
||||
IWL_FW_TRIGGER_ID_HOST_SCAN_START = 14,
|
||||
IWL_FW_TRIGGER_ID_HOST_SCAN_SUBMITTED = 15,
|
||||
IWL_FW_TRIGGER_ID_HOST_SCAN_PARAMS = 16,
|
||||
IWL_FW_TRIGGER_ID_HOST_CHECK_FOR_HANG = 17,
|
||||
IWL_FW_TRIGGER_ID_HOST_BAR_RECEIVED = 18,
|
||||
IWL_FW_TRIGGER_ID_HOST_AGG_TX_RESPONSE_STATUS_FAILED = 19,
|
||||
IWL_FW_TRIGGER_ID_HOST_EAPOL_TX_RESPONSE_FAILED = 20,
|
||||
IWL_FW_TRIGGER_ID_HOST_FAKE_TX_RESPONSE_SUSPECTED = 21,
|
||||
IWL_FW_TRIGGER_ID_HOST_AUTH_REQ_FROM_ASSOC_CLIENT = 22,
|
||||
IWL_FW_TRIGGER_ID_HOST_ROAM_COMPLETE = 23,
|
||||
IWL_FW_TRIGGER_ID_HOST_AUTH_ASSOC_FAST_FAILED = 24,
|
||||
IWL_FW_TRIGGER_ID_HOST_D3_START = 25,
|
||||
IWL_FW_TRIGGER_ID_HOST_D3_END = 26,
|
||||
IWL_FW_TRIGGER_ID_HOST_BSS_MISSED_BEACONS = 27,
|
||||
IWL_FW_TRIGGER_ID_HOST_P2P_CLIENT_MISSED_BEACONS = 28,
|
||||
IWL_FW_TRIGGER_ID_HOST_PEER_CLIENT_TX_FAILURES = 29,
|
||||
IWL_FW_TRIGGER_ID_HOST_TX_WFD_ACTION_FRAME_FAILED = 30,
|
||||
IWL_FW_TRIGGER_ID_HOST_AUTH_ASSOC_FAILED = 31,
|
||||
IWL_FW_TRIGGER_ID_HOST_SCAN_COMPLETE = 32,
|
||||
IWL_FW_TRIGGER_ID_HOST_SCAN_ABORT = 33,
|
||||
IWL_FW_TRIGGER_ID_HOST_NIC_ALIVE = 34,
|
||||
IWL_FW_TRIGGER_ID_HOST_CHANNEL_SWITCH_COMPLETE = 35,
|
||||
|
||||
IWL_FW_TRIGGER_ID_NUM,
|
||||
}; /* FW_INI_TRIGGER_ID_E_VER_1 */
|
||||
}; /* FW_DEBUG_TLV_TRIGGER_ID_E_VER_1 */
|
||||
|
||||
/**
|
||||
* enum iwl_fw_ini_apply_point
|
||||
@@ -320,7 +350,7 @@ enum iwl_fw_ini_apply_point {
|
||||
IWL_FW_INI_APPLY_MISSED_BEACONS,
|
||||
IWL_FW_INI_APPLY_SCAN_COMPLETE,
|
||||
IWL_FW_INI_APPLY_NUM,
|
||||
}; /* FW_INI_APPLY_POINT_E_VER_1 */
|
||||
}; /* FW_DEBUG_TLV_APPLY_POINT_E_VER_1 */
|
||||
|
||||
/**
|
||||
* enum iwl_fw_ini_allocation_id
|
||||
@@ -340,7 +370,7 @@ enum iwl_fw_ini_allocation_id {
|
||||
IWL_FW_INI_ALLOCATION_ID_SDFX,
|
||||
IWL_FW_INI_ALLOCATION_ID_FW_DUMP,
|
||||
IWL_FW_INI_ALLOCATION_ID_USER_DEFINED,
|
||||
}; /* FW_INI_ALLOCATION_ID_E_VER_1 */
|
||||
}; /* FW_DEBUG_TLV_ALLOCATION_ID_E_VER_1 */
|
||||
|
||||
/**
|
||||
* enum iwl_fw_ini_buffer_location
|
||||
@@ -349,10 +379,10 @@ enum iwl_fw_ini_allocation_id {
|
||||
* @IWL_FW_INI_LOCATION_DRAM_PATH: DRAM location
|
||||
*/
|
||||
enum iwl_fw_ini_buffer_location {
|
||||
IWL_FW_INI_LOCATION_SRAM_INVALID,
|
||||
IWL_FW_INI_LOCATION_INVALID,
|
||||
IWL_FW_INI_LOCATION_SRAM_PATH,
|
||||
IWL_FW_INI_LOCATION_DRAM_PATH,
|
||||
}; /* FW_INI_BUFFER_LOCATION_E_VER_1 */
|
||||
}; /* FW_DEBUG_TLV_BUFFER_LOCATION_E_VER_1 */
|
||||
|
||||
/**
|
||||
* enum iwl_fw_ini_debug_flow
|
||||
@@ -364,7 +394,7 @@ enum iwl_fw_ini_debug_flow {
|
||||
IWL_FW_INI_DEBUG_INVALID,
|
||||
IWL_FW_INI_DEBUG_DBTR_FLOW,
|
||||
IWL_FW_INI_DEBUG_TB2DTF_FLOW,
|
||||
}; /* FW_INI_DEBUG_FLOW_E_VER_1 */
|
||||
}; /* FW_DEBUG_TLV_FLOW_E_VER_1 */
|
||||
|
||||
/**
|
||||
* enum iwl_fw_ini_region_type
|
||||
@@ -396,6 +426,6 @@ enum iwl_fw_ini_region_type {
|
||||
IWL_FW_INI_REGION_PAGING,
|
||||
IWL_FW_INI_REGION_CSR,
|
||||
IWL_FW_INI_REGION_NUM
|
||||
}; /* FW_INI_REGION_TYPE_E_VER_1*/
|
||||
}; /* FW_DEBUG_TLV_REGION_TYPE_E_VER_1 */
|
||||
|
||||
#endif
|
||||
|
||||
@@ -73,6 +73,10 @@ enum iwl_mac_conf_subcmd_ids {
|
||||
* @LOW_LATENCY_CMD: &struct iwl_mac_low_latency_cmd
|
||||
*/
|
||||
LOW_LATENCY_CMD = 0x3,
|
||||
/**
|
||||
* @CHANNEL_SWITCH_TIME_EVENT_CMD: &struct iwl_chan_switch_te_cmd
|
||||
*/
|
||||
CHANNEL_SWITCH_TIME_EVENT_CMD = 0x4,
|
||||
/**
|
||||
* @PROBE_RESPONSE_DATA_NOTIF: &struct iwl_probe_resp_data_notif
|
||||
*/
|
||||
@@ -135,6 +139,29 @@ struct iwl_channel_switch_noa_notif {
|
||||
__le32 id_and_color;
|
||||
} __packed; /* CHANNEL_SWITCH_START_NTFY_API_S_VER_1 */
|
||||
|
||||
/**
|
||||
* struct iwl_chan_switch_te_cmd - Channel Switch Time Event command
|
||||
*
|
||||
* @mac_id: MAC ID for channel switch
|
||||
* @action: action to perform, one of FW_CTXT_ACTION_*
|
||||
* @tsf: beacon tsf
|
||||
* @cs_count: channel switch count from CSA/eCSA IE
|
||||
* @cs_delayed_bcn_count: if set to N (!= 0) GO/AP can delay N beacon intervals
|
||||
* at the new channel after the channel switch, otherwise (N == 0) expect
|
||||
* beacon right after the channel switch.
|
||||
* @cs_mode: 1 - quiet, 0 - otherwise
|
||||
* @reserved: reserved for alignment purposes
|
||||
*/
|
||||
struct iwl_chan_switch_te_cmd {
|
||||
__le32 mac_id;
|
||||
__le32 action;
|
||||
__le32 tsf;
|
||||
u8 cs_count;
|
||||
u8 cs_delayed_bcn_count;
|
||||
u8 cs_mode;
|
||||
u8 reserved;
|
||||
} __packed; /* MAC_CHANNEL_SWITCH_TIME_EVENT_S_VER_2 */
|
||||
|
||||
/**
|
||||
* struct iwl_mac_low_latency_cmd - set/clear mac to 'low-latency mode'
|
||||
*
|
||||
|
||||
@@ -470,6 +470,13 @@ struct iwl_geo_tx_power_profiles_resp {
|
||||
* @ba_escape_timer: Fully receive and parse beacon if no beacons were passed
|
||||
* for a longer period of time then this escape-timeout. Units: Beacons.
|
||||
* @ba_enable_beacon_abort: 1, beacon abort is enabled; 0, disabled.
|
||||
* @bf_threshold_absolute_low: See below.
|
||||
* @bf_threshold_absolute_high: Send Beacon to driver if Energy value calculated
|
||||
* for this beacon crossed this absolute threshold. For the 'Increase'
|
||||
* direction the bf_energy_absolute_low[i] is used. For the 'Decrease'
|
||||
* direction the bf_energy_absolute_high[i] is used. Zero value means
|
||||
* that this specific threshold is ignored for beacon filtering, and
|
||||
* beacon will not be forced to be sent to driver due to this setting.
|
||||
*/
|
||||
struct iwl_beacon_filter_cmd {
|
||||
__le32 bf_energy_delta;
|
||||
@@ -483,7 +490,9 @@ struct iwl_beacon_filter_cmd {
|
||||
__le32 bf_escape_timer;
|
||||
__le32 ba_escape_timer;
|
||||
__le32 ba_enable_beacon_abort;
|
||||
} __packed;
|
||||
__le32 bf_threshold_absolute_low[2];
|
||||
__le32 bf_threshold_absolute_high[2];
|
||||
} __packed; /* BEACON_FILTER_CONFIG_API_S_VER_4 */
|
||||
|
||||
/* Beacon filtering and beacon abort */
|
||||
#define IWL_BF_ENERGY_DELTA_DEFAULT 5
|
||||
|
||||
@@ -847,19 +847,33 @@ struct iwl_beacon_notif {
|
||||
} __packed;
|
||||
|
||||
/**
|
||||
* struct iwl_extended_beacon_notif - notifies about beacon transmission
|
||||
* struct iwl_extended_beacon_notif_v5 - notifies about beacon transmission
|
||||
* @beacon_notify_hdr: tx response command associated with the beacon
|
||||
* @tsf: last beacon tsf
|
||||
* @ibss_mgr_status: whether IBSS is manager
|
||||
* @gp2: last beacon time in gp2
|
||||
*/
|
||||
struct iwl_extended_beacon_notif {
|
||||
struct iwl_extended_beacon_notif_v5 {
|
||||
struct iwl_mvm_tx_resp beacon_notify_hdr;
|
||||
__le64 tsf;
|
||||
__le32 ibss_mgr_status;
|
||||
__le32 gp2;
|
||||
} __packed; /* BEACON_NTFY_API_S_VER_5 */
|
||||
|
||||
/**
|
||||
* struct iwl_extended_beacon_notif - notifies about beacon transmission
|
||||
* @status: the status of the Tx response of the beacon
|
||||
* @tsf: last beacon tsf
|
||||
* @ibss_mgr_status: whether IBSS is manager
|
||||
* @gp2: last beacon time in gp2
|
||||
*/
|
||||
struct iwl_extended_beacon_notif {
|
||||
__le32 status;
|
||||
__le64 tsf;
|
||||
__le32 ibss_mgr_status;
|
||||
__le32 gp2;
|
||||
} __packed; /* BEACON_NTFY_API_S_VER_6_ */
|
||||
|
||||
/**
|
||||
* enum iwl_dump_control - dump (flush) control flags
|
||||
* @DUMP_TX_FIFO_FLUSH: Dump MSDUs until the the FIFO is empty
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -112,6 +112,8 @@ void iwl_fw_error_dump(struct iwl_fw_runtime *fwrt);
|
||||
int iwl_fw_dbg_collect_desc(struct iwl_fw_runtime *fwrt,
|
||||
const struct iwl_fw_dump_desc *desc,
|
||||
bool monitor_only, unsigned int delay);
|
||||
int iwl_fw_dbg_error_collect(struct iwl_fw_runtime *fwrt,
|
||||
enum iwl_fw_dbg_trigger trig_type);
|
||||
int _iwl_fw_dbg_collect(struct iwl_fw_runtime *fwrt,
|
||||
enum iwl_fw_dbg_trigger trig,
|
||||
const char *str, size_t len,
|
||||
@@ -434,10 +436,13 @@ static inline void iwl_fw_resume_timestamp(struct iwl_fw_runtime *fwrt) {}
|
||||
|
||||
#endif /* CONFIG_IWLWIFI_DEBUGFS */
|
||||
|
||||
void iwl_fw_assert_error_dump(struct iwl_fw_runtime *fwrt);
|
||||
void iwl_fw_alive_error_dump(struct iwl_fw_runtime *fwrt);
|
||||
void iwl_fw_dbg_collect_sync(struct iwl_fw_runtime *fwrt);
|
||||
void iwl_fw_dbg_apply_point(struct iwl_fw_runtime *fwrt,
|
||||
enum iwl_fw_ini_apply_point apply_point);
|
||||
|
||||
void iwl_fwrt_stop_device(struct iwl_fw_runtime *fwrt);
|
||||
|
||||
/* This bit is used to differentiate the legacy dump from the ini dump */
|
||||
#define INI_DUMP_BIT BIT(31)
|
||||
|
||||
#endif /* __iwl_fw_dbg_h__ */
|
||||
|
||||
@@ -275,21 +275,39 @@ struct iwl_fw_error_dump_mem {
|
||||
};
|
||||
|
||||
/**
|
||||
* struct iwl_fw_error_dump_named_mem - chunk of memory
|
||||
* @type: &enum iwl_fw_error_dump_mem_type
|
||||
* @offset: the offset from which the memory was read
|
||||
* @name_len: name length
|
||||
* @name: file name
|
||||
* @data: the content of the memory
|
||||
* struct iwl_fw_ini_error_dump_range - range of memory
|
||||
* @start_addr: the start address of this range
|
||||
* @range_data_size: the size of this range, in bytes
|
||||
* @data: the actual memory
|
||||
*/
|
||||
struct iwl_fw_error_dump_named_mem {
|
||||
__le32 type;
|
||||
__le32 offset;
|
||||
u8 name_len;
|
||||
u8 name[32];
|
||||
u8 data[];
|
||||
struct iwl_fw_ini_error_dump_range {
|
||||
__le32 start_addr;
|
||||
__le32 range_data_size;
|
||||
__le32 data[];
|
||||
} __packed;
|
||||
|
||||
/**
|
||||
* struct iwl_fw_ini_error_dump_header - ini region dump header
|
||||
* @num_of_ranges: number of ranges in this region
|
||||
* @name_len: number of bytes allocated to the name string of this region
|
||||
* @name: name of the region
|
||||
*/
|
||||
struct iwl_fw_ini_error_dump_header {
|
||||
__le32 num_of_ranges;
|
||||
__le32 name_len;
|
||||
u8 name[IWL_FW_INI_MAX_NAME];
|
||||
};
|
||||
|
||||
/**
|
||||
* struct iwl_fw_ini_error_dump - ini region dump
|
||||
* @header: the header of this region
|
||||
* @ranges: the memory ranges of this this region
|
||||
*/
|
||||
struct iwl_fw_ini_error_dump {
|
||||
struct iwl_fw_ini_error_dump_header header;
|
||||
struct iwl_fw_ini_error_dump_range ranges[];
|
||||
} __packed;
|
||||
|
||||
/**
|
||||
* struct iwl_fw_error_dump_rb - content of an Receive Buffer
|
||||
* @index: the index of the Receive Buffer in the Rx queue
|
||||
@@ -355,7 +373,9 @@ iwl_fw_error_next_data(struct iwl_fw_error_dump_data *data)
|
||||
* @FW_DBG_TDLS: trigger log collection upon TDLS related events.
|
||||
* @FW_DBG_TRIGGER_TX_STATUS: trigger log collection upon tx status when
|
||||
* the firmware sends a tx reply.
|
||||
* @FW_DBG_TRIGGER_NO_ALIVE: trigger log collection if alive flow fails
|
||||
* @FW_DBG_TRIGGER_ALIVE_TIMEOUT: trigger log collection if alive flow timeouts
|
||||
* @FW_DBG_TRIGGER_DRIVER: trigger log collection upon a flow failure
|
||||
* in the driver.
|
||||
*/
|
||||
enum iwl_fw_dbg_trigger {
|
||||
FW_DBG_TRIGGER_INVALID = 0,
|
||||
@@ -373,7 +393,8 @@ enum iwl_fw_dbg_trigger {
|
||||
FW_DBG_TRIGGER_TX_LATENCY,
|
||||
FW_DBG_TRIGGER_TDLS,
|
||||
FW_DBG_TRIGGER_TX_STATUS,
|
||||
FW_DBG_TRIGGER_NO_ALIVE,
|
||||
FW_DBG_TRIGGER_ALIVE_TIMEOUT,
|
||||
FW_DBG_TRIGGER_DRIVER,
|
||||
|
||||
/* must be last */
|
||||
FW_DBG_TRIGGER_MAX,
|
||||
|
||||
@@ -263,6 +263,10 @@ typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
|
||||
* @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS
|
||||
* @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of
|
||||
* the REDUCE_TX_POWER_CMD.
|
||||
* @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short
|
||||
* version of the beacon notification.
|
||||
* @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of
|
||||
* BEACON_FILTER_CONFIG_API_S_VER_4.
|
||||
*
|
||||
* @NUM_IWL_UCODE_TLV_API: number of bits used
|
||||
*/
|
||||
@@ -287,6 +291,8 @@ enum iwl_ucode_tlv_api {
|
||||
IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2 = (__force iwl_ucode_tlv_api_t)42,
|
||||
IWL_UCODE_TLV_API_FRAG_EBS = (__force iwl_ucode_tlv_api_t)44,
|
||||
IWL_UCODE_TLV_API_REDUCE_TX_POWER = (__force iwl_ucode_tlv_api_t)45,
|
||||
IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF = (__force iwl_ucode_tlv_api_t)46,
|
||||
IWL_UCODE_TLV_API_BEACON_FILTER_V4 = (__force iwl_ucode_tlv_api_t)47,
|
||||
|
||||
NUM_IWL_UCODE_TLV_API
|
||||
#ifdef __CHECKER__
|
||||
@@ -333,6 +339,7 @@ typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;
|
||||
* @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm
|
||||
* @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related
|
||||
* @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2
|
||||
* IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command
|
||||
* @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band
|
||||
* (6 GHz).
|
||||
* @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement
|
||||
@@ -397,6 +404,7 @@ enum iwl_ucode_tlv_capa {
|
||||
IWL_UCODE_TLV_CAPA_TLC_OFFLOAD = (__force iwl_ucode_tlv_capa_t)43,
|
||||
IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA = (__force iwl_ucode_tlv_capa_t)44,
|
||||
IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2 = (__force iwl_ucode_tlv_capa_t)45,
|
||||
IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD = (__force iwl_ucode_tlv_capa_t)46,
|
||||
IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS = (__force iwl_ucode_tlv_capa_t)48,
|
||||
IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE = (__force iwl_ucode_tlv_capa_t)64,
|
||||
IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS = (__force iwl_ucode_tlv_capa_t)65,
|
||||
|
||||
@@ -222,6 +222,15 @@ struct iwl_fw_dbg {
|
||||
u32 dump_mask;
|
||||
};
|
||||
|
||||
/**
|
||||
* @tlv: the buffer allocation tlv
|
||||
* @is_alloc: indicates if the buffer was already allocated
|
||||
*/
|
||||
struct iwl_fw_ini_allocation_data {
|
||||
struct iwl_fw_ini_allocation_tlv tlv;
|
||||
u32 is_alloc;
|
||||
} __packed;
|
||||
|
||||
/**
|
||||
* struct iwl_fw_ini_active_triggers
|
||||
* @active: is this trigger active
|
||||
@@ -236,16 +245,6 @@ struct iwl_fw_ini_active_triggers {
|
||||
struct iwl_fw_ini_trigger *conf_ext;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct iwl_fw_ini_active_regs
|
||||
* @reg: active region from TLV
|
||||
* @apply_point: apply point where it became active
|
||||
*/
|
||||
struct iwl_fw_ini_active_regs {
|
||||
struct iwl_fw_ini_region_cfg *reg;
|
||||
enum iwl_fw_ini_apply_point apply_point;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct iwl_fw - variables associated with the firmware
|
||||
*
|
||||
|
||||
@@ -6,6 +6,7 @@
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2019 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
@@ -26,6 +27,7 @@
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2019 Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -74,6 +76,7 @@ void iwl_fw_runtime_init(struct iwl_fw_runtime *fwrt, struct iwl_trans *trans,
|
||||
fwrt->ops_ctx = ops_ctx;
|
||||
INIT_DELAYED_WORK(&fwrt->dump.wk, iwl_fw_error_dump_wk);
|
||||
iwl_fwrt_dbgfs_register(fwrt, dbgfs_dir);
|
||||
init_waitqueue_head(&fwrt->trans->fw_halt_waitq);
|
||||
}
|
||||
IWL_EXPORT_SYMBOL(iwl_fw_runtime_init);
|
||||
|
||||
|
||||
@@ -90,7 +90,6 @@ struct iwl_fwrt_shared_mem_cfg {
|
||||
|
||||
enum iwl_fw_runtime_status {
|
||||
IWL_FWRT_STATUS_DUMPING = 0,
|
||||
IWL_FWRT_STATUS_WAIT_ALIVE,
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -140,7 +139,7 @@ struct iwl_fw_runtime {
|
||||
/* ts of the beginning of a non-collect fw dbg data period */
|
||||
unsigned long non_collect_ts_start[IWL_FW_TRIGGER_ID_NUM - 1];
|
||||
u32 *d3_debug_data;
|
||||
struct iwl_fw_ini_active_regs active_regs[IWL_FW_INI_MAX_REGION_ID];
|
||||
struct iwl_fw_ini_region_cfg *active_regs[IWL_FW_INI_MAX_REGION_ID];
|
||||
struct iwl_fw_ini_active_triggers active_trigs[IWL_FW_TRIGGER_ID_NUM];
|
||||
u32 lmac_err_id[MAX_NUM_LMAC];
|
||||
u32 umac_err_id;
|
||||
|
||||
@@ -379,6 +379,7 @@ struct iwl_csr_params {
|
||||
* @nvm_type: see &enum iwl_nvm_type
|
||||
* @d3_debug_data_base_addr: base address where D3 debug data is stored
|
||||
* @d3_debug_data_length: length of the D3 debug data
|
||||
* @bisr_workaround: BISR hardware workaround (for 22260 series devices)
|
||||
*
|
||||
* We enable the driver to be backward compatible wrt. hardware features.
|
||||
* API differences in uCode shouldn't be handled here but through TLVs
|
||||
@@ -428,7 +429,8 @@ struct iwl_cfg {
|
||||
use_tfh:1,
|
||||
gen2:1,
|
||||
cdb:1,
|
||||
dbgc_supported:1;
|
||||
dbgc_supported:1,
|
||||
bisr_workaround:1;
|
||||
u8 valid_tx_ant;
|
||||
u8 valid_rx_ant;
|
||||
u8 non_shared_ant;
|
||||
@@ -445,35 +447,8 @@ struct iwl_cfg {
|
||||
u32 d3_debug_data_length;
|
||||
};
|
||||
|
||||
static const struct iwl_csr_params iwl_csr_v1 = {
|
||||
.flag_mac_clock_ready = 0,
|
||||
.flag_val_mac_access_en = 0,
|
||||
.flag_init_done = 2,
|
||||
.flag_mac_access_req = 3,
|
||||
.flag_sw_reset = 7,
|
||||
.flag_master_dis = 8,
|
||||
.flag_stop_master = 9,
|
||||
.addr_sw_reset = (CSR_BASE + 0x020),
|
||||
.mac_addr0_otp = 0x380,
|
||||
.mac_addr1_otp = 0x384,
|
||||
.mac_addr0_strap = 0x388,
|
||||
.mac_addr1_strap = 0x38C
|
||||
};
|
||||
|
||||
static const struct iwl_csr_params iwl_csr_v2 = {
|
||||
.flag_init_done = 6,
|
||||
.flag_mac_clock_ready = 20,
|
||||
.flag_val_mac_access_en = 20,
|
||||
.flag_mac_access_req = 21,
|
||||
.flag_master_dis = 28,
|
||||
.flag_stop_master = 29,
|
||||
.flag_sw_reset = 31,
|
||||
.addr_sw_reset = (CSR_BASE + 0x024),
|
||||
.mac_addr0_otp = 0x30,
|
||||
.mac_addr1_otp = 0x34,
|
||||
.mac_addr0_strap = 0x38,
|
||||
.mac_addr1_strap = 0x3C
|
||||
};
|
||||
extern const struct iwl_csr_params iwl_csr_v1;
|
||||
extern const struct iwl_csr_params iwl_csr_v2;
|
||||
|
||||
/*
|
||||
* This list declares the config structures for all devices.
|
||||
|
||||
@@ -71,6 +71,7 @@ void iwl_fw_dbg_copy_tlv(struct iwl_trans *trans, struct iwl_ucode_tlv *tlv,
|
||||
u32 apply_point = le32_to_cpu(header->apply_point);
|
||||
|
||||
int copy_size = le32_to_cpu(tlv->length) + sizeof(*tlv);
|
||||
int offset_size = copy_size;
|
||||
|
||||
if (WARN_ONCE(apply_point >= IWL_FW_INI_APPLY_NUM,
|
||||
"Invalid apply point id %d\n", apply_point))
|
||||
@@ -81,17 +82,25 @@ void iwl_fw_dbg_copy_tlv(struct iwl_trans *trans, struct iwl_ucode_tlv *tlv,
|
||||
else
|
||||
data = &trans->apply_points[apply_point];
|
||||
|
||||
/* add room for is_alloc field in &iwl_fw_ini_allocation_data struct */
|
||||
if (le32_to_cpu(tlv->type) == IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION) {
|
||||
struct iwl_fw_ini_allocation_data *buf_alloc =
|
||||
(void *)tlv->data;
|
||||
|
||||
offset_size += sizeof(buf_alloc->is_alloc);
|
||||
}
|
||||
|
||||
/*
|
||||
* Make sure we still have room to copy this TLV. Offset points to the
|
||||
* location the last copy ended.
|
||||
*/
|
||||
if (WARN_ONCE(data->offset + copy_size > data->size,
|
||||
if (WARN_ONCE(data->offset + offset_size > data->size,
|
||||
"Not enough memory for apply point %d\n",
|
||||
apply_point))
|
||||
return;
|
||||
|
||||
memcpy(data->data + data->offset, (void *)tlv, copy_size);
|
||||
data->offset += copy_size;
|
||||
data->offset += offset_size;
|
||||
}
|
||||
|
||||
void iwl_alloc_dbg_tlv(struct iwl_trans *trans, size_t len, const u8 *data,
|
||||
@@ -129,6 +138,16 @@ void iwl_alloc_dbg_tlv(struct iwl_trans *trans, size_t len, const u8 *data,
|
||||
if (WARN_ON(apply >= IWL_FW_INI_APPLY_NUM))
|
||||
continue;
|
||||
|
||||
/* add room for is_alloc field in &iwl_fw_ini_allocation_data
|
||||
* struct
|
||||
*/
|
||||
if (tlv_type == IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION) {
|
||||
struct iwl_fw_ini_allocation_data *buf_alloc =
|
||||
(void *)tlv->data;
|
||||
|
||||
size[apply] += sizeof(buf_alloc->is_alloc);
|
||||
}
|
||||
|
||||
size[apply] += sizeof(*tlv) + tlv_len;
|
||||
}
|
||||
|
||||
|
||||
@@ -193,34 +193,25 @@ static int iwl_init_otp_access(struct iwl_trans *trans)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* Enable 40MHz radio clock */
|
||||
iwl_write32(trans, CSR_GP_CNTRL,
|
||||
iwl_read32(trans, CSR_GP_CNTRL) |
|
||||
BIT(trans->cfg->csr->flag_init_done));
|
||||
ret = iwl_finish_nic_init(trans);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* wait for clock to be ready */
|
||||
ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
25000);
|
||||
if (ret < 0) {
|
||||
IWL_ERR(trans, "Time out access OTP\n");
|
||||
} else {
|
||||
iwl_set_bits_prph(trans, APMG_PS_CTRL_REG,
|
||||
APMG_PS_CTRL_VAL_RESET_REQ);
|
||||
udelay(5);
|
||||
iwl_clear_bits_prph(trans, APMG_PS_CTRL_REG,
|
||||
APMG_PS_CTRL_VAL_RESET_REQ);
|
||||
iwl_set_bits_prph(trans, APMG_PS_CTRL_REG,
|
||||
APMG_PS_CTRL_VAL_RESET_REQ);
|
||||
udelay(5);
|
||||
iwl_clear_bits_prph(trans, APMG_PS_CTRL_REG,
|
||||
APMG_PS_CTRL_VAL_RESET_REQ);
|
||||
|
||||
/*
|
||||
* CSR auto clock gate disable bit -
|
||||
* this is only applicable for HW with OTP shadow RAM
|
||||
*/
|
||||
if (trans->cfg->base_params->shadow_ram_support)
|
||||
iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
|
||||
CSR_RESET_LINK_PWR_MGMT_DISABLED);
|
||||
}
|
||||
return ret;
|
||||
/*
|
||||
* CSR auto clock gate disable bit -
|
||||
* this is only applicable for HW with OTP shadow RAM
|
||||
*/
|
||||
if (trans->cfg->base_params->shadow_ram_support)
|
||||
iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
|
||||
CSR_RESET_LINK_PWR_MGMT_DISABLED);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int iwl_read_otp_word(struct iwl_trans *trans, u16 addr,
|
||||
|
||||
@@ -7,6 +7,7 @@
|
||||
*
|
||||
* Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2015 - 2016 Intel Deutschland GmbH
|
||||
* Copyright (C) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
@@ -28,6 +29,7 @@
|
||||
*
|
||||
* Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2015 - 2016 Intel Deutschland GmbH
|
||||
* Copyright (C) 2018 Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -68,6 +70,36 @@
|
||||
#include "iwl-prph.h"
|
||||
#include "iwl-fh.h"
|
||||
|
||||
const struct iwl_csr_params iwl_csr_v1 = {
|
||||
.flag_mac_clock_ready = 0,
|
||||
.flag_val_mac_access_en = 0,
|
||||
.flag_init_done = 2,
|
||||
.flag_mac_access_req = 3,
|
||||
.flag_sw_reset = 7,
|
||||
.flag_master_dis = 8,
|
||||
.flag_stop_master = 9,
|
||||
.addr_sw_reset = CSR_BASE + 0x020,
|
||||
.mac_addr0_otp = 0x380,
|
||||
.mac_addr1_otp = 0x384,
|
||||
.mac_addr0_strap = 0x388,
|
||||
.mac_addr1_strap = 0x38C
|
||||
};
|
||||
|
||||
const struct iwl_csr_params iwl_csr_v2 = {
|
||||
.flag_init_done = 6,
|
||||
.flag_mac_clock_ready = 20,
|
||||
.flag_val_mac_access_en = 20,
|
||||
.flag_mac_access_req = 21,
|
||||
.flag_master_dis = 28,
|
||||
.flag_stop_master = 29,
|
||||
.flag_sw_reset = 31,
|
||||
.addr_sw_reset = CSR_BASE + 0x024,
|
||||
.mac_addr0_otp = 0x30,
|
||||
.mac_addr1_otp = 0x34,
|
||||
.mac_addr0_strap = 0x38,
|
||||
.mac_addr1_strap = 0x3C
|
||||
};
|
||||
|
||||
void iwl_write8(struct iwl_trans *trans, u32 ofs, u8 val)
|
||||
{
|
||||
trace_iwlwifi_dev_iowrite8(trans->dev, ofs, val);
|
||||
@@ -456,3 +488,43 @@ int iwl_dump_fh(struct iwl_trans *trans, char **buf)
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int iwl_finish_nic_init(struct iwl_trans *trans)
|
||||
{
|
||||
int err;
|
||||
|
||||
if (trans->cfg->bisr_workaround) {
|
||||
/* ensure the TOP FSM isn't still in previous reset */
|
||||
mdelay(2);
|
||||
}
|
||||
|
||||
/*
|
||||
* Set "initialization complete" bit to move adapter from
|
||||
* D0U* --> D0A* (powered-up active) state.
|
||||
*/
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL,
|
||||
BIT(trans->cfg->csr->flag_init_done));
|
||||
|
||||
if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
|
||||
udelay(2);
|
||||
|
||||
/*
|
||||
* Wait for clock stabilization; once stabilized, access to
|
||||
* device-internal resources is supported, e.g. iwl_write_prph()
|
||||
* and accesses to uCode SRAM.
|
||||
*/
|
||||
err = iwl_poll_bit(trans, CSR_GP_CNTRL,
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
25000);
|
||||
if (err < 0)
|
||||
IWL_DEBUG_INFO(trans, "Failed to wake NIC\n");
|
||||
|
||||
if (trans->cfg->bisr_workaround) {
|
||||
/* ensure BISR shift has finished */
|
||||
udelay(200);
|
||||
}
|
||||
|
||||
return err < 0 ? err : 0;
|
||||
}
|
||||
IWL_EXPORT_SYMBOL(iwl_finish_nic_init);
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user