mirror of
https://github.com/t2linux/kernel.git
synced 2026-04-30 13:48:59 -07:00
Merge tag 'mmc-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson:
"There are no updates for the MEMSTICK subsystem this time. But note
that I am also carrying a patch from the pinctrl tree, which has been
shared through an immutable branch.
Summary:
MMC core:
- Convert to reasonable timeouts for all CMD6 commands (updates for
BKOPS, CACHE_FLUSH and INAND_CMD38_ARG_EXT_CSD) for eMMC
- Respect f_max clock rate at card initialization
- Add gpiod_toggle_active_low() API
- Consolidate slot-gpio code by using gpiod_toggle_active_low()
MMC host:
- Add pinctrl_select_default_state() API
- Consolidate pintctrl code by using pinctrl_select_default_state()
- mmci: Support any block sizes for SDIO for some variants
- mmci: Enable reset control for stm32_sdmmc
- mmc_spi: Toggle SPI_CS_HIGH polarity rather than hard-coding it
- renesas_sdhi: Add support for the r8a77961 variant
- renesas_sdhi: A few minor improvements
- rockchip-dw-mshc: Add support for the rk3308 variant
- sdhci: Enable support for external DMA controllers
- sdhci: Fixup error path when sending CMD12
- sdhci-brcmstb: Add support for 7216b0 variant
- sdhci-brcmstb: Add support for command queuing (CQHCI)
- sdhci-brcmstb: Add support for eMMC HS400ES mode
- sdhci-msm: Add support for the sc7180 variant
- sdhci-msm: Add support for command queuing (CQHCI)
- sdhci-of-at91: Add support for the SAM9x60 variant
- sdhci-of-at91: Improve support for tunings
- sdhci-of-esdhc: A few fixups for some clock related issues
- sdhci-omap: Add support for the am335x and the am437x variants
- sdhci-omap: Improve support for erase operations
- sdhci-omap: Add support for external DMA"
* tag 'mmc-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (89 commits)
mmc: core: Default to generic_cmd6_time as timeout in __mmc_switch()
mmc: block: Use generic_cmd6_time when modifying INAND_CMD38_ARG_EXT_CSD
mmc: core: Specify timeouts for BKOPS and CACHE_FLUSH for eMMC
mmc: sdhci-cadence: remove unneeded 'inline' marker
dt-bindings: mmc: rockchip-dw-mshc: add description for rk3308
dt-bindings: mmc: convert rockchip dw-mshc bindings to yaml
dt-bindings: mmc: convert synopsys dw-mshc bindings to yaml
mmc: sdhci-msm: Add CQHCI support for sdhci-msm
mmc: sdhci: Let a vendor driver supply and update ADMA descriptor size
mmc: sdhci-of-esdhc: fix serious issue clock is always disabled
mmc: sdhci-of-esdhc: fix transfer mode register reading
mmc: sdhci-brcmstb: Fix incorrect switch to HS mode
mmc: sdhci-brcmstb: Add support for Command Queuing (CQE)
mmc: sdhci-brcmstb: Add shutdown callback
mmc: sdhci-brcmstb: Fix driver to defer on clk_get defer
mmc: sdhci-brcmstb: Add ability to use HS400ES transfer mode
dt-bindings: mmc: brcm,sdhci-brcmstb: Add support for 7216b0
mmc: core: limit probe clock frequency to configured f_max
mmc: sdhci-milbeaut: Remove redundant platform_get_irq error message
mmc: sdhci: fix an issue of mixing different types
...
This commit is contained in:
Linus Torvalds
@@ -11,28 +11,43 @@ Required properties:
|
||||
- compatible: should be one of the following
|
||||
- "brcm,bcm7425-sdhci"
|
||||
- "brcm,bcm7445-sdhci"
|
||||
- "brcm,bcm7216-sdhci"
|
||||
|
||||
Refer to clocks/clock-bindings.txt for generic clock consumer properties.
|
||||
|
||||
Example:
|
||||
|
||||
sdhci@f03e0100 {
|
||||
compatible = "brcm,bcm7425-sdhci";
|
||||
reg = <0xf03e0000 0x100>;
|
||||
interrupts = <0x0 0x26 0x0>;
|
||||
sdhci,auto-cmd12;
|
||||
clocks = <&sw_sdio>;
|
||||
sdhci@84b0000 {
|
||||
sd-uhs-sdr50;
|
||||
sd-uhs-ddr50;
|
||||
sd-uhs-sdr104;
|
||||
sdhci,auto-cmd12;
|
||||
compatible = "brcm,bcm7216-sdhci",
|
||||
"brcm,bcm7445-sdhci",
|
||||
"brcm,sdhci-brcmstb";
|
||||
reg = <0x84b0000 0x260 0x84b0300 0x200>;
|
||||
reg-names = "host", "cfg";
|
||||
interrupts = <0x0 0x26 0x4>;
|
||||
interrupt-names = "sdio0_0";
|
||||
clocks = <&scmi_clk 245>;
|
||||
clock-names = "sw_sdio";
|
||||
};
|
||||
|
||||
sdhci@f03e0300 {
|
||||
sdhci@84b1000 {
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs200-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
mmc-hs400-enhanced-strobe;
|
||||
supports-cqe;
|
||||
non-removable;
|
||||
bus-width = <0x8>;
|
||||
compatible = "brcm,bcm7425-sdhci";
|
||||
reg = <0xf03e0200 0x100>;
|
||||
interrupts = <0x0 0x27 0x0>;
|
||||
sdhci,auto-cmd12;
|
||||
clocks = <sw_sdio>;
|
||||
mmc-hs200-1_8v;
|
||||
compatible = "brcm,bcm7216-sdhci",
|
||||
"brcm,bcm7445-sdhci",
|
||||
"brcm,sdhci-brcmstb";
|
||||
reg = <0x84b1000 0x260 0x84b1300 0x200>;
|
||||
reg-names = "host", "cfg";
|
||||
interrupts = <0x0 0x27 0x4>;
|
||||
interrupt-names = "sdio1_0";
|
||||
clocks = <&scmi_clk 245>;
|
||||
clock-names = "sw_sdio";
|
||||
};
|
||||
|
||||
@@ -21,6 +21,7 @@ Required properties:
|
||||
"fsl,imx8mq-usdhc"
|
||||
"fsl,imx8mm-usdhc"
|
||||
"fsl,imx8mn-usdhc"
|
||||
"fsl,imx8mp-usdhc"
|
||||
"fsl,imx8qxp-usdhc"
|
||||
|
||||
Optional properties:
|
||||
|
||||
@@ -23,7 +23,8 @@ Required properties:
|
||||
"renesas,sdhi-r8a7793" - SDHI IP on R8A7793 SoC
|
||||
"renesas,sdhi-r8a7794" - SDHI IP on R8A7794 SoC
|
||||
"renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC
|
||||
"renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC
|
||||
"renesas,sdhi-r8a7796" - SDHI IP on R8A77960 SoC
|
||||
"renesas,sdhi-r8a77961" - SDHI IP on R8A77961 SoC
|
||||
"renesas,sdhi-r8a77965" - SDHI IP on R8A77965 SoC
|
||||
"renesas,sdhi-r8a77970" - SDHI IP on R8A77970 SoC
|
||||
"renesas,sdhi-r8a77980" - SDHI IP on R8A77980 SoC
|
||||
|
||||
@@ -1,49 +0,0 @@
|
||||
* Rockchip specific extensions to the Synopsys Designware Mobile
|
||||
Storage Host Controller
|
||||
|
||||
The Synopsys designware mobile storage host controller is used to interface
|
||||
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
|
||||
differences between the core Synopsys dw mshc controller properties described
|
||||
by synopsys-dw-mshc.txt and the properties used by the Rockchip specific
|
||||
extensions to the Synopsys Designware Mobile Storage Host Controller.
|
||||
|
||||
Required Properties:
|
||||
|
||||
* compatible: should be
|
||||
- "rockchip,rk2928-dw-mshc": for Rockchip RK2928 and following,
|
||||
before RK3288
|
||||
- "rockchip,rk3288-dw-mshc": for Rockchip RK3288
|
||||
- "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RV1108
|
||||
- "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip PX30
|
||||
- "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036
|
||||
- "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK322x
|
||||
- "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3328
|
||||
- "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368
|
||||
- "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3399
|
||||
|
||||
Optional Properties:
|
||||
* clocks: from common clock binding: if ciu-drive and ciu-sample are
|
||||
specified in clock-names, should contain handles to these clocks.
|
||||
|
||||
* clock-names: Apart from the clock-names described in synopsys-dw-mshc.txt
|
||||
two more clocks "ciu-drive" and "ciu-sample" are supported. They are used
|
||||
to control the clock phases, "ciu-sample" is required for tuning high-
|
||||
speed modes.
|
||||
|
||||
* rockchip,default-sample-phase: The default phase to set ciu-sample at
|
||||
probing, low speeds or in case where all phases work at tuning time.
|
||||
If not specified 0 deg will be used.
|
||||
|
||||
* rockchip,desired-num-phases: The desired number of times that the host
|
||||
execute tuning when needed. If not specified, the host will do tuning
|
||||
for 360 times, namely tuning for each degree.
|
||||
|
||||
Example:
|
||||
|
||||
rkdwmmc0@12200000 {
|
||||
compatible = "rockchip,rk3288-dw-mshc";
|
||||
reg = <0x12200000 0x1000>;
|
||||
interrupts = <0 75 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
@@ -0,0 +1,125 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Rockchip designware mobile storage host controller device tree bindings
|
||||
|
||||
description:
|
||||
Rockchip uses the Synopsys designware mobile storage host controller
|
||||
to interface a SoC with storage medium such as eMMC or SD/MMC cards.
|
||||
This file documents the combined properties for the core Synopsys dw mshc
|
||||
controller that are not already included in the synopsys-dw-mshc-common.yaml
|
||||
file and the Rockchip specific extensions.
|
||||
|
||||
allOf:
|
||||
- $ref: "synopsys-dw-mshc-common.yaml#"
|
||||
|
||||
maintainers:
|
||||
- Heiko Stuebner <heiko@sntech.de>
|
||||
|
||||
# Everything else is described in the common file
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
# for Rockchip RK2928 and before RK3288
|
||||
- const: rockchip,rk2928-dw-mshc
|
||||
# for Rockchip RK3288
|
||||
- const: rockchip,rk3288-dw-mshc
|
||||
- items:
|
||||
- enum:
|
||||
# for Rockchip PX30
|
||||
- rockchip,px30-dw-mshc
|
||||
# for Rockchip RK3036
|
||||
- rockchip,rk3036-dw-mshc
|
||||
# for Rockchip RK322x
|
||||
- rockchip,rk3228-dw-mshc
|
||||
# for Rockchip RK3308
|
||||
- rockchip,rk3308-dw-mshc
|
||||
# for Rockchip RK3328
|
||||
- rockchip,rk3328-dw-mshc
|
||||
# for Rockchip RK3368
|
||||
- rockchip,rk3368-dw-mshc
|
||||
# for Rockchip RK3399
|
||||
- rockchip,rk3399-dw-mshc
|
||||
# for Rockchip RV1108
|
||||
- rockchip,rv1108-dw-mshc
|
||||
- const: rockchip,rk3288-dw-mshc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 2
|
||||
maxItems: 4
|
||||
description:
|
||||
Handle to "biu" and "ciu" clocks for the bus interface unit clock and
|
||||
the card interface unit clock. If "ciu-drive" and "ciu-sample" are
|
||||
specified in clock-names, it should also contain
|
||||
handles to these clocks.
|
||||
|
||||
clock-names:
|
||||
minItems: 2
|
||||
items:
|
||||
- const: biu
|
||||
- const: ciu
|
||||
- const: ciu-drive
|
||||
- const: ciu-sample
|
||||
description:
|
||||
Apart from the clock-names "biu" and "ciu" two more clocks
|
||||
"ciu-drive" and "ciu-sample" are supported. They are used
|
||||
to control the clock phases, "ciu-sample" is required for tuning
|
||||
high speed modes.
|
||||
|
||||
rockchip,default-sample-phase:
|
||||
allOf:
|
||||
- $ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 360
|
||||
default: 0
|
||||
description:
|
||||
The default phase to set "ciu-sample" at probing,
|
||||
low speeds or in case where all phases work at tuning time.
|
||||
If not specified 0 deg will be used.
|
||||
|
||||
rockchip,desired-num-phases:
|
||||
allOf:
|
||||
- $ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 360
|
||||
default: 360
|
||||
description:
|
||||
The desired number of times that the host execute tuning when needed.
|
||||
If not specified, the host will do tuning for 360 times,
|
||||
namely tuning for each degree.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/rk3288-cru.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
sdmmc: mmc@ff0c0000 {
|
||||
compatible = "rockchip,rk3288-dw-mshc";
|
||||
reg = <0x0 0xff0c0000 0x0 0x4000>;
|
||||
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
|
||||
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
resets = <&cru SRST_MMC0>;
|
||||
reset-names = "reset";
|
||||
fifo-depth = <0x100>;
|
||||
max-frequency = <150000000>;
|
||||
};
|
||||
|
||||
...
|
||||
@@ -5,11 +5,16 @@ Documentation/devicetree/bindings/mmc/mmc.txt and the properties used by the
|
||||
sdhci-of-at91 driver.
|
||||
|
||||
Required properties:
|
||||
- compatible: Must be "atmel,sama5d2-sdhci".
|
||||
- compatible: Must be "atmel,sama5d2-sdhci" or "microchip,sam9x60-sdhci".
|
||||
- clocks: Phandlers to the clocks.
|
||||
- clock-names: Must be "hclock", "multclk", "baseclk";
|
||||
- clock-names: Must be "hclock", "multclk", "baseclk" for
|
||||
"atmel,sama5d2-sdhci".
|
||||
Must be "hclock", "multclk" for "microchip,sam9x60-sdhci".
|
||||
|
||||
Optional properties:
|
||||
- assigned-clocks: The same with "multclk".
|
||||
- assigned-clock-rates The rate of "multclk" in order to not rely on the
|
||||
gck configuration set by previous components.
|
||||
- microchip,sdcal-inverted: when present, polarity on the SDCAL SoC pin is
|
||||
inverted. The default polarity for this signal is described in the datasheet.
|
||||
For instance on SAMA5D2, the pin is usually tied to the GND with a resistor
|
||||
@@ -17,10 +22,12 @@ Optional properties:
|
||||
|
||||
Example:
|
||||
|
||||
sdmmc0: sdio-host@a0000000 {
|
||||
mmc0: sdio-host@a0000000 {
|
||||
compatible = "atmel,sama5d2-sdhci";
|
||||
reg = <0xa0000000 0x300>;
|
||||
interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;
|
||||
clock-names = "hclock", "multclk", "baseclk";
|
||||
assigned-clocks = <&sdmmc0_gclk>;
|
||||
assigned-clock-rates = <480000000>;
|
||||
};
|
||||
|
||||
@@ -19,6 +19,7 @@ Required properties:
|
||||
"qcom,msm8996-sdhci", "qcom,sdhci-msm-v4"
|
||||
"qcom,sdm845-sdhci", "qcom,sdhci-msm-v5"
|
||||
"qcom,qcs404-sdhci", "qcom,sdhci-msm-v5"
|
||||
"qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";
|
||||
NOTE that some old device tree files may be floating around that only
|
||||
have the string "qcom,sdhci-msm-v4" without the SoC compatible string
|
||||
but doing that should be considered a deprecated practice.
|
||||
|
||||
@@ -7,6 +7,8 @@ For UHS devices which require tuning, the device tree should have a "cpu_thermal
|
||||
Required properties:
|
||||
- compatible: Should be "ti,dra7-sdhci" for DRA7 and DRA72 controllers
|
||||
Should be "ti,k2g-sdhci" for K2G
|
||||
Should be "ti,am335-sdhci" for am335x controllers
|
||||
Should be "ti,am437-sdhci" for am437x controllers
|
||||
- ti,hwmods: Must be "mmc<n>", <n> is controller instance starting 1
|
||||
(Not required for K2G).
|
||||
- pinctrl-names: Should be subset of "default", "hs", "sdr12", "sdr25", "sdr50",
|
||||
@@ -15,6 +17,13 @@ Required properties:
|
||||
"hs200_1_8v",
|
||||
- pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt
|
||||
|
||||
Optional properties:
|
||||
- dmas: List of DMA specifiers with the controller specific format as described
|
||||
in the generic DMA client binding. A tx and rx specifier is required.
|
||||
- dma-names: List of DMA request names. These strings correspond 1:1 with the
|
||||
DMA specifiers listed in dmas. The string naming is to be "tx"
|
||||
and "rx" for TX and RX DMA requests, respectively.
|
||||
|
||||
Example:
|
||||
mmc1: mmc@4809c000 {
|
||||
compatible = "ti,dra7-sdhci";
|
||||
@@ -22,4 +31,6 @@ Example:
|
||||
ti,hwmods = "mmc1";
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <&vmmc>; /* phandle to regulator node */
|
||||
dmas = <&sdma 61 &sdma 62>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
@@ -0,0 +1,68 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc-common.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Synopsys Designware Mobile Storage Host Controller Common Properties
|
||||
|
||||
allOf:
|
||||
- $ref: "mmc-controller.yaml#"
|
||||
|
||||
maintainers:
|
||||
- Ulf Hansson <ulf.hansson@linaro.org>
|
||||
|
||||
# Everything else is described in the common file
|
||||
properties:
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
reset-names:
|
||||
const: reset
|
||||
|
||||
clock-frequency:
|
||||
description:
|
||||
Should be the frequency (in Hz) of the ciu clock. If this
|
||||
is specified and the ciu clock is specified then we'll try to set the ciu
|
||||
clock to this at probe time.
|
||||
|
||||
fifo-depth:
|
||||
allOf:
|
||||
- $ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
The maximum size of the tx/rx fifo's. If this property is not
|
||||
specified, the default value of the fifo size is determined from the
|
||||
controller registers.
|
||||
|
||||
card-detect-delay:
|
||||
allOf:
|
||||
- $ref: /schemas/types.yaml#/definitions/uint32
|
||||
- default: 0
|
||||
description:
|
||||
Delay in milli-seconds before detecting card after card
|
||||
insert event. The default value is 0.
|
||||
|
||||
data-addr:
|
||||
allOf:
|
||||
- $ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
Override fifo address with value provided by DT. The default FIFO reg
|
||||
offset is assumed as 0x100 (version < 0x240A) and 0x200(version >= 0x240A)
|
||||
by driver. If the controller does not follow this rule, please use
|
||||
this property to set fifo address in device tree.
|
||||
|
||||
fifo-watermark-aligned:
|
||||
allOf:
|
||||
- $ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Data done irq is expected if data length is less than
|
||||
watermark in PIO mode. But fifo watermark is requested to be aligned
|
||||
with data length in some SoC so that TX/RX irq can be generated with
|
||||
data done irq. Add this watermark quirk to mark this requirement and
|
||||
force fifo watermark setting accordingly.
|
||||
|
||||
dmas:
|
||||
maxItems: 1
|
||||
|
||||
dma-names:
|
||||
const: rx-tx
|
||||
@@ -1,141 +0,0 @@
|
||||
* Synopsys Designware Mobile Storage Host Controller
|
||||
|
||||
The Synopsys designware mobile storage host controller is used to interface
|
||||
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
|
||||
differences between the core mmc properties described by mmc.txt and the
|
||||
properties used by the Synopsys Designware Mobile Storage Host Controller.
|
||||
|
||||
Required Properties:
|
||||
|
||||
* compatible: should be
|
||||
- snps,dw-mshc: for controllers compliant with synopsys dw-mshc.
|
||||
* #address-cells: should be 1.
|
||||
* #size-cells: should be 0.
|
||||
|
||||
# Slots (DEPRECATED): The slot specific information are contained within
|
||||
child-nodes with each child-node representing a supported slot. There should
|
||||
be atleast one child node representing a card slot. The name of the child node
|
||||
representing the slot is recommended to be slot@n where n is the unique number
|
||||
of the slot connected to the controller. The following are optional properties
|
||||
which can be included in the slot child node.
|
||||
|
||||
* reg: specifies the physical slot number. The valid values of this
|
||||
property is 0 to (num-slots -1), where num-slots is the value
|
||||
specified by the num-slots property.
|
||||
|
||||
* bus-width: as documented in mmc core bindings.
|
||||
|
||||
* wp-gpios: specifies the write protect gpio line. The format of the
|
||||
gpio specifier depends on the gpio controller. If a GPIO is not used
|
||||
for write-protect, this property is optional.
|
||||
|
||||
* disable-wp: If the wp-gpios property isn't present then (by default)
|
||||
we'd assume that the write protect is hooked up directly to the
|
||||
controller's special purpose write protect line (accessible via
|
||||
the WRTPRT register). However, it's possible that we simply don't
|
||||
want write protect. In that case specify 'disable-wp'.
|
||||
NOTE: This property is not required for slots known to always
|
||||
connect to eMMC or SDIO cards.
|
||||
|
||||
Optional properties:
|
||||
|
||||
* resets: phandle + reset specifier pair, intended to represent hardware
|
||||
reset signal present internally in some host controller IC designs.
|
||||
See Documentation/devicetree/bindings/reset/reset.txt for details.
|
||||
|
||||
* reset-names: request name for using "resets" property. Must be "reset".
|
||||
(It will be used together with "resets" property.)
|
||||
|
||||
* clocks: from common clock binding: handle to biu and ciu clocks for the
|
||||
bus interface unit clock and the card interface unit clock.
|
||||
|
||||
* clock-names: from common clock binding: Shall be "biu" and "ciu".
|
||||
If the biu clock is missing we'll simply skip enabling it. If the
|
||||
ciu clock is missing we'll just assume that the clock is running at
|
||||
clock-frequency. It is an error to omit both the ciu clock and the
|
||||
clock-frequency.
|
||||
|
||||
* clock-frequency: should be the frequency (in Hz) of the ciu clock. If this
|
||||
is specified and the ciu clock is specified then we'll try to set the ciu
|
||||
clock to this at probe time.
|
||||
|
||||
* fifo-depth: The maximum size of the tx/rx fifo's. If this property is not
|
||||
specified, the default value of the fifo size is determined from the
|
||||
controller registers.
|
||||
|
||||
* card-detect-delay: Delay in milli-seconds before detecting card after card
|
||||
insert event. The default value is 0.
|
||||
|
||||
* data-addr: Override fifo address with value provided by DT. The default FIFO reg
|
||||
offset is assumed as 0x100 (version < 0x240A) and 0x200(version >= 0x240A) by
|
||||
driver. If the controller does not follow this rule, please use this property
|
||||
to set fifo address in device tree.
|
||||
|
||||
* fifo-watermark-aligned: Data done irq is expected if data length is less than
|
||||
watermark in PIO mode. But fifo watermark is requested to be aligned with data
|
||||
length in some SoC so that TX/RX irq can be generated with data done irq. Add this
|
||||
watermark quirk to mark this requirement and force fifo watermark setting
|
||||
accordingly.
|
||||
|
||||
* vmmc-supply: The phandle to the regulator to use for vmmc. If this is
|
||||
specified we'll defer probe until we can find this regulator.
|
||||
|
||||
* dmas: List of DMA specifiers with the controller specific format as described
|
||||
in the generic DMA client binding. Refer to dma.txt for details.
|
||||
|
||||
* dma-names: request names for generic DMA client binding. Must be "rx-tx".
|
||||
Refer to dma.txt for details.
|
||||
|
||||
Aliases:
|
||||
|
||||
- All the MSHC controller nodes should be represented in the aliases node using
|
||||
the following format 'mshc{n}' where n is a unique number for the alias.
|
||||
|
||||
Example:
|
||||
|
||||
The MSHC controller node can be split into two portions, SoC specific and
|
||||
board specific portions as listed below.
|
||||
|
||||
dwmmc0@12200000 {
|
||||
compatible = "snps,dw-mshc";
|
||||
clocks = <&clock 351>, <&clock 132>;
|
||||
clock-names = "biu", "ciu";
|
||||
reg = <0x12200000 0x1000>;
|
||||
interrupts = <0 75 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
data-addr = <0x200>;
|
||||
fifo-watermark-aligned;
|
||||
resets = <&rst 20>;
|
||||
reset-names = "reset";
|
||||
};
|
||||
|
||||
[board specific internal DMA resources]
|
||||
|
||||
dwmmc0@12200000 {
|
||||
clock-frequency = <400000000>;
|
||||
clock-freq-min-max = <400000 200000000>;
|
||||
broken-cd;
|
||||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
vmmc-supply = <&buck8>;
|
||||
bus-width = <8>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
};
|
||||
|
||||
[board specific generic DMA request binding]
|
||||
|
||||
dwmmc0@12200000 {
|
||||
clock-frequency = <400000000>;
|
||||
clock-freq-min-max = <400000 200000000>;
|
||||
broken-cd;
|
||||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
vmmc-supply = <&buck8>;
|
||||
bus-width = <8>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
dmas = <&pdma 12>;
|
||||
dma-names = "rx-tx";
|
||||
};
|
||||
@@ -0,0 +1,70 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Synopsys Designware Mobile Storage Host Controller Binding
|
||||
|
||||
allOf:
|
||||
- $ref: "synopsys-dw-mshc-common.yaml#"
|
||||
|
||||
maintainers:
|
||||
- Ulf Hansson <ulf.hansson@linaro.org>
|
||||
|
||||
# Everything else is described in the common file
|
||||
properties:
|
||||
compatible:
|
||||
const: snps,dw-mshc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
description:
|
||||
Handle to "biu" and "ciu" clocks for the
|
||||
bus interface unit clock and the card interface unit clock.
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: biu
|
||||
- const: ciu
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
mmc@12200000 {
|
||||
compatible = "snps,dw-mshc";
|
||||
reg = <0x12200000 0x1000>;
|
||||
interrupts = <0 75 0>;
|
||||
clocks = <&clock 351>, <&clock 132>;
|
||||
clock-names = "biu", "ciu";
|
||||
dmas = <&pdma 12>;
|
||||
dma-names = "rx-tx";
|
||||
resets = <&rst 20>;
|
||||
reset-names = "reset";
|
||||
vmmc-supply = <&buck8>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
broken-cd;
|
||||
bus-width = <8>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
card-detect-delay = <200>;
|
||||
clock-freq-min-max = <400000 200000000>;
|
||||
clock-frequency = <400000000>;
|
||||
data-addr = <0x200>;
|
||||
fifo-depth = <0x80>;
|
||||
fifo-watermark-aligned;
|
||||
};
|
||||
@@ -2251,6 +2251,7 @@ L: linux-rockchip@lists.infradead.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
|
||||
F: Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml
|
||||
F: arch/arm/boot/dts/rk3*
|
||||
F: arch/arm/boot/dts/rv1108*
|
||||
F: arch/arm/mach-rockchip/
|
||||
|
||||
@@ -131,27 +131,6 @@ static void of_gpio_flags_quirks(struct device_node *np,
|
||||
enum of_gpio_flags *flags,
|
||||
int index)
|
||||
{
|
||||
/*
|
||||
* Handle MMC "cd-inverted" and "wp-inverted" semantics.
|
||||
*/
|
||||
if (IS_ENABLED(CONFIG_MMC)) {
|
||||
/*
|
||||
* Active low is the default according to the
|
||||
* SDHCI specification and the device tree
|
||||
* bindings. However the code in the current
|
||||
* kernel was written such that the phandle
|
||||
* flags were always respected, and "cd-inverted"
|
||||
* would invert the flag from the device phandle.
|
||||
*/
|
||||
if (!strcmp(propname, "cd-gpios")) {
|
||||
if (of_property_read_bool(np, "cd-inverted"))
|
||||
*flags ^= OF_GPIO_ACTIVE_LOW;
|
||||
}
|
||||
if (!strcmp(propname, "wp-gpios")) {
|
||||
if (of_property_read_bool(np, "wp-inverted"))
|
||||
*flags ^= OF_GPIO_ACTIVE_LOW;
|
||||
}
|
||||
}
|
||||
/*
|
||||
* Some GPIO fixed regulator quirks.
|
||||
* Note that active low is the default.
|
||||
|
||||
@@ -3371,6 +3371,17 @@ int gpiod_is_active_low(const struct gpio_desc *desc)
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(gpiod_is_active_low);
|
||||
|
||||
/**
|
||||
* gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
|
||||
* @desc: the gpio descriptor to change
|
||||
*/
|
||||
void gpiod_toggle_active_low(struct gpio_desc *desc)
|
||||
{
|
||||
VALIDATE_DESC_VOID(desc);
|
||||
change_bit(FLAG_ACTIVE_LOW, &desc->flags);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
|
||||
|
||||
/* I/O calls are only valid after configuration completed; the relevant
|
||||
* "is this a valid GPIO" error checks should already have been done.
|
||||
*
|
||||
|
||||
@@ -1107,7 +1107,7 @@ static void mmc_blk_issue_discard_rq(struct mmc_queue *mq, struct request *req)
|
||||
card->erase_arg == MMC_TRIM_ARG ?
|
||||
INAND_CMD38_ARG_TRIM :
|
||||
INAND_CMD38_ARG_ERASE,
|
||||
0);
|
||||
card->ext_csd.generic_cmd6_time);
|
||||
}
|
||||
if (!err)
|
||||
err = mmc_erase(card, from, nr, card->erase_arg);
|
||||
@@ -1149,7 +1149,7 @@ retry:
|
||||
arg == MMC_SECURE_TRIM1_ARG ?
|
||||
INAND_CMD38_ARG_SECTRIM1 :
|
||||
INAND_CMD38_ARG_SECERASE,
|
||||
0);
|
||||
card->ext_csd.generic_cmd6_time);
|
||||
if (err)
|
||||
goto out_retry;
|
||||
}
|
||||
@@ -1167,7 +1167,7 @@ retry:
|
||||
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
|
||||
INAND_CMD38_ARG_EXT_CSD,
|
||||
INAND_CMD38_ARG_SECTRIM2,
|
||||
0);
|
||||
card->ext_csd.generic_cmd6_time);
|
||||
if (err)
|
||||
goto out_retry;
|
||||
}
|
||||
|
||||
@@ -2330,7 +2330,13 @@ void mmc_rescan(struct work_struct *work)
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(freqs); i++) {
|
||||
if (!mmc_rescan_try_freq(host, max(freqs[i], host->f_min)))
|
||||
unsigned int freq = freqs[i];
|
||||
if (freq > host->f_max) {
|
||||
if (i + 1 < ARRAY_SIZE(freqs))
|
||||
continue;
|
||||
freq = host->f_max;
|
||||
}
|
||||
if (!mmc_rescan_try_freq(host, max(freq, host->f_min)))
|
||||
break;
|
||||
if (freqs[i] <= host->f_min)
|
||||
break;
|
||||
@@ -2344,7 +2350,7 @@ void mmc_rescan(struct work_struct *work)
|
||||
|
||||
void mmc_start_host(struct mmc_host *host)
|
||||
{
|
||||
host->f_init = max(freqs[0], host->f_min);
|
||||
host->f_init = max(min(freqs[0], host->f_max), host->f_min);
|
||||
host->rescan_disable = 0;
|
||||
host->ios.power_mode = MMC_POWER_UNDEFINED;
|
||||
|
||||
|
||||
+8
-25
@@ -175,8 +175,6 @@ int mmc_of_parse(struct mmc_host *host)
|
||||
struct device *dev = host->parent;
|
||||
u32 bus_width, drv_type, cd_debounce_delay_ms;
|
||||
int ret;
|
||||
bool cd_cap_invert, cd_gpio_invert = false;
|
||||
bool ro_cap_invert, ro_gpio_invert = false;
|
||||
|
||||
if (!dev || !dev_fwnode(dev))
|
||||
return 0;
|
||||
@@ -219,10 +217,12 @@ int mmc_of_parse(struct mmc_host *host)
|
||||
*/
|
||||
|
||||
/* Parse Card Detection */
|
||||
|
||||
if (device_property_read_bool(dev, "non-removable")) {
|
||||
host->caps |= MMC_CAP_NONREMOVABLE;
|
||||
} else {
|
||||
cd_cap_invert = device_property_read_bool(dev, "cd-inverted");
|
||||
if (device_property_read_bool(dev, "cd-inverted"))
|
||||
host->caps2 |= MMC_CAP2_CD_ACTIVE_HIGH;
|
||||
|
||||
if (device_property_read_u32(dev, "cd-debounce-delay-ms",
|
||||
&cd_debounce_delay_ms))
|
||||
@@ -232,32 +232,19 @@ int mmc_of_parse(struct mmc_host *host)
|
||||
host->caps |= MMC_CAP_NEEDS_POLL;
|
||||
|
||||
ret = mmc_gpiod_request_cd(host, "cd", 0, false,
|
||||
cd_debounce_delay_ms * 1000,
|
||||
&cd_gpio_invert);
|
||||
cd_debounce_delay_ms * 1000);
|
||||
if (!ret)
|
||||
dev_info(host->parent, "Got CD GPIO\n");
|
||||
else if (ret != -ENOENT && ret != -ENOSYS)
|
||||
return ret;
|
||||
|
||||
/*
|
||||
* There are two ways to flag that the CD line is inverted:
|
||||
* through the cd-inverted flag and by the GPIO line itself
|
||||
* being inverted from the GPIO subsystem. This is a leftover
|
||||
* from the times when the GPIO subsystem did not make it
|
||||
* possible to flag a line as inverted.
|
||||
*
|
||||
* If the capability on the host AND the GPIO line are
|
||||
* both inverted, the end result is that the CD line is
|
||||
* not inverted.
|
||||
*/
|
||||
if (cd_cap_invert ^ cd_gpio_invert)
|
||||
host->caps2 |= MMC_CAP2_CD_ACTIVE_HIGH;
|
||||
}
|
||||
|
||||
/* Parse Write Protection */
|
||||
ro_cap_invert = device_property_read_bool(dev, "wp-inverted");
|
||||
|
||||
ret = mmc_gpiod_request_ro(host, "wp", 0, 0, &ro_gpio_invert);
|
||||
if (device_property_read_bool(dev, "wp-inverted"))
|
||||
host->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH;
|
||||
|
||||
ret = mmc_gpiod_request_ro(host, "wp", 0, 0);
|
||||
if (!ret)
|
||||
dev_info(host->parent, "Got WP GPIO\n");
|
||||
else if (ret != -ENOENT && ret != -ENOSYS)
|
||||
@@ -266,10 +253,6 @@ int mmc_of_parse(struct mmc_host *host)
|
||||
if (device_property_read_bool(dev, "disable-wp"))
|
||||
host->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
|
||||
|
||||
/* See the comment on CD inversion above */
|
||||
if (ro_cap_invert ^ ro_gpio_invert)
|
||||
host->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH;
|
||||
|
||||
if (device_property_read_bool(dev, "cap-sd-highspeed"))
|
||||
host->caps |= MMC_CAP_SD_HIGHSPEED;
|
||||
if (device_property_read_bool(dev, "cap-mmc-highspeed"))
|
||||
|
||||
+17
-17
@@ -19,7 +19,9 @@
|
||||
#include "host.h"
|
||||
#include "mmc_ops.h"
|
||||
|
||||
#define MMC_OPS_TIMEOUT_MS (10 * 60 * 1000) /* 10 minute timeout */
|
||||
#define MMC_OPS_TIMEOUT_MS (10 * 60 * 1000) /* 10min*/
|
||||
#define MMC_BKOPS_TIMEOUT_MS (120 * 1000) /* 120s */
|
||||
#define MMC_CACHE_FLUSH_TIMEOUT_MS (30 * 1000) /* 30s */
|
||||
|
||||
static const u8 tuning_blk_pattern_4bit[] = {
|
||||
0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
|
||||
@@ -458,10 +460,6 @@ static int mmc_poll_for_busy(struct mmc_card *card, unsigned int timeout_ms,
|
||||
bool expired = false;
|
||||
bool busy = false;
|
||||
|
||||
/* We have an unspecified cmd timeout, use the fallback value. */
|
||||
if (!timeout_ms)
|
||||
timeout_ms = MMC_OPS_TIMEOUT_MS;
|
||||
|
||||
/*
|
||||
* In cases when not allowed to poll by using CMD13 or because we aren't
|
||||
* capable of polling by using ->card_busy(), then rely on waiting the
|
||||
@@ -534,14 +532,19 @@ int __mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value,
|
||||
|
||||
mmc_retune_hold(host);
|
||||
|
||||
if (!timeout_ms) {
|
||||
pr_warn("%s: unspecified timeout for CMD6 - use generic\n",
|
||||
mmc_hostname(host));
|
||||
timeout_ms = card->ext_csd.generic_cmd6_time;
|
||||
}
|
||||
|
||||
/*
|
||||
* If the cmd timeout and the max_busy_timeout of the host are both
|
||||
* specified, let's validate them. A failure means we need to prevent
|
||||
* the host from doing hw busy detection, which is done by converting
|
||||
* to a R1 response instead of a R1B.
|
||||
* If the max_busy_timeout of the host is specified, make sure it's
|
||||
* enough to fit the used timeout_ms. In case it's not, let's instruct
|
||||
* the host to avoid HW busy detection, by converting to a R1 response
|
||||
* instead of a R1B.
|
||||
*/
|
||||
if (timeout_ms && host->max_busy_timeout &&
|
||||
(timeout_ms > host->max_busy_timeout))
|
||||
if (host->max_busy_timeout && (timeout_ms > host->max_busy_timeout))
|
||||
use_r1b_resp = false;
|
||||
|
||||
cmd.opcode = MMC_SWITCH;
|
||||
@@ -552,10 +555,6 @@ int __mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value,
|
||||
cmd.flags = MMC_CMD_AC;
|
||||
if (use_r1b_resp) {
|
||||
cmd.flags |= MMC_RSP_SPI_R1B | MMC_RSP_R1B;
|
||||
/*
|
||||
* A busy_timeout of zero means the host can decide to use
|
||||
* whatever value it finds suitable.
|
||||
*/
|
||||
cmd.busy_timeout = timeout_ms;
|
||||
} else {
|
||||
cmd.flags |= MMC_RSP_SPI_R1 | MMC_RSP_R1;
|
||||
@@ -941,7 +940,7 @@ void mmc_run_bkops(struct mmc_card *card)
|
||||
* urgent levels by using an asynchronous background task, when idle.
|
||||
*/
|
||||
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
|
||||
EXT_CSD_BKOPS_START, 1, MMC_OPS_TIMEOUT_MS);
|
||||
EXT_CSD_BKOPS_START, 1, MMC_BKOPS_TIMEOUT_MS);
|
||||
if (err)
|
||||
pr_warn("%s: Error %d starting bkops\n",
|
||||
mmc_hostname(card->host), err);
|
||||
@@ -961,7 +960,8 @@ int mmc_flush_cache(struct mmc_card *card)
|
||||
(card->ext_csd.cache_size > 0) &&
|
||||
(card->ext_csd.cache_ctrl & 1)) {
|
||||
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
|
||||
EXT_CSD_FLUSH_CACHE, 1, 0);
|
||||
EXT_CSD_FLUSH_CACHE, 1,
|
||||
MMC_CACHE_FLUSH_TIMEOUT_MS);
|
||||
if (err)
|
||||
pr_err("%s: cache flush error %d\n",
|
||||
mmc_hostname(card->host), err);
|
||||
|
||||
@@ -19,7 +19,6 @@
|
||||
struct mmc_gpio {
|
||||
struct gpio_desc *ro_gpio;
|
||||
struct gpio_desc *cd_gpio;
|
||||
bool override_cd_active_level;
|
||||
irqreturn_t (*cd_gpio_isr)(int irq, void *dev_id);
|
||||
char *ro_label;
|
||||
char *cd_label;
|
||||
@@ -80,13 +79,6 @@ int mmc_gpio_get_cd(struct mmc_host *host)
|
||||
return -ENOSYS;
|
||||
|
||||
cansleep = gpiod_cansleep(ctx->cd_gpio);
|
||||
if (ctx->override_cd_active_level) {
|
||||
int value = cansleep ?
|
||||
gpiod_get_raw_value_cansleep(ctx->cd_gpio) :
|
||||
gpiod_get_raw_value(ctx->cd_gpio);
|
||||
return !value ^ !!(host->caps2 & MMC_CAP2_CD_ACTIVE_HIGH);
|
||||
}
|
||||
|
||||
return cansleep ?
|
||||
gpiod_get_value_cansleep(ctx->cd_gpio) :
|
||||
gpiod_get_value(ctx->cd_gpio);
|
||||
@@ -168,8 +160,6 @@ EXPORT_SYMBOL(mmc_gpio_set_cd_isr);
|
||||
* @idx: index of the GPIO to obtain in the consumer
|
||||
* @override_active_level: ignore %GPIO_ACTIVE_LOW flag
|
||||
* @debounce: debounce time in microseconds
|
||||
* @gpio_invert: will return whether the GPIO line is inverted or not, set
|
||||
* to NULL to ignore
|
||||
*
|
||||
* Note that this must be called prior to mmc_add_host()
|
||||
* otherwise the caller must also call mmc_gpiod_request_cd_irq().
|
||||
@@ -178,7 +168,7 @@ EXPORT_SYMBOL(mmc_gpio_set_cd_isr);
|
||||
*/
|
||||
int mmc_gpiod_request_cd(struct mmc_host *host, const char *con_id,
|
||||
unsigned int idx, bool override_active_level,
|
||||
unsigned int debounce, bool *gpio_invert)
|
||||
unsigned int debounce)
|
||||
{
|
||||
struct mmc_gpio *ctx = host->slot.handler_priv;
|
||||
struct gpio_desc *desc;
|
||||
@@ -194,10 +184,14 @@ int mmc_gpiod_request_cd(struct mmc_host *host, const char *con_id,
|
||||
ctx->cd_debounce_delay_ms = debounce / 1000;
|
||||
}
|
||||
|
||||
if (gpio_invert)
|
||||
*gpio_invert = !gpiod_is_active_low(desc);
|
||||
/* override forces default (active-low) polarity ... */
|
||||
if (override_active_level && !gpiod_is_active_low(desc))
|
||||
gpiod_toggle_active_low(desc);
|
||||
|
||||
/* ... or active-high */
|
||||
if (host->caps2 & MMC_CAP2_CD_ACTIVE_HIGH)
|
||||
gpiod_toggle_active_low(desc);
|
||||
|
||||
ctx->override_cd_active_level = override_active_level;
|
||||
ctx->cd_gpio = desc;
|
||||
|
||||
return 0;
|
||||
@@ -218,14 +212,11 @@ EXPORT_SYMBOL(mmc_can_gpio_cd);
|
||||
* @con_id: function within the GPIO consumer
|
||||
* @idx: index of the GPIO to obtain in the consumer
|
||||
* @debounce: debounce time in microseconds
|
||||
* @gpio_invert: will return whether the GPIO line is inverted or not,
|
||||
* set to NULL to ignore
|
||||
*
|
||||
* Returns zero on success, else an error.
|
||||
*/
|
||||
int mmc_gpiod_request_ro(struct mmc_host *host, const char *con_id,
|
||||
unsigned int idx,
|
||||
unsigned int debounce, bool *gpio_invert)
|
||||
unsigned int idx, unsigned int debounce)
|
||||
{
|
||||
struct mmc_gpio *ctx = host->slot.handler_priv;
|
||||
struct gpio_desc *desc;
|
||||
@@ -241,8 +232,8 @@ int mmc_gpiod_request_ro(struct mmc_host *host, const char *con_id,
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (gpio_invert)
|
||||
*gpio_invert = !gpiod_is_active_low(desc);
|
||||
if (host->caps2 & MMC_CAP2_RO_ACTIVE_HIGH)
|
||||
gpiod_toggle_active_low(desc);
|
||||
|
||||
ctx->ro_gpio = desc;
|
||||
|
||||
|
||||
@@ -501,6 +501,7 @@ config MMC_SDHCI_MSM
|
||||
depends on ARCH_QCOM || (ARM && COMPILE_TEST)
|
||||
depends on MMC_SDHCI_PLTFM
|
||||
select MMC_SDHCI_IO_ACCESSORS
|
||||
select MMC_CQHCI
|
||||
help
|
||||
This selects the Secure Digital Host Controller Interface (SDHCI)
|
||||
support present in Qualcomm SOCs. The controller supports
|
||||
@@ -990,6 +991,7 @@ config MMC_SDHCI_BRCMSTB
|
||||
tristate "Broadcom SDIO/SD/MMC support"
|
||||
depends on ARCH_BRCMSTB || BMIPS_GENERIC
|
||||
depends on MMC_SDHCI_PLTFM
|
||||
select MMC_CQHCI
|
||||
default y
|
||||
help
|
||||
This selects support for the SDIO/SD/MMC Host Controller on
|
||||
@@ -1010,6 +1012,7 @@ config MMC_SDHCI_OMAP
|
||||
depends on MMC_SDHCI_PLTFM && OF
|
||||
select THERMAL
|
||||
imply TI_SOC_THERMAL
|
||||
select MMC_SDHCI_EXTERNAL_DMA if DMA_ENGINE
|
||||
help
|
||||
This selects the Secure Digital Host Controller Interface (SDHCI)
|
||||
support present in TI's DRA7 SOCs. The controller supports
|
||||
@@ -1040,3 +1043,6 @@ config MMC_OWL
|
||||
help
|
||||
This selects support for the SD/MMC Host Controller on
|
||||
Actions Semi Owl SoCs.
|
||||
|
||||
config MMC_SDHCI_EXTERNAL_DMA
|
||||
bool
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user