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https://github.com/suyu-emu/horinux.git
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Merge tag 'edac_for_3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
Pull EDAC updates from Borislav Petkov: - a new synopsys_edac.c driver for the Synopsys DDR controller, from Punnaiah Choudary Kalluri. - minor fixes/cleanups all around - Mauro and I are adding the repo URLs to MAINTAINERS since people asked for trees to base upcoming work on. * tag 'edac_for_3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: EDAC: Add repo URLs to MAINTAINERS EDAC, mv64x60_edac: Fix an error code in probe() EDAC: edac_mc_sysfs: Make stuff static EDAC: Fix the leak of mci->bus->name when bus_register fails edac: i5100_edac: Remove unused i5100_recmema_dm_buf_id EDAC, synps: Add EDAC support for zynq ddr ecc controller mpc85xx_edac: Fix a typo in comments EDAC, mce_amd_inj: Fix sparse non static symbol warning
This commit is contained in:
@@ -1586,6 +1586,7 @@ N: xilinx
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F: drivers/clocksource/cadence_ttc_timer.c
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F: drivers/i2c/busses/i2c-cadence.c
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F: drivers/mmc/host/sdhci-of-arasan.c
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F: drivers/edac/synopsys_edac.c
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ARM SMMU DRIVER
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M: Will Deacon <will.deacon@arm.com>
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@@ -3513,6 +3514,8 @@ M: Borislav Petkov <bp@alien8.de>
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M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
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L: linux-edac@vger.kernel.org
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W: bluesmoke.sourceforge.net
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T: git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git#for-next
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T: git://git.kernel.org/pub/linux/kernel/git/mchehab/linux-edac.git#linux_next
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S: Supported
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F: Documentation/edac.txt
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F: drivers/edac/
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@@ -385,4 +385,11 @@ config EDAC_ALTERA_MC
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preloader must initialize the SDRAM before loading
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the kernel.
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config EDAC_SYNOPSYS
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tristate "Synopsys DDR Memory Controller"
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depends on EDAC_MM_EDAC && ARCH_ZYNQ
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help
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Support for error detection and correction on the Synopsys DDR
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memory controller.
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endif # EDAC
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@@ -67,3 +67,4 @@ obj-$(CONFIG_EDAC_OCTEON_LMC) += octeon_edac-lmc.o
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obj-$(CONFIG_EDAC_OCTEON_PCI) += octeon_edac-pci.o
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obj-$(CONFIG_EDAC_ALTERA_MC) += altera_edac.o
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obj-$(CONFIG_EDAC_SYNOPSYS) += synopsys_edac.o
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@@ -157,7 +157,7 @@ struct dev_ch_attribute {
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};
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#define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
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struct dev_ch_attribute dev_attr_legacy_##_name = \
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static struct dev_ch_attribute dev_attr_legacy_##_name = \
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{ __ATTR(_name, _mode, _show, _store), (_var) }
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#define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
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@@ -850,20 +850,20 @@ static const struct file_operations debug_fake_inject_fops = {
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#endif
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/* default Control file */
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DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
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static DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
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/* default Attribute files */
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DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
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DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
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DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
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DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
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DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
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DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
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DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
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DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
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static DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
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static DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
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static DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
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static DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
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static DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
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static DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
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static DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
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static DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
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/* memory scrubber attribute file */
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DEVICE_ATTR(sdram_scrub_rate, 0, NULL, NULL);
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static DEVICE_ATTR(sdram_scrub_rate, 0, NULL, NULL);
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static struct attribute *mci_attrs[] = {
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&dev_attr_reset_counters.attr,
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@@ -989,7 +989,7 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
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err = bus_register(mci->bus);
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if (err < 0)
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return err;
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goto fail_free_name;
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/* get the /sys/devices/system/edac subsys reference */
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mci->dev.type = &mci_attr_type;
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@@ -1005,9 +1005,7 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
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err = device_add(&mci->dev);
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if (err < 0) {
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edac_dbg(1, "failure: create device %s\n", dev_name(&mci->dev));
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bus_unregister(mci->bus);
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kfree(mci->bus->name);
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return err;
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goto fail_unregister_bus;
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}
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if (mci->set_sdram_scrub_rate || mci->get_sdram_scrub_rate) {
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@@ -1015,15 +1013,16 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
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dev_attr_sdram_scrub_rate.attr.mode |= S_IRUGO;
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dev_attr_sdram_scrub_rate.show = &mci_sdram_scrub_rate_show;
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}
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if (mci->set_sdram_scrub_rate) {
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dev_attr_sdram_scrub_rate.attr.mode |= S_IWUSR;
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dev_attr_sdram_scrub_rate.store = &mci_sdram_scrub_rate_store;
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}
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err = device_create_file(&mci->dev,
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&dev_attr_sdram_scrub_rate);
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err = device_create_file(&mci->dev, &dev_attr_sdram_scrub_rate);
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if (err) {
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edac_dbg(1, "failure: create sdram_scrub_rate\n");
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goto fail2;
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goto fail_unregister_dev;
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}
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}
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/*
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@@ -1032,8 +1031,9 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
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for (i = 0; i < mci->tot_dimms; i++) {
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struct dimm_info *dimm = mci->dimms[i];
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/* Only expose populated DIMMs */
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if (dimm->nr_pages == 0)
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if (!dimm->nr_pages)
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continue;
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#ifdef CONFIG_EDAC_DEBUG
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edac_dbg(1, "creating dimm%d, located at ", i);
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if (edac_debug_level >= 1) {
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@@ -1048,14 +1048,14 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
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err = edac_create_dimm_object(mci, dimm, i);
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if (err) {
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edac_dbg(1, "failure: create dimm %d obj\n", i);
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goto fail;
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goto fail_unregister_dimm;
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}
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}
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#ifdef CONFIG_EDAC_LEGACY_SYSFS
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err = edac_create_csrow_objects(mci);
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if (err < 0)
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goto fail;
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goto fail_unregister_dimm;
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#endif
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#ifdef CONFIG_EDAC_DEBUG
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@@ -1063,16 +1063,19 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
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#endif
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return 0;
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fail:
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fail_unregister_dimm:
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for (i--; i >= 0; i--) {
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struct dimm_info *dimm = mci->dimms[i];
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if (dimm->nr_pages == 0)
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if (!dimm->nr_pages)
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continue;
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device_unregister(&dimm->dev);
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}
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fail2:
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fail_unregister_dev:
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device_unregister(&mci->dev);
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fail_unregister_bus:
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bus_unregister(mci->bus);
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fail_free_name:
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kfree(mci->bus->name);
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return err;
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}
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@@ -279,11 +279,6 @@ static inline u32 i5100_recmema_rank(u32 a)
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return i5100_nrecmema_rank(a);
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}
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static inline u32 i5100_recmema_dm_buf_id(u32 a)
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{
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return i5100_nrecmema_dm_buf_id(a);
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}
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static inline u32 i5100_recmemb_cas(u32 a)
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{
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return i5100_nrecmemb_cas(a);
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@@ -197,7 +197,7 @@ static int inj_bank_get(void *data, u64 *val)
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DEFINE_SIMPLE_ATTRIBUTE(bank_fops, inj_bank_get, inj_bank_set, "%llu\n");
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struct dfs_node {
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static struct dfs_node {
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char *name;
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struct dentry *d;
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const struct file_operations *fops;
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@@ -1,5 +1,5 @@
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/*
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* Freescale MPC85xx Memory Controller kenel module
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* Freescale MPC85xx Memory Controller kernel module
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*
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* Parts Copyrighted (c) 2013 by Freescale Semiconductor, Inc.
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*
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@@ -1,5 +1,5 @@
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/*
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* Freescale MPC85xx Memory Controller kenel module
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* Freescale MPC85xx Memory Controller kernel module
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* Author: Dave Jiang <djiang@mvista.com>
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*
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* 2006-2007 (c) MontaVista Software, Inc. This file is licensed under
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@@ -789,7 +789,8 @@ static int mv64x60_mc_err_probe(struct platform_device *pdev)
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ctl = (ctl & 0xff00ffff) | 0x10000;
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out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL, ctl);
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if (edac_mc_add_mc(mci)) {
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res = edac_mc_add_mc(mci);
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if (res) {
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edac_dbg(3, "failed edac_mc_add_mc()\n");
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goto err;
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}
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