mirror of
https://github.com/suyu-emu/horinux.git
synced 2026-09-21 14:15:21 -07:00
Merge tag 'libnvdimm-for-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm
Pull libnvdimm updates from Dan Williams:
"This update has successfully completed a 0day-kbuild run and has
appeared in a linux-next release. The changes outside of the typical
drivers/nvdimm/ and drivers/acpi/nfit.[ch] paths are related to the
removal of IORESOURCE_CACHEABLE, the introduction of memremap(), and
the introduction of ZONE_DEVICE + devm_memremap_pages().
Summary:
- Introduce ZONE_DEVICE and devm_memremap_pages() as a generic
mechanism for adding device-driver-discovered memory regions to the
kernel's direct map.
This facility is used by the pmem driver to enable pfn_to_page()
operations on the page frames returned by DAX ('direct_access' in
'struct block_device_operations').
For now, the 'memmap' allocation for these "device" pages comes
from "System RAM". Support for allocating the memmap from device
memory will arrive in a later kernel.
- Introduce memremap() to replace usages of ioremap_cache() and
ioremap_wt(). memremap() drops the __iomem annotation for these
mappings to memory that do not have i/o side effects. The
replacement of ioremap_cache() with memremap() is limited to the
pmem driver to ease merging the api change in v4.3.
Completion of the conversion is targeted for v4.4.
- Similar to the usage of memcpy_to_pmem() + wmb_pmem() in the pmem
driver, update the VFS DAX implementation and PMEM api to provide
persistence guarantees for kernel operations on a DAX mapping.
- Convert the ACPI NFIT 'BLK' driver to map the block apertures as
cacheable to improve performance.
- Miscellaneous updates and fixes to libnvdimm including support for
issuing "address range scrub" commands, clarifying the optimal
'sector size' of pmem devices, a clarification of the usage of the
ACPI '_STA' (status) property for DIMM devices, and other minor
fixes"
* tag 'libnvdimm-for-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm: (34 commits)
libnvdimm, pmem: direct map legacy pmem by default
libnvdimm, pmem: 'struct page' for pmem
libnvdimm, pfn: 'struct page' provider infrastructure
x86, pmem: clarify that ARCH_HAS_PMEM_API implies PMEM mapped WB
add devm_memremap_pages
mm: ZONE_DEVICE for "device memory"
mm: move __phys_to_pfn and __pfn_to_phys to asm/generic/memory_model.h
dax: drop size parameter to ->direct_access()
nd_blk: change aperture mapping from WC to WB
nvdimm: change to use generic kvfree()
pmem, dax: have direct_access use __pmem annotation
dax: update I/O path to do proper PMEM flushing
pmem: add copy_from_iter_pmem() and clear_pmem()
pmem, x86: clean up conditional pmem includes
pmem: remove layer when calling arch_has_wmb_pmem()
pmem, x86: move x86 PMEM API to new pmem.h header
libnvdimm, e820: make CONFIG_X86_PMEM_LEGACY a tristate option
pmem: switch to devm_ allocations
devres: add devm_memremap
libnvdimm, btt: write and validate parent_uuid
...
This commit is contained in:
@@ -397,7 +397,8 @@ prototypes:
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int (*release) (struct gendisk *, fmode_t);
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int (*ioctl) (struct block_device *, fmode_t, unsigned, unsigned long);
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int (*compat_ioctl) (struct block_device *, fmode_t, unsigned, unsigned long);
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int (*direct_access) (struct block_device *, sector_t, void **, unsigned long *);
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int (*direct_access) (struct block_device *, sector_t, void __pmem **,
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unsigned long *);
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int (*media_changed) (struct gendisk *);
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void (*unlock_native_capacity) (struct gendisk *);
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int (*revalidate_disk) (struct gendisk *);
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@@ -6229,6 +6229,7 @@ Q: https://patchwork.kernel.org/project/linux-nvdimm/list/
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S: Supported
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F: drivers/nvdimm/pmem.c
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F: include/linux/pmem.h
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F: arch/*/include/asm/pmem.h
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LINUX FOR IBM pSERIES (RS/6000)
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M: Paul Mackerras <paulus@au.ibm.com>
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@@ -118,12 +118,6 @@
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#define DTCM_OFFSET UL(0xfffe8000)
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#endif
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/*
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* Convert a physical address to a Page Frame Number and back
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*/
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#define __phys_to_pfn(paddr) ((unsigned long)((paddr) >> PAGE_SHIFT))
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#define __pfn_to_phys(pfn) ((phys_addr_t)(pfn) << PAGE_SHIFT)
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/*
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* Convert a page to/from a physical address
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*/
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@@ -95,7 +95,7 @@ static struct physmap_flash_data cdb89712_bootrom_pdata __initdata = {
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static struct resource cdb89712_bootrom_resources[] __initdata = {
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DEFINE_RES_NAMED(CS7_PHYS_BASE, SZ_128, "BOOTROM", IORESOURCE_MEM |
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IORESOURCE_CACHEABLE | IORESOURCE_READONLY),
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IORESOURCE_READONLY),
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};
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static struct platform_device cdb89712_bootrom_pdev __initdata = {
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@@ -12,7 +12,7 @@
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#include <linux/err.h>
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#include <linux/mm.h>
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#include <linux/spinlock.h>
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#include <asm/io.h>
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#include <linux/io.h>
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#include "pm-rcar.h"
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/* SYSC Common */
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@@ -80,12 +80,6 @@
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#define __virt_to_phys(x) (((phys_addr_t)(x) - PAGE_OFFSET + PHYS_OFFSET))
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#define __phys_to_virt(x) ((unsigned long)((x) - PHYS_OFFSET + PAGE_OFFSET))
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/*
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* Convert a physical address to a Page Frame Number and back
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*/
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#define __phys_to_pfn(paddr) ((unsigned long)((paddr) >> PAGE_SHIFT))
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#define __pfn_to_phys(pfn) ((phys_addr_t)(pfn) << PAGE_SHIFT)
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/*
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* Convert a page to/from a physical address
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*/
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@@ -435,6 +435,7 @@ static inline void __iomem * ioremap_cache (unsigned long phys_addr, unsigned lo
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{
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return ioremap(phys_addr, size);
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}
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#define ioremap_cache ioremap_cache
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/*
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@@ -4,7 +4,7 @@
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#include <linux/errno.h>
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#include <linux/timex.h>
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#include <linux/clocksource.h>
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#include <asm/io.h>
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#include <linux/io.h>
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/* IBM Summit (EXA) Cyclone counter code*/
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#define CYCLONE_CBAR_ADDR 0xFEB00CD0
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+2
-2
@@ -645,7 +645,7 @@ mem_init (void)
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}
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#ifdef CONFIG_MEMORY_HOTPLUG
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int arch_add_memory(int nid, u64 start, u64 size)
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int arch_add_memory(int nid, u64 start, u64 size, bool for_device)
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{
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pg_data_t *pgdat;
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struct zone *zone;
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@@ -656,7 +656,7 @@ int arch_add_memory(int nid, u64 start, u64 size)
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pgdat = NODE_DATA(nid);
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zone = pgdat->node_zones +
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zone_for_memory(nid, start, size, ZONE_NORMAL);
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zone_for_memory(nid, start, size, ZONE_NORMAL, for_device);
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ret = __add_pages(nid, zone, start_pfn, nr_pages);
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if (ret)
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@@ -102,7 +102,7 @@ static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
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res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
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} else if (i == dev->rom_base_reg) {
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res = &dev->resource[PCI_ROM_RESOURCE];
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flags |= IORESOURCE_READONLY | IORESOURCE_CACHEABLE;
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flags |= IORESOURCE_READONLY;
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} else {
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printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
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continue;
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@@ -113,7 +113,7 @@ int memory_add_physaddr_to_nid(u64 start)
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}
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#endif
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int arch_add_memory(int nid, u64 start, u64 size)
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int arch_add_memory(int nid, u64 start, u64 size, bool for_device)
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{
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struct pglist_data *pgdata;
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struct zone *zone;
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@@ -128,7 +128,7 @@ int arch_add_memory(int nid, u64 start, u64 size)
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/* this should work for most non-highmem platforms */
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zone = pgdata->node_zones +
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zone_for_memory(nid, start, size, 0);
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zone_for_memory(nid, start, size, 0, for_device);
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return __add_pages(nid, zone, start_pfn, nr_pages);
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}
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@@ -141,13 +141,14 @@ axon_ram_make_request(struct request_queue *queue, struct bio *bio)
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*/
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static long
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axon_ram_direct_access(struct block_device *device, sector_t sector,
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void **kaddr, unsigned long *pfn, long size)
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void __pmem **kaddr, unsigned long *pfn)
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{
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struct axon_ram_bank *bank = device->bd_disk->private_data;
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loff_t offset = (loff_t)sector << AXON_RAM_SECTOR_SHIFT;
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void *addr = (void *)(bank->ph_addr + offset);
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*kaddr = (void *)(bank->ph_addr + offset);
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*pfn = virt_to_phys(*kaddr) >> PAGE_SHIFT;
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*kaddr = (void __pmem *)addr;
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*pfn = virt_to_phys(addr) >> PAGE_SHIFT;
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return bank->size - offset;
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}
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+1
-1
@@ -169,7 +169,7 @@ void __init free_initrd_mem(unsigned long start, unsigned long end)
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#endif
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#ifdef CONFIG_MEMORY_HOTPLUG
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int arch_add_memory(int nid, u64 start, u64 size)
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int arch_add_memory(int nid, u64 start, u64 size, bool for_device)
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{
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unsigned long normal_end_pfn = PFN_DOWN(memblock_end_of_DRAM());
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unsigned long dma_end_pfn = PFN_DOWN(MAX_DMA_ADDRESS);
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@@ -342,6 +342,7 @@ ioremap_cache(phys_addr_t offset, unsigned long size)
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{
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return __ioremap_mode(offset, size, PAGE_KERNEL);
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}
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#define ioremap_cache ioremap_cache
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#ifdef CONFIG_HAVE_IOREMAP_PROT
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static inline void __iomem *
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+3
-2
@@ -485,7 +485,7 @@ void free_initrd_mem(unsigned long start, unsigned long end)
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#endif
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#ifdef CONFIG_MEMORY_HOTPLUG
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int arch_add_memory(int nid, u64 start, u64 size)
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int arch_add_memory(int nid, u64 start, u64 size, bool for_device)
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{
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pg_data_t *pgdat;
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unsigned long start_pfn = PFN_DOWN(start);
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@@ -496,7 +496,8 @@ int arch_add_memory(int nid, u64 start, u64 size)
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/* We only have ZONE_NORMAL, so this is easy.. */
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ret = __add_pages(nid, pgdat->node_zones +
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zone_for_memory(nid, start, size, ZONE_NORMAL),
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zone_for_memory(nid, start, size, ZONE_NORMAL,
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for_device),
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start_pfn, nr_pages);
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if (unlikely(ret))
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printk("%s: Failed, __add_pages() == %d\n", __func__, ret);
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@@ -231,8 +231,7 @@ static void pci_parse_of_addrs(struct platform_device *op,
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res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
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} else if (i == dev->rom_base_reg) {
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res = &dev->resource[PCI_ROM_RESOURCE];
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flags |= IORESOURCE_READONLY | IORESOURCE_CACHEABLE
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| IORESOURCE_SIZEALIGN;
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flags |= IORESOURCE_READONLY | IORESOURCE_SIZEALIGN;
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} else {
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printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
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continue;
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+1
-1
@@ -863,7 +863,7 @@ void __init mem_init(void)
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* memory to the highmem for now.
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*/
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#ifndef CONFIG_NEED_MULTIPLE_NODES
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int arch_add_memory(u64 start, u64 size)
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int arch_add_memory(u64 start, u64 size, bool for_device)
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{
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struct pglist_data *pgdata = &contig_page_data;
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struct zone *zone = pgdata->node_zones + MAX_NR_ZONES-1;
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@@ -60,12 +60,6 @@
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#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET)
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#endif
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/*
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* Convert a physical address to a Page Frame Number and back
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*/
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#define __phys_to_pfn(paddr) ((paddr) >> PAGE_SHIFT)
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#define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT)
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/*
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* Convert a page to/from a physical address
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*/
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+7
-2
@@ -27,7 +27,8 @@ config X86
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select ARCH_HAS_ELF_RANDOMIZE
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select ARCH_HAS_FAST_MULTIPLIER
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select ARCH_HAS_GCOV_PROFILE_ALL
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select ARCH_HAS_PMEM_API
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select ARCH_HAS_PMEM_API if X86_64
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select ARCH_HAS_MMIO_FLUSH
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select ARCH_HAS_SG_CHAIN
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select ARCH_HAVE_NMI_SAFE_CMPXCHG
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select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI
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@@ -1450,10 +1451,14 @@ config ILLEGAL_POINTER_VALUE
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source "mm/Kconfig"
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config X86_PMEM_LEGACY_DEVICE
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bool
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config X86_PMEM_LEGACY
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bool "Support non-standard NVDIMMs and ADR protected memory"
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tristate "Support non-standard NVDIMMs and ADR protected memory"
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depends on PHYS_ADDR_T_64BIT
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depends on BLK_DEV
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select X86_PMEM_LEGACY_DEVICE
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select LIBNVDIMM
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help
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Treat memory marked using the non-standard e820 type of 12 as used
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@@ -89,6 +89,8 @@ int set_pages_rw(struct page *page, int numpages);
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void clflush_cache_range(void *addr, unsigned int size);
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#define mmio_flush_range(addr, size) clflush_cache_range(addr, size)
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#ifdef CONFIG_DEBUG_RODATA
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void mark_rodata_ro(void);
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extern const int rodata_test_data;
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@@ -109,75 +111,4 @@ static inline int rodata_test(void)
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}
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#endif
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#ifdef ARCH_HAS_NOCACHE_UACCESS
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/**
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* arch_memcpy_to_pmem - copy data to persistent memory
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* @dst: destination buffer for the copy
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* @src: source buffer for the copy
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* @n: length of the copy in bytes
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*
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* Copy data to persistent memory media via non-temporal stores so that
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* a subsequent arch_wmb_pmem() can flush cpu and memory controller
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* write buffers to guarantee durability.
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*/
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static inline void arch_memcpy_to_pmem(void __pmem *dst, const void *src,
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size_t n)
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{
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int unwritten;
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/*
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* We are copying between two kernel buffers, if
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* __copy_from_user_inatomic_nocache() returns an error (page
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* fault) we would have already reported a general protection fault
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* before the WARN+BUG.
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*/
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unwritten = __copy_from_user_inatomic_nocache((void __force *) dst,
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(void __user *) src, n);
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if (WARN(unwritten, "%s: fault copying %p <- %p unwritten: %d\n",
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__func__, dst, src, unwritten))
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BUG();
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}
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/**
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* arch_wmb_pmem - synchronize writes to persistent memory
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*
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* After a series of arch_memcpy_to_pmem() operations this drains data
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* from cpu write buffers and any platform (memory controller) buffers
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* to ensure that written data is durable on persistent memory media.
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*/
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static inline void arch_wmb_pmem(void)
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{
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/*
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* wmb() to 'sfence' all previous writes such that they are
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* architecturally visible to 'pcommit'. Note, that we've
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* already arranged for pmem writes to avoid the cache via
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* arch_memcpy_to_pmem().
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*/
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wmb();
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pcommit_sfence();
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}
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static inline bool __arch_has_wmb_pmem(void)
|
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{
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#ifdef CONFIG_X86_64
|
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/*
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* We require that wmb() be an 'sfence', that is only guaranteed on
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* 64-bit builds
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*/
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return static_cpu_has(X86_FEATURE_PCOMMIT);
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#else
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return false;
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#endif
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}
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#else /* ARCH_HAS_NOCACHE_UACCESS i.e. ARCH=um */
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extern void arch_memcpy_to_pmem(void __pmem *dst, const void *src, size_t n);
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extern void arch_wmb_pmem(void);
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|
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static inline bool __arch_has_wmb_pmem(void)
|
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{
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return false;
|
||||
}
|
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#endif
|
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|
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#endif /* _ASM_X86_CACHEFLUSH_H */
|
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|
||||
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