bootrom: fix mix of spaces & tabs

bootrom/flash-reset.s

@@ -12,40 +12,40 @@
 
 .global flashstart
 flashstart:
-	b	reset
-	b	undefined_instruction
-	b	software_interrupt
-	b	prefetch_abort
-	b	data_abort
-	b	. @reserved
-	ldr	pc, [pc,#-0xF20]	@ IRQ - read the AIC
-	b	fiq
+    b   reset
+    b   undefined_instruction
+    b   software_interrupt
+    b   prefetch_abort
+    b   data_abort
+    b   . @reserved
+    ldr pc, [pc,#-0xF20]    @ IRQ - read the AIC
+    b   fiq
 
 reset:
-	ldr	sp, =_stack_end		@ initialize stack pointer to top of RAM
+    ldr sp, =_stack_end     @ initialize stack pointer to top of RAM
 
-	@ copy bootloader to RAM (in case the user re-flashes the bootloader)
-	ldr	r0, =__bootphase2_src_start__
-	ldr	r1, =__bootphase2_start__
-	ldr	r2, =__bootphase2_end__
+    @ copy bootloader to RAM (in case the user re-flashes the bootloader)
+    ldr r0, =__bootphase2_src_start__
+    ldr r1, =__bootphase2_start__
+    ldr r2, =__bootphase2_end__
 1:
-	ldr	r3, [r0], #4
-	str	r3, [r1], #4
-	cmp	r1, r2
-	blo	1b
+    ldr r3, [r0], #4
+    str r3, [r1], #4
+    cmp r1, r2
+    blo 1b
 
-	ldr	r3, =ram_start		@ start address of RAM bootloader
-	bx	r3			@ jump to it
+    ldr r3, =ram_start      @ start address of RAM bootloader
+    bx  r3                  @ jump to it
 
-	.ltorg
+    .ltorg
 
 undefined_instruction:
-	b	.
+    b   .
 software_interrupt:
-	b	.
+    b   .
 prefetch_abort:
-	b	.
+    b   .
 data_abort:
-	b	.
+    b   .
 fiq:
-	b	.
+    b   .

bootrom/ldscript-flash

@@ -12,52 +12,52 @@ INCLUDE ../common/ldscript.common
 
 PHDRS
 {
-	phase1 PT_LOAD;
-	phase2 PT_LOAD;
-	bss PT_LOAD;
+    phase1 PT_LOAD;
+    phase2 PT_LOAD;
+    bss PT_LOAD;
 }
 
 ENTRY(flashstart)
 SECTIONS
 {
-	.bootphase1 : {
-		*(.startup)
+    .bootphase1 : {
+        *(.startup)
 
-		. = ALIGN(4);
-		_version_information_start = .;
-		KEEP(*(.version_information));
+        . = ALIGN(4);
+        _version_information_start = .;
+        KEEP(*(.version_information));
 
-		. = LENGTH(bootphase1) - 0x4;
-		LONG(_version_information_start);
-	} >bootphase1 :phase1
+        . = LENGTH(bootphase1) - 0x4;
+        LONG(_version_information_start);
+    } >bootphase1 :phase1
 
-	.bootphase2 : {
-		*(.startphase2)
-		*(.text)
-		*(.text.*)
-		*(.eh_frame)
-		*(.glue_7)
-		*(.glue_7t)
-		*(.rodata)
-		*(.rodata.*)
-		*(.data)
-		*(.data.*)
-		. = ALIGN(4);
-	} >ram AT>bootphase2 :phase2
+    .bootphase2 : {
+        *(.startphase2)
+        *(.text)
+        *(.text.*)
+        *(.eh_frame)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.rodata)
+        *(.rodata.*)
+        *(.data)
+        *(.data.*)
+        . = ALIGN(4);
+    } >ram AT>bootphase2 :phase2
 
-	__bootphase2_src_start__ = LOADADDR(.bootphase2);
-	__bootphase2_start__ = ADDR(.bootphase2);
-	__bootphase2_end__ = __bootphase2_start__ + SIZEOF(.bootphase2);
+    __bootphase2_src_start__ = LOADADDR(.bootphase2);
+    __bootphase2_start__ = ADDR(.bootphase2);
+    __bootphase2_end__ = __bootphase2_start__ + SIZEOF(.bootphase2);
 
-	.bss : {
-		__bss_start__ = .;
-		*(.bss)
-		*(.bss.*)
-		. = ALIGN(4);
-		__bss_end__ = .;
-	} >ram AT>ram :bss
+    .bss : {
+        __bss_start__ = .;
+        *(.bss)
+        *(.bss.*)
+        . = ALIGN(4);
+        __bss_end__ = .;
+    } >ram AT>ram :bss
 
-	.commonarea (NOLOAD) : {
-		*(.commonarea)
-	} >commonarea
+    .commonarea (NOLOAD) : {
+        *(.commonarea)
+    } >commonarea
 }

bootrom/ram-reset.s

@@ -14,7 +14,7 @@
 
 .global ram_start
 ram_start:
-	ldr	sp,     =_stack_end
-	bl	BootROM
+    ldr sp,     =_stack_end
+    bl  BootROM
 
-	.ltorg
+    .ltorg