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Fixed a bug where the wrong SPI mode for the external dataflash has been used in Memory.c/.h

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This commit is contained in:
Simon Küppers
2014-05-11 13:19:56 +02:00
parent 61ba84148c
commit 1232afc470
8 changed files with 13142 additions and 14045 deletions
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Firmware/Chameleon-Mini/Chameleon-Mini.bin
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Firmware/Chameleon-Mini/Chameleon-Mini.eep
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@@ -1,3 +1,3 @@
:100000000010210600060006000600060006000695
:1000000000002106000600060006000600060006A5
:03001000000600E7
:00000001FF
Firmware/Chameleon-Mini/Chameleon-Mini.elf
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Firmware/Chameleon-Mini/Chameleon-Mini.hex
+1199 -1261
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Firmware/Chameleon-Mini/Chameleon-Mini.lss
+10215 -11178
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Firmware/Chameleon-Mini/Chameleon-Mini.map
+1467 -1352
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Firmware/Chameleon-Mini/Chameleon-Mini.sym
+255 -252
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Firmware/Chameleon-Mini/Memory.c
+5 -1
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@@ -217,11 +217,15 @@ void MemoryInit(void)
{
/* Configure MEMORY_FLASH_USART for SPI master mode 0 with maximum clock frequency */
MEMORY_FLASH_PORT.OUTSET = MEMORY_FLASH_CS;
MEMORY_FLASH_PORT.OUTCLR = MEMORY_FLASH_SCK;
MEMORY_FLASH_PORT.OUTSET = MEMORY_FLASH_MOSI;
MEMORY_FLASH_PORT.DIRSET = MEMORY_FLASH_SCK | MEMORY_FLASH_MOSI | MEMORY_FLASH_CS;
MEMORY_FLASH_USART.BAUDCTRLA = 0;
MEMORY_FLASH_USART.BAUDCTRLB = 0;
MEMORY_FLASH_USART.CTRLC = USART_CMODE_MSPI_gc | USART_CHSIZE_8BIT_gc;
MEMORY_FLASH_USART.CTRLC = USART_CMODE_MSPI_gc;
MEMORY_FLASH_USART.CTRLB = USART_RXEN_bm | USART_TXEN_bm;