97 Commits
Author SHA1 Message Date
Andrei Vagin af92292ac8 Fix typos 2024-05-02 11:09:16 -07:00
Fabricio VoznikaandgVisor bot c087777e37 Plumb restore context to afterLoad()
This allows for external information to be passed to restore code, like
host FDs to be remapped.

Updates #1956

PiperOrigin-RevId: 612540749
2024-03-04 12:21:50 -08:00
Jamie LiuandgVisor bot aecf514158 Don't XSAVE PKRU state.
We don't implement any of the `pkey_*` syscalls, so applications can't use
protection keys.

Updates #10087

PiperOrigin-RevId: 611287272
2024-02-28 17:47:27 -08:00
Jamie LiuandgVisor bot 59a057980d Minor FPU save/restore fixes.
- Use the correct instruction in safecopy.checkXstate(). Before this CL:

```
TEXT pkg/sentry/arch/fpu/fpu.initX86FPState.abi0(SB)
  ...
  fpu_amd64.s:78        0x7661b2                480fae2f                XRSTOR64 0(DI)

TEXT pkg/safecopy/safecopy.checkXstate.abi0(SB)
  ...
  xrstor_amd64.s:54     0x7648a0                0fae2f                  XRSTOR 0(DI)
```

I'm not sure what the actual difference between XRSTOR and XRSTOR64 is, but
Linux is careful to use XRSTOR64 (arch/x86/kernel/fpu/xstate.h:XRSTOR,
REX_PREFIX) so it probably matters.

- When an AfterLoad callback fails, log the error message before the failing
  object, since the latter can be huge and prevent the error message from being
  logged.

- Include additional information in the error message emitted by
  fpu.State.AfterLoad().

PiperOrigin-RevId: 605534648
2024-02-08 23:11:09 -08:00
Konstantin BogomolovandgVisor bot bb84006816 Fixup AMX workaround for ptrace.
SETREGSET/GETREGSET expect AMX portions of fpstate to always be used.
For this reason we need to allocate enough memory for this to happen,
even if we never populate the AMX portions within initX86FPState.

PiperOrigin-RevId: 599702181
2024-01-18 20:12:31 -08:00
Konstantin BogomolovandgVisor bot e9bdc76c02 Exclude AMX extended state from being xsave/xrstor'd.
For now we are going to completely disable using AMX, so we will
always subtract extended state size reserved from AMX from the rest
of the extended state size, and hardcode the AMX XCR0 bits to be
always off.

Fixes #9750.

PiperOrigin-RevId: 599302059
2024-01-17 15:11:03 -08:00
Konstantin BogomolovandgVisor bot 48fcf0a207 Initialize x86 arch.Context with correct segment registers.
Fixes #9805.

PiperOrigin-RevId: 591010934
2023-12-14 11:59:17 -08:00
prof awk 4d30f2c9ef use new clear builtin to clear bufs 2023-11-27 19:43:25 +02:00
Kevin KrakauerandgVisor bot d01751e25e sentry: use a stronger RNG for address space randomization
Since everything fits inside an int64, we avoid using crypto/rand.Int, which
can allocate and uses the much more complex big.Int.

PiperOrigin-RevId: 580050587
2023-11-06 21:57:14 -08:00
Andrei Vagin 5f4abad306 Fix a few typos
It is an idea of running codespell as part of our presubmit checks.
Before enabling it for new changes, let's fix what it has found.

Signed-off-by: Andrei Vagin <avagin@gmail.com>
2023-10-25 12:13:42 -07:00
Ayush RanjanandgVisor bot f62a4a77d5 Update go branch to Go 1.21.
Starting with Go 1.21, build tags select the language version. We currently
have several `go:build go1.1` tags, which were intended to act as "true" tags.
But that will break with 1.21. So replace them with "!false".

Fixes #9568.

PiperOrigin-RevId: 576020779
2023-10-23 22:09:47 -07:00
Andrei VaginandgVisor bot 4adc33ad0d fpu: avoid user stack corruptions
When we reserve space for an FPU state in a signal frame, we need to use
the size of the current fpu state. The kernel cpuid can report a smaller size.

On restore, we need to read the size of an fpu state from a signal frame.
After S/R, it can't be different from the current fpu size.

PiperOrigin-RevId: 546972243
2023-07-10 13:54:12 -07:00
Andrei VaginandgVisor bot 3431cd4bff fpu: verify that a restored fpu state can be loaded by xrstor
PiperOrigin-RevId: 538886033
2023-06-08 14:14:53 -07:00
Andrei VaginandgVisor bot ea84ec9a17 kvm: add the extended state information into fpu states
Otherwise, rt_sigreturn rejects it.

PiperOrigin-RevId: 537445737
2023-06-02 17:18:20 -07:00
Adin ScannellandgVisor bot 1ceb814544 Add default_applicable_licenses rules to packages.
PiperOrigin-RevId: 513581243
2023-03-02 10:50:04 -08:00
Adin ScannellandgVisor bot be86ca7d22 Fix assembly declarations.
PiperOrigin-RevId: 511648708
2023-02-22 18:14:26 -08:00
Andrei Vagin 194029b954 arm64: validate registers that come from user-space
Reported-by: syzbot+8c197c80d05172b4c587@syzkaller.appspotmail.com
2023-01-17 12:43:56 -08:00
Andrei VaginandgVisor bot 21981a2bda kernel: don't allocate extra buffer to copy fpu state from user-memory
We don't care about corrupting the current state, because sigreturn
syscalls never report errors and they queue SIGSEGV in case of any
problems.

Here are results fro the signal_benchmark on the kvm platform:
Before:
BM_FaultSignalFixup/real_time       6127 ns         6087 ns       111708
After:
BM_FaultSignalFixup/real_time       3661 ns         3654 ns       199755
PiperOrigin-RevId: 462021118
2022-07-19 18:12:52 -07:00
Etienne PerotandgVisor bot 93ea5d17be gVisor: Turn arch.Context interface references to struct pointers.
Since `arch.Context64` is the only concrete implementation of
`arch.Context`, this does not functionally change anything.
While `arch.Context64` *can* mean multiple things in the codebase, since
the `arch` module uses conditional compilation to create different builds
for AMD64 vs ARM64, the `Context64` type is still singular within each
possible version this can compile to.

This avoids the overhead involved in calling interface
functions in Go:
https://github.com/teh-cmc/go-internals/blob/master/chapter2_interfaces/README.md#dynamic-dispatch

This overhead is particularly painful for functions like `SyscallSaveOrig`
which is a no-op on AMD64.

On KVM, this reduces syscall latency by 4~5%:

```
name       old wall_ns/op  new wall_ns/op  delta
Getpid           602 ± 4%        579 ± 3%  -3.94%  (p=0.000 n=66+195)
GetpidOpt        604 ± 3%        573 ± 3%  -5.10%  (p=0.000 n=71+194)

name       old cpu_ns/op   new cpu_ns/op   delta
Getpid           604 ± 5%        581 ± 0%  -3.81%  (p=0.000 n=75+130)
GetpidOpt        604 ± 2%        574 ± 3%  -4.95%  (p=0.000 n=71+196)
```

PiperOrigin-RevId: 461742893
2022-07-18 16:32:28 -07:00
Ayush RanjanandgVisor bot f6ed4523dc Reformat codebase.
PiperOrigin-RevId: 449358041
2022-05-17 17:48:35 -07:00
gVisor bot 17d7454f86 Merge pull request #7087 from joehattori:feature/fix-capacity
PiperOrigin-RevId: 438670433
2022-03-31 15:06:15 -07:00
Jamie LiuandgVisor bot 44644d9c19 Save/restore floating point state in amd64 signal frames.
PiperOrigin-RevId: 429178859
2022-02-16 17:23:40 -08:00
Joe Hattori e66d177645 Allocate auxv with better capacity while loading stack 2022-01-23 13:05:38 -05:00
Adin ScannellandgVisor bot 266cabd008 Refactor CPUID to allow for use in KVM and ring0.
Updates #5039

PiperOrigin-RevId: 421696994
2022-01-13 17:24:28 -08:00
Jamie LiuandgVisor bot b4de26d6b1 Don't use reflection in fpu.alignedBytes.
reflect.ValueOf takes an interface{}, so when passed a slice the compiler emits
a call to runtime.convTslice to heap-allocate a copy of the slice header.

PiperOrigin-RevId: 394310052
2021-09-01 14:07:57 -07:00