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Don't XSAVE PKRU state.

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We don't implement any of the `pkey_*` syscalls, so applications can't use
protection keys.

Updates #10087

PiperOrigin-RevId: 611287272
This commit is contained in:
Jamie Liu
2024-02-28 17:47:27 -08:00
committed by gVisor bot
parent 7480450936
commit aecf514158
5 changed files with 23 additions and 20 deletions
Download Patch File Download Diff File Expand all files Collapse all files
pkg/ring0/entry_amd64.s
+7 -6
View File
@@ -88,12 +88,13 @@
#define PTRACE_FS_BASE 168 // +checkoffset linux PtraceRegs.Fs_base
#define PTRACE_GS_BASE 176 // +checkoffset linux PtraceRegs.Gs_base
// The value for XCR0 is defined to xsave/xrstor everything except for AMX
// regions.
// TODO(gvisor.dev/issues/9896): Implement AMX Support.
#define XCR0_AMX_MASK ((1 << 17) | (1 << 18))
#define XCR0_EAX (0xffffffff ^ XCR0_AMX_MASK)
#define XCR0_EDX 0xffffffff
// The value for XCR0 is defined to xsave/xrstor everything except for PKRU and
// AMX regions.
// TODO(gvisor.dev/issues/9896): Implement AMX support.
// TODO(gvisor.dev/issues/10087): Implement PKRU support.
#define XCR0_DISABLED_MASK ((1 << 9) | (1 << 17) | (1 << 18))
#define XCR0_EAX (0xffffffff ^ XCR0_DISABLED_MASK)
#define XCR0_EDX 0xffffffff
// Saves a register set.
//
pkg/ring0/lib_amd64.go
+2 -2
View File
@@ -119,8 +119,8 @@ func Init(fs cpuid.FeatureSet) {
hasFSGSBASE = fs.HasFeature(cpuid.X86FeatureFSGSBase)
validXCR0Mask = uintptr(fs.ValidXCR0Mask())
if hasXSAVE {
XCR0AMXMask := uintptr((1 << 17) | (1 << 18))
localXCR0 = xgetbv(0) &^ XCR0AMXMask
XCR0DisabledMask := uintptr((1 << 9) | (1 << 17) | (1 << 18))
localXCR0 = xgetbv(0) &^ XCR0DisabledMask
}
}
pkg/sentry/arch/fpu/fpu_amd64.s
+7 -6
View File
@@ -22,12 +22,13 @@
// FXSAVE/XSAVE area. (Intel SDM Vol. 1, Table 10-2 "Format of an FXSAVE Area")
#define MXCSR_OFFSET 24
// The value for XCR0 is defined to xsave/xrstor everything except for AMX
// regions.
// TODO(gvisor.dev/issues/9896): Implement AMX Support.
#define XCR0_AMX_MASK ((1 << 17) | (1 << 18))
#define XCR0_EAX (0xffffffff ^ XCR0_AMX_MASK)
#define XCR0_EDX 0xffffffff
// The value for XCR0 is defined to xsave/xrstor everything except for PKRU and
// AMX regions.
// TODO(gvisor.dev/issues/9896): Implement AMX support.
// TODO(gvisor.dev/issues/10087): Implement PKRU support.
#define XCR0_DISABLED_MASK ((1 << 9) | (1 << 17) | (1 << 18))
#define XCR0_EAX (0xffffffff ^ XCR0_DISABLED_MASK)
#define XCR0_EDX 0xffffffff
// initX86FPState initializes floating point state.
//
pkg/sentry/platform/systrap/sysmsg/sighandler_amd64.c
+1 -1
View File
@@ -480,7 +480,7 @@ static void prep_fpstate_for_sigframe(void *buf, uint32_t user_size,
sw_bytes->magic1 = FP_XSTATE_MAGIC1;
sw_bytes->extended_size = user_size + FP_XSTATE_MAGIC2_SIZE;
sw_bytes->xfeatures = ~(0ULL) ^ (XCR0_AMX_MASK);
sw_bytes->xfeatures = ~(0ULL) ^ (XCR0_DISABLED_MASK);
sw_bytes->xstate_size = user_size;
*(uint32_t *)(buf + user_size) = use_xsave ? FP_XSTATE_MAGIC2 : 0;
}
pkg/sentry/platform/systrap/sysmsg/sysmsg_offsets.h
+6 -5
View File
@@ -20,11 +20,12 @@
// for the pkg/sentry/platform/systrap/usertrap package.
#define FAULT_OPCODE 0x06
// The value for XCR0 is defined to xsave/xrstor everything except for AMX
// regions.
// TODO(gvisor.dev/issues/9896): Implement AMX Support.
#define XCR0_AMX_MASK ((1 << 17) | (1 << 18))
#define XCR0_EAX (0xffffffff ^ XCR0_AMX_MASK)
// The value for XCR0 is defined to xsave/xrstor everything except for PKRU and
// AMX regions.
// TODO(gvisor.dev/issues/9896): Implement AMX support.
// TODO(gvisor.dev/issues/10087): Implement PKRU support.
#define XCR0_DISABLED_MASK ((1 << 9) | (1 << 17) | (1 << 18))
#define XCR0_EAX (0xffffffff ^ XCR0_DISABLED_MASK)
#define XCR0_EDX 0xffffffff
// LINT.IfChange