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arm64 kvm: remove some redundant codes to improve the preformance

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Signed-off-by: Bin Lu <bin.lu@arm.com>
This commit is contained in:
Bin Lu
2020-09-29 16:02:34 +08:00
parent ba44298a39
commit eefcc478c3
1 changed files with 1 additions and 10 deletions
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pkg/sentry/platform/ring0/entry_arm64.s
+1 -10
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@@ -296,9 +296,7 @@
LOAD_KERNEL_ADDRESS(CPU_SELF(from), RSV_REG); \
MOVD $CPU_STACK_TOP(RSV_REG), RSV_REG; \
MOVD RSV_REG, RSP; \
WORD $0xd538d092; \ //MRS TPIDR_EL1, R18
ISB $15; \
DSB $15;
WORD $0xd538d092; //MRS TPIDR_EL1, R18
// SWITCH_TO_APP_PAGETABLE sets a new pagetable for a container application.
#define SWITCH_TO_APP_PAGETABLE(from) \
@@ -377,8 +375,6 @@ TEXT ·Halt(SB),NOSPLIT,$0
BNE mmio_exit
MOVD $0, CPU_REGISTERS+PTRACE_R9(RSV_REG)
// Flush dcache.
WORD $0xd5087e52 // DC CISW
mmio_exit:
// Disable fpsimd.
WORD $0xd5381041 // MRS CPACR_EL1, R1
@@ -396,9 +392,6 @@ mmio_exit:
MRS VBAR_EL1, R9
MOVD R0, 0x0(R9)
// Flush dcahce.
WORD $0xd5087e52 // DC CISW
RET
// HaltAndResume halts execution and point the pointer to the resume function.
@@ -505,8 +498,6 @@ TEXT ·kernelExitToEl1(SB),NOSPLIT,$0
// Start is the CPU entrypoint.
TEXT ·Start(SB),NOSPLIT,$0
// Flush dcache.
WORD $0xd5087e52 // DC CISW
// Init.
MOVD $SCTLR_EL1_DEFAULT, R1
MSR R1, SCTLR_EL1