mirror of
https://github.com/netbirdio/gvisor.git
synced 2026-05-22 17:12:49 -07:00
Add driver versioning support in nvproxy.
This adds utilities to make it easier to add versioning support in nvproxy. This way we can have different handling of ioctls based on driver versions. The largest downside of this solution is the usage of maps instead of switch statements. Switch statements are *way* faster than map accesses. The rationale is that most of the latency bound work happens on the GPU for GPU workloads. So micro-optimizations like using switch statements should not be visible. Co-authored-by: Jamie Liu <jamieliu@google.com> PiperOrigin-RevId: 570889581
This commit is contained in:
committed by
gVisor bot
co-authored by
Jamie Liu
parent
d493e93763
commit
cce5b85235
@@ -1,4 +1,4 @@
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load("//tools:defs.bzl", "go_library")
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load("//tools:defs.bzl", "go_library", "go_test")
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load("//pkg/sync/locking:locking.bzl", "declare_mutex")
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package(default_applicable_licenses = ["//:license"])
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@@ -25,6 +25,7 @@ go_library(
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"uvm.go",
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"uvm_mmap.go",
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"uvm_unsafe.go",
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"version.go",
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],
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visibility = ["//pkg/sentry:internal"],
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deps = [
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@@ -53,3 +54,9 @@ go_library(
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"@org_golang_x_sys//unix:go_default_library",
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],
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)
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go_test(
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name = "nvproxy_test",
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srcs = ["nvproxy_test.go"],
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library = ":nvproxy",
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)
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@@ -167,44 +167,12 @@ func (fd *frontendFD) Ioctl(ctx context.Context, uio usermem.IO, sysno uintptr,
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// - Add symbol and parameter type definitions to //pkg/abi/nvgpu.
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// - Add filter to seccomp_filters.go.
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// - Add handling below.
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switch nr {
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case
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nvgpu.NV_ESC_CARD_INFO, // nv_ioctl_card_info_t
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nvgpu.NV_ESC_CHECK_VERSION_STR, // nv_rm_api_version_t
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nvgpu.NV_ESC_SYS_PARAMS, // nv_ioctl_sys_params_t
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nvgpu.NV_ESC_RM_DUP_OBJECT, // NVOS55_PARAMETERS
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nvgpu.NV_ESC_RM_SHARE, // NVOS57_PARAMETERS
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nvgpu.NV_ESC_RM_UNMAP_MEMORY, // NVOS34_PARAMETERS
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nvgpu.NV_ESC_RM_UPDATE_DEVICE_MAPPING_INFO: // NVOS56_PARAMETERS
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return frontendIoctlSimple(&fi)
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case nvgpu.NV_ESC_REGISTER_FD:
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return frontendRegisterFD(&fi)
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case nvgpu.NV_ESC_ALLOC_OS_EVENT:
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return rmAllocOSEvent(&fi)
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case nvgpu.NV_ESC_FREE_OS_EVENT:
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return rmFreeOSEvent(&fi)
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case nvgpu.NV_ESC_NUMA_INFO:
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// The CPU topology seen by the host driver differs from the CPU
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// topology presented by the sentry to the application, so reject this
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// ioctl; doing so is non-fatal.
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ctx.Debugf("nvproxy: ignoring NV_ESC_NUMA_INFO")
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return 0, linuxerr.EINVAL
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case nvgpu.NV_ESC_RM_ALLOC_MEMORY:
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return rmAllocMemory(&fi)
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case nvgpu.NV_ESC_RM_FREE:
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return rmFree(&fi)
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case nvgpu.NV_ESC_RM_CONTROL:
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return rmControl(&fi)
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case nvgpu.NV_ESC_RM_ALLOC:
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return rmAlloc(&fi)
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case nvgpu.NV_ESC_RM_VID_HEAP_CONTROL:
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return rmVidHeapControl(&fi)
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case nvgpu.NV_ESC_RM_MAP_MEMORY:
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return rmMapMemory(&fi)
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default:
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handler := fd.nvp.abi.frontendIoctl[nr]
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if handler == nil {
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ctx.Warningf("nvproxy: unknown frontend ioctl %d == %#x (argSize=%d, cmd=%#x)", nr, nr, argSize, cmd)
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return 0, linuxerr.EINVAL
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}
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return handler(&fi)
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}
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func frontendIoctlCmd(nr, argSize uint32) uintptr {
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@@ -243,6 +211,14 @@ func frontendIoctlSimple(fi *frontendIoctlState) (uintptr, error) {
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return n, nil
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}
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func rmNumaInfo(fi *frontendIoctlState) (uintptr, error) {
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// The CPU topology seen by the host driver differs from the CPU
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// topology presented by the sentry to the application, so reject this
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// ioctl; doing so is non-fatal.
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log.Debugf("nvproxy: ignoring NV_ESC_NUMA_INFO")
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return 0, linuxerr.EINVAL
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}
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func frontendRegisterFD(fi *frontendIoctlState) (uintptr, error) {
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var ioctlParams nvgpu.IoctlRegisterFD
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if fi.ioctlParamsSize != nvgpu.SizeofIoctlRegisterFD {
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@@ -532,95 +508,12 @@ func rmControl(fi *frontendIoctlState) (uintptr, error) {
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// - Add symbol definition to //pkg/abi/nvgpu. Parameter type definition is
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// only required for non-simple commands.
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// - Add handling below.
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switch ioctlParams.Cmd {
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case
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nvgpu.NV0000_CTRL_CMD_CLIENT_GET_ADDR_SPACE_TYPE,
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nvgpu.NV0000_CTRL_CMD_CLIENT_SET_INHERITED_SHARE_POLICY,
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nvgpu.NV0000_CTRL_CMD_GPU_GET_ATTACHED_IDS,
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nvgpu.NV0000_CTRL_CMD_GPU_GET_ID_INFO,
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nvgpu.NV0000_CTRL_CMD_GPU_GET_ID_INFO_V2,
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nvgpu.NV0000_CTRL_CMD_GPU_GET_PROBED_IDS,
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nvgpu.NV0000_CTRL_CMD_GPU_ATTACH_IDS,
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nvgpu.NV0000_CTRL_CMD_GPU_DETACH_IDS,
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nvgpu.NV0000_CTRL_CMD_GPU_GET_PCI_INFO,
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nvgpu.NV0000_CTRL_CMD_GPU_QUERY_DRAIN_STATE,
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nvgpu.NV0000_CTRL_CMD_GPU_GET_MEMOP_ENABLE,
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nvgpu.NV0000_CTRL_CMD_SYNC_GPU_BOOST_GROUP_INFO,
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nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS,
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nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_FABRIC_STATUS,
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nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS_MATRIX,
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nvgpu.NV0080_CTRL_CMD_FB_GET_CAPS_V2,
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nvgpu.NV0080_CTRL_CMD_GPU_GET_NUM_SUBDEVICES,
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nvgpu.NV0080_CTRL_CMD_GPU_QUERY_SW_STATE_PERSISTENCE,
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nvgpu.NV0080_CTRL_CMD_GPU_GET_VIRTUALIZATION_MODE,
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0x80028b, // unknown, paramsSize == 1
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nvgpu.NV0080_CTRL_CMD_GPU_GET_CLASSLIST_V2,
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nvgpu.NV0080_CTRL_CMD_HOST_GET_CAPS_V2,
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nvgpu.NV2080_CTRL_CMD_BUS_GET_PCI_INFO,
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nvgpu.NV2080_CTRL_CMD_BUS_GET_PCI_BAR_INFO,
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nvgpu.NV2080_CTRL_CMD_BUS_GET_INFO_V2,
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nvgpu.NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS,
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nvgpu.NV2080_CTRL_CMD_CE_GET_ALL_CAPS,
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nvgpu.NV2080_CTRL_CMD_FB_GET_INFO_V2,
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nvgpu.NV2080_CTRL_CMD_GPU_GET_INFO_V2,
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nvgpu.NV2080_CTRL_CMD_GPU_GET_NAME_STRING,
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nvgpu.NV2080_CTRL_CMD_GPU_GET_SHORT_NAME_STRING,
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nvgpu.NV2080_CTRL_CMD_GPU_GET_SIMULATION_INFO,
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nvgpu.NV2080_CTRL_CMD_GPU_QUERY_ECC_STATUS,
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nvgpu.NV2080_CTRL_CMD_GPU_QUERY_COMPUTE_MODE_RULES,
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nvgpu.NV2080_CTRL_CMD_GPU_ACQUIRE_COMPUTE_MODE_RESERVATION,
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nvgpu.NV2080_CTRL_CMD_GPU_RELEASE_COMPUTE_MODE_RESERVATION,
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nvgpu.NV2080_CTRL_CMD_GPU_GET_GID_INFO,
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nvgpu.NV2080_CTRL_CMD_GPU_GET_ENGINES_V2,
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nvgpu.NV2080_CTRL_CMD_GPU_GET_ACTIVE_PARTITION_IDS,
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nvgpu.NV2080_CTRL_CMD_GPU_GET_COMPUTE_POLICY_CONFIG,
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nvgpu.NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO,
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nvgpu.NV2080_CTRL_CMD_GR_SET_CTXSW_PREEMPTION_MODE,
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nvgpu.NV2080_CTRL_CMD_GR_GET_CTX_BUFFER_SIZE,
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nvgpu.NV2080_CTRL_CMD_GR_GET_GLOBAL_SM_ORDER,
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nvgpu.NV2080_CTRL_CMD_GR_GET_CAPS_V2,
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nvgpu.NV2080_CTRL_CMD_GR_GET_GPC_MASK,
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nvgpu.NV2080_CTRL_CMD_GR_GET_TPC_MASK,
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nvgpu.NV2080_CTRL_CMD_GSP_GET_FEATURES,
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nvgpu.NV2080_CTRL_CMD_MC_GET_ARCH_INFO,
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nvgpu.NV2080_CTRL_CMD_MC_SERVICE_INTERRUPTS,
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nvgpu.NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS,
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nvgpu.NV2080_CTRL_CMD_PERF_BOOST,
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nvgpu.NV2080_CTRL_CMD_RC_GET_WATCHDOG_INFO,
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nvgpu.NV2080_CTRL_CMD_RC_RELEASE_WATCHDOG_REQUESTS,
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nvgpu.NV2080_CTRL_CMD_RC_SOFT_DISABLE_WATCHDOG,
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nvgpu.NV2080_CTRL_CMD_TIMER_GET_GPU_CPU_TIME_CORRELATION_INFO,
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nvgpu.NV503C_CTRL_CMD_REGISTER_VA_SPACE,
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nvgpu.NV503C_CTRL_CMD_REGISTER_VIDMEM,
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nvgpu.NV503C_CTRL_CMD_UNREGISTER_VIDMEM,
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nvgpu.NV83DE_CTRL_CMD_DEBUG_SET_EXCEPTION_MASK,
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nvgpu.NV83DE_CTRL_CMD_DEBUG_READ_ALL_SM_ERROR_STATES,
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nvgpu.NV83DE_CTRL_CMD_DEBUG_CLEAR_ALL_SM_ERROR_STATES,
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nvgpu.NV906F_CTRL_CMD_RESET_CHANNEL,
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nvgpu.NV90E6_CTRL_CMD_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK,
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nvgpu.NVC36F_CTRL_GET_CLASS_ENGINEID,
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nvgpu.NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN,
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nvgpu.NVA06C_CTRL_CMD_GPFIFO_SCHEDULE,
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nvgpu.NVA06C_CTRL_CMD_SET_TIMESLICE,
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nvgpu.NVA06C_CTRL_CMD_PREEMPT:
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return rmControlSimple(fi, &ioctlParams)
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case nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_BUILD_VERSION:
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return ctrlClientSystemGetBuildVersion(fi, &ioctlParams)
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case nvgpu.NV0080_CTRL_CMD_FIFO_GET_CHANNELLIST:
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return ctrlDevFIFOGetChannelList(fi, &ioctlParams)
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case nvgpu.NV2080_CTRL_CMD_FIFO_DISABLE_CHANNELS:
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return ctrlSubdevFIFODisableChannels(fi, &ioctlParams)
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case nvgpu.NV2080_CTRL_CMD_GR_GET_INFO:
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return ctrlSubdevGRGetInfo(fi, &ioctlParams)
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default:
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handler := fi.fd.nvp.abi.controlCmd[ioctlParams.Cmd]
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if handler == nil {
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fi.ctx.Warningf("nvproxy: unknown control command %#x (paramsSize=%d)", ioctlParams.Cmd, ioctlParams.ParamsSize)
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return 0, linuxerr.EINVAL
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}
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return handler(fi, &ioctlParams)
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}
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func rmControlSimple(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters) (uintptr, error) {
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@@ -752,41 +645,12 @@ func rmAlloc(fi *frontendIoctlState) (uintptr, error) {
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// the class whose constructor interprets it ("Internal Class").
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// - Add symbol and parameter type definitions to //pkg/abi/nvgpu.
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// - Add handling below.
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switch ioctlParams.HClass {
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case nvgpu.NV01_ROOT, nvgpu.NV01_ROOT_NON_PRIV, nvgpu.NV01_ROOT_CLIENT:
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return rmAllocSimple[nvgpu.Handle](fi, &ioctlParams, isNVOS64)
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case nvgpu.NV01_EVENT_OS_EVENT:
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return rmAllocEventOSEvent(fi, &ioctlParams, isNVOS64)
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case nvgpu.NV01_DEVICE_0:
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return rmAllocSimple[nvgpu.NV0080_ALLOC_PARAMETERS](fi, &ioctlParams, isNVOS64)
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case nvgpu.NV20_SUBDEVICE_0:
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return rmAllocSimple[nvgpu.NV2080_ALLOC_PARAMETERS](fi, &ioctlParams, isNVOS64)
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case nvgpu.NV50_THIRD_PARTY_P2P:
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return rmAllocSimple[nvgpu.NV503C_ALLOC_PARAMETERS](fi, &ioctlParams, isNVOS64)
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case nvgpu.GT200_DEBUGGER:
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return rmAllocSimple[nvgpu.NV83DE_ALLOC_PARAMETERS](fi, &ioctlParams, isNVOS64)
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case nvgpu.FERMI_CONTEXT_SHARE_A:
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return rmAllocSimple[nvgpu.NV_CTXSHARE_ALLOCATION_PARAMETERS](fi, &ioctlParams, isNVOS64)
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case nvgpu.FERMI_VASPACE_A:
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return rmAllocSimple[nvgpu.NV_VASPACE_ALLOCATION_PARAMETERS](fi, &ioctlParams, isNVOS64)
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case nvgpu.KEPLER_CHANNEL_GROUP_A:
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return rmAllocSimple[nvgpu.NV_CHANNEL_GROUP_ALLOCATION_PARAMETERS](fi, &ioctlParams, isNVOS64)
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case nvgpu.TURING_CHANNEL_GPFIFO_A, nvgpu.AMPERE_CHANNEL_GPFIFO_A:
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return rmAllocSimple[nvgpu.NV_CHANNEL_ALLOC_PARAMS](fi, &ioctlParams, isNVOS64)
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case nvgpu.TURING_DMA_COPY_A, nvgpu.AMPERE_DMA_COPY_A, nvgpu.AMPERE_DMA_COPY_B, nvgpu.HOPPER_DMA_COPY_A:
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return rmAllocSimple[nvgpu.NVB0B5_ALLOCATION_PARAMETERS](fi, &ioctlParams, isNVOS64)
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case nvgpu.TURING_COMPUTE_A, nvgpu.AMPERE_COMPUTE_A, nvgpu.AMPERE_COMPUTE_B, nvgpu.ADA_COMPUTE_A, nvgpu.HOPPER_COMPUTE_A:
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return rmAllocSimple[nvgpu.NV_GR_ALLOCATION_PARAMETERS](fi, &ioctlParams, isNVOS64)
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case nvgpu.HOPPER_USERMODE_A:
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return rmAllocSimple[nvgpu.NV_HOPPER_USERMODE_A_PARAMS](fi, &ioctlParams, isNVOS64)
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case nvgpu.GF100_SUBDEVICE_MASTER, nvgpu.TURING_USERMODE_A:
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return rmAllocNoParams(fi, &ioctlParams, isNVOS64)
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case nvgpu.NV_MEMORY_FABRIC:
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return rmAllocSimple[nvgpu.NV00F8_ALLOCATION_PARAMETERS](fi, &ioctlParams, isNVOS64)
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default:
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handler := fi.fd.nvp.abi.allocationClass[ioctlParams.HClass]
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if handler == nil {
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fi.ctx.Warningf("nvproxy: unknown allocation class %#08x", ioctlParams.HClass)
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return 0, linuxerr.EINVAL
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}
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return handler(fi, &ioctlParams, isNVOS64)
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}
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// Unlike frontendIoctlSimple and rmControlSimple, rmAllocSimple requires the
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@@ -35,22 +35,22 @@ import (
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func Register(vfsObj *vfs.VirtualFilesystem, uvmDevMajor uint32) error {
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// The kernel driver's interface is unstable, so only allow versions of the
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// driver that are known to be supported.
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version, err := hostDriverVersion()
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versionStr, err := hostDriverVersion()
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if err != nil {
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return fmt.Errorf("failed to get Nvidia driver version: %w", err)
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}
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switch version {
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case
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"525.60.13",
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"525.105.17",
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"525.125.06":
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log.Infof("Nvidia driver version: %s", version)
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default:
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return fmt.Errorf("unsupported Nvidia driver version: %s", version)
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version, err := driverVersionFrom(versionStr)
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if err != nil {
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return fmt.Errorf("failed to parse Nvidia driver version %s: %w", versionStr, err)
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}
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abiCons, ok := abis[version]
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if !ok {
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return fmt.Errorf("unsupported Nvidia driver version: %s", versionStr)
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}
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log.Infof("Nvidia driver version: %s", versionStr)
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nvp := &nvproxy{
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objsLive: make(map[nvgpu.Handle]*object),
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abi: abiCons(),
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}
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for minor := uint32(0); minor <= nvgpu.NV_CONTROL_DEVICE_MINOR; minor++ {
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if err := vfsObj.RegisterDevice(vfs.CharDevice, nvgpu.NV_MAJOR_DEVICE_NUMBER, minor, &frontendDevice{
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@@ -95,6 +95,7 @@ func CreateIndexDevtmpfsFile(ctx context.Context, dev *devtmpfs.Accessor, minor
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type nvproxy struct {
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objsMu objsMutex `state:"nosave"`
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objsLive map[nvgpu.Handle]*object
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abi *driverABI
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}
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// object tracks an object allocated through the driver.
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@@ -0,0 +1,27 @@
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// Copyright 2023 The gVisor Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
|
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
|
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// limitations under the License.
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package nvproxy
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import (
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"testing"
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)
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func TestInit(t *testing.T) {
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// Test that initializing all driverABI works (does not panic or anything).
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Init()
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for _, cons := range abis {
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cons()
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}
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}
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@@ -131,46 +131,12 @@ func (fd *uvmFD) Ioctl(ctx context.Context, uio usermem.IO, sysno uintptr, args
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cmd: cmd,
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ioctlParamsAddr: argPtr,
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}
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switch cmd {
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case nvgpu.UVM_INITIALIZE:
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return uvmInitialize(&ui)
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case nvgpu.UVM_DEINITIALIZE:
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return uvmIoctlInvoke[byte](&ui, nil)
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case nvgpu.UVM_CREATE_RANGE_GROUP:
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return uvmIoctlSimple[nvgpu.UVM_CREATE_RANGE_GROUP_PARAMS](&ui)
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case nvgpu.UVM_DESTROY_RANGE_GROUP:
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return uvmIoctlSimple[nvgpu.UVM_DESTROY_RANGE_GROUP_PARAMS](&ui)
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case nvgpu.UVM_REGISTER_GPU_VASPACE:
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return uvmIoctlHasRMCtrlFD[nvgpu.UVM_REGISTER_GPU_VASPACE_PARAMS](&ui)
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case nvgpu.UVM_UNREGISTER_GPU_VASPACE:
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return uvmIoctlSimple[nvgpu.UVM_UNREGISTER_GPU_VASPACE_PARAMS](&ui)
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case nvgpu.UVM_REGISTER_CHANNEL:
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return uvmIoctlHasRMCtrlFD[nvgpu.UVM_REGISTER_CHANNEL_PARAMS](&ui)
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case nvgpu.UVM_UNREGISTER_CHANNEL:
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return uvmIoctlSimple[nvgpu.UVM_UNREGISTER_CHANNEL_PARAMS](&ui)
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case nvgpu.UVM_MAP_EXTERNAL_ALLOCATION:
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return uvmIoctlHasRMCtrlFD[nvgpu.UVM_MAP_EXTERNAL_ALLOCATION_PARAMS](&ui)
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case nvgpu.UVM_FREE:
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return uvmIoctlSimple[nvgpu.UVM_FREE_PARAMS](&ui)
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case nvgpu.UVM_REGISTER_GPU:
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return uvmIoctlHasRMCtrlFD[nvgpu.UVM_REGISTER_GPU_PARAMS](&ui)
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case nvgpu.UVM_UNREGISTER_GPU:
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return uvmIoctlSimple[nvgpu.UVM_UNREGISTER_GPU_PARAMS](&ui)
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case nvgpu.UVM_PAGEABLE_MEM_ACCESS:
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return uvmIoctlSimple[nvgpu.UVM_PAGEABLE_MEM_ACCESS_PARAMS](&ui)
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case nvgpu.UVM_MAP_DYNAMIC_PARALLELISM_REGION:
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return uvmIoctlSimple[nvgpu.UVM_MAP_DYNAMIC_PARALLELISM_REGION_PARAMS](&ui)
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case nvgpu.UVM_ALLOC_SEMAPHORE_POOL:
|
||||
return uvmIoctlSimple[nvgpu.UVM_ALLOC_SEMAPHORE_POOL_PARAMS](&ui)
|
||||
case nvgpu.UVM_VALIDATE_VA_RANGE:
|
||||
return uvmIoctlSimple[nvgpu.UVM_VALIDATE_VA_RANGE_PARAMS](&ui)
|
||||
case nvgpu.UVM_CREATE_EXTERNAL_RANGE:
|
||||
return uvmIoctlSimple[nvgpu.UVM_CREATE_EXTERNAL_RANGE_PARAMS](&ui)
|
||||
default:
|
||||
handler := fd.nvp.abi.uvmIoctl[cmd]
|
||||
if handler == nil {
|
||||
ctx.Warningf("nvproxy: unknown uvm ioctl %d", cmd)
|
||||
return 0, linuxerr.EINVAL
|
||||
}
|
||||
return handler(&ui)
|
||||
}
|
||||
|
||||
// uvmIoctlState holds the state of a call to uvmFD.Ioctl().
|
||||
@@ -182,6 +148,10 @@ type uvmIoctlState struct {
|
||||
ioctlParamsAddr hostarch.Addr
|
||||
}
|
||||
|
||||
func uvmIoctlNoParams(ui *uvmIoctlState) (uintptr, error) {
|
||||
return uvmIoctlInvoke[byte](ui, nil)
|
||||
}
|
||||
|
||||
func uvmIoctlSimple[Params any, PParams marshalPtr[Params]](ui *uvmIoctlState) (uintptr, error) {
|
||||
var ioctlParams Params
|
||||
if _, err := (PParams)(&ioctlParams).CopyIn(ui.t, ui.ioctlParamsAddr); err != nil {
|
||||
|
||||
@@ -0,0 +1,257 @@
|
||||
// Copyright 2023 The gVisor Authors.
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
package nvproxy
|
||||
|
||||
import (
|
||||
"fmt"
|
||||
"strconv"
|
||||
"strings"
|
||||
|
||||
"gvisor.dev/gvisor/pkg/abi/nvgpu"
|
||||
"gvisor.dev/gvisor/pkg/sync"
|
||||
)
|
||||
|
||||
type driverVersion struct {
|
||||
major int
|
||||
minor int
|
||||
patch int
|
||||
}
|
||||
|
||||
func driverVersionFrom(version string) (driverVersion, error) {
|
||||
parts := strings.Split(version, ".")
|
||||
if len(parts) != 3 {
|
||||
return driverVersion{}, fmt.Errorf("invalid format of version string %q", version)
|
||||
}
|
||||
var (
|
||||
res driverVersion
|
||||
err error
|
||||
)
|
||||
res.major, err = strconv.Atoi(parts[0])
|
||||
if err != nil {
|
||||
return driverVersion{}, fmt.Errorf("invalid format for major version %q: %v", version, err)
|
||||
}
|
||||
res.minor, err = strconv.Atoi(parts[1])
|
||||
if err != nil {
|
||||
return driverVersion{}, fmt.Errorf("invalid format for minor version %q: %v", version, err)
|
||||
}
|
||||
res.patch, err = strconv.Atoi(parts[2])
|
||||
if err != nil {
|
||||
return driverVersion{}, fmt.Errorf("invalid format for patch version %q: %v", version, err)
|
||||
}
|
||||
return res, nil
|
||||
}
|
||||
|
||||
func (v driverVersion) String() string {
|
||||
return fmt.Sprintf("%02d.%02d.%02d", v.major, v.minor, v.patch)
|
||||
}
|
||||
|
||||
type frontendIoctlHandler func(fi *frontendIoctlState) (uintptr, error)
|
||||
type controlCmdHandler func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters) (uintptr, error)
|
||||
type allocationClassHandler func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, isNVOS64 bool) (uintptr, error)
|
||||
type uvmIoctlHandler func(ui *uvmIoctlState) (uintptr, error)
|
||||
|
||||
// A driverABIFunc constructs and returns a driverABI.
|
||||
// This indirection exists to avoid memory usage from unused driver ABIs.
|
||||
type driverABIFunc func() *driverABI
|
||||
|
||||
// driverABI defines the Nvidia kernel driver ABI proxied at a given version.
|
||||
//
|
||||
// The Nvidia driver's ioctl interface branches widely at various places in the
|
||||
// kernel driver. As for now, versioning is only supported for the following
|
||||
// points of branching:
|
||||
// 1. frontend device ioctls (based on IOC_NR(cmd)).
|
||||
// 2. uvm device ioctls (based on cmd).
|
||||
// 3. control commands within NV_ESC_RM_CONTROL in frontend device (based on
|
||||
// NVOS54_PARAMETERS.Cmd). Note that commands that have RM_GSS_LEGACY_MASK
|
||||
// set are not versioned.
|
||||
// 4. allocation classes within NV_ESC_RM_ALLOC in frontend device (based on
|
||||
// NVOS64_PARAMETERS.HClass).
|
||||
type driverABI struct {
|
||||
frontendIoctl map[uint32]frontendIoctlHandler
|
||||
uvmIoctl map[uint32]uvmIoctlHandler
|
||||
controlCmd map[uint32]controlCmdHandler
|
||||
allocationClass map[uint32]allocationClassHandler
|
||||
}
|
||||
|
||||
// abis is a global map containing all supported Nvidia driver ABIs. This is
|
||||
// initialized on Init() and is immutable henceforth.
|
||||
var abis map[driverVersion]driverABIFunc
|
||||
var abisOnce sync.Once
|
||||
|
||||
func addDriverABI(major, minor, patch int, cons driverABIFunc) driverABIFunc {
|
||||
if abis == nil {
|
||||
abis = make(map[driverVersion]driverABIFunc)
|
||||
}
|
||||
abis[driverVersion{major, minor, patch}] = cons
|
||||
return cons
|
||||
}
|
||||
|
||||
// Init initializes abis global map.
|
||||
func Init() {
|
||||
abisOnce.Do(func() {
|
||||
v525_60_13 := addDriverABI(525, 60, 13, func() *driverABI {
|
||||
// 525.60.13 is the earliest driver version supported by nvproxy. Since
|
||||
// there is no parent to inherit from, the driverABI needs to be constructed
|
||||
// with the entirety of the nvproxy functionality at this version.
|
||||
return &driverABI{
|
||||
frontendIoctl: map[uint32]frontendIoctlHandler{
|
||||
nvgpu.NV_ESC_CARD_INFO: frontendIoctlSimple, // nv_ioctl_card_info_t
|
||||
nvgpu.NV_ESC_CHECK_VERSION_STR: frontendIoctlSimple, // nv_rm_api_version_t
|
||||
nvgpu.NV_ESC_SYS_PARAMS: frontendIoctlSimple, // nv_ioctl_sys_params_t
|
||||
nvgpu.NV_ESC_RM_DUP_OBJECT: frontendIoctlSimple, // NVOS55_PARAMETERS
|
||||
nvgpu.NV_ESC_RM_SHARE: frontendIoctlSimple, // NVOS57_PARAMETERS
|
||||
nvgpu.NV_ESC_RM_UNMAP_MEMORY: frontendIoctlSimple, // NVOS34_PARAMETERS
|
||||
nvgpu.NV_ESC_RM_UPDATE_DEVICE_MAPPING_INFO: frontendIoctlSimple, // NVOS56_PARAMETERS
|
||||
nvgpu.NV_ESC_REGISTER_FD: frontendRegisterFD,
|
||||
nvgpu.NV_ESC_ALLOC_OS_EVENT: rmAllocOSEvent,
|
||||
nvgpu.NV_ESC_FREE_OS_EVENT: rmFreeOSEvent,
|
||||
nvgpu.NV_ESC_NUMA_INFO: rmNumaInfo,
|
||||
nvgpu.NV_ESC_RM_ALLOC_MEMORY: rmAllocMemory,
|
||||
nvgpu.NV_ESC_RM_FREE: rmFree,
|
||||
nvgpu.NV_ESC_RM_CONTROL: rmControl,
|
||||
nvgpu.NV_ESC_RM_ALLOC: rmAlloc,
|
||||
nvgpu.NV_ESC_RM_VID_HEAP_CONTROL: rmVidHeapControl,
|
||||
nvgpu.NV_ESC_RM_MAP_MEMORY: rmMapMemory,
|
||||
},
|
||||
uvmIoctl: map[uint32]uvmIoctlHandler{
|
||||
nvgpu.UVM_INITIALIZE: uvmInitialize,
|
||||
nvgpu.UVM_DEINITIALIZE: uvmIoctlNoParams,
|
||||
nvgpu.UVM_CREATE_RANGE_GROUP: uvmIoctlSimple[nvgpu.UVM_CREATE_RANGE_GROUP_PARAMS],
|
||||
nvgpu.UVM_DESTROY_RANGE_GROUP: uvmIoctlSimple[nvgpu.UVM_DESTROY_RANGE_GROUP_PARAMS],
|
||||
nvgpu.UVM_REGISTER_GPU_VASPACE: uvmIoctlHasRMCtrlFD[nvgpu.UVM_REGISTER_GPU_VASPACE_PARAMS],
|
||||
nvgpu.UVM_UNREGISTER_GPU_VASPACE: uvmIoctlSimple[nvgpu.UVM_UNREGISTER_GPU_VASPACE_PARAMS],
|
||||
nvgpu.UVM_REGISTER_CHANNEL: uvmIoctlHasRMCtrlFD[nvgpu.UVM_REGISTER_CHANNEL_PARAMS],
|
||||
nvgpu.UVM_UNREGISTER_CHANNEL: uvmIoctlSimple[nvgpu.UVM_UNREGISTER_CHANNEL_PARAMS],
|
||||
nvgpu.UVM_MAP_EXTERNAL_ALLOCATION: uvmIoctlHasRMCtrlFD[nvgpu.UVM_MAP_EXTERNAL_ALLOCATION_PARAMS],
|
||||
nvgpu.UVM_FREE: uvmIoctlSimple[nvgpu.UVM_FREE_PARAMS],
|
||||
nvgpu.UVM_REGISTER_GPU: uvmIoctlHasRMCtrlFD[nvgpu.UVM_REGISTER_GPU_PARAMS],
|
||||
nvgpu.UVM_UNREGISTER_GPU: uvmIoctlSimple[nvgpu.UVM_UNREGISTER_GPU_PARAMS],
|
||||
nvgpu.UVM_PAGEABLE_MEM_ACCESS: uvmIoctlSimple[nvgpu.UVM_PAGEABLE_MEM_ACCESS_PARAMS],
|
||||
nvgpu.UVM_MAP_DYNAMIC_PARALLELISM_REGION: uvmIoctlSimple[nvgpu.UVM_MAP_DYNAMIC_PARALLELISM_REGION_PARAMS],
|
||||
nvgpu.UVM_ALLOC_SEMAPHORE_POOL: uvmIoctlSimple[nvgpu.UVM_ALLOC_SEMAPHORE_POOL_PARAMS],
|
||||
nvgpu.UVM_VALIDATE_VA_RANGE: uvmIoctlSimple[nvgpu.UVM_VALIDATE_VA_RANGE_PARAMS],
|
||||
nvgpu.UVM_CREATE_EXTERNAL_RANGE: uvmIoctlSimple[nvgpu.UVM_CREATE_EXTERNAL_RANGE_PARAMS],
|
||||
},
|
||||
controlCmd: map[uint32]controlCmdHandler{
|
||||
nvgpu.NV0000_CTRL_CMD_CLIENT_GET_ADDR_SPACE_TYPE: rmControlSimple,
|
||||
nvgpu.NV0000_CTRL_CMD_CLIENT_SET_INHERITED_SHARE_POLICY: rmControlSimple,
|
||||
nvgpu.NV0000_CTRL_CMD_GPU_GET_ATTACHED_IDS: rmControlSimple,
|
||||
nvgpu.NV0000_CTRL_CMD_GPU_GET_ID_INFO: rmControlSimple,
|
||||
nvgpu.NV0000_CTRL_CMD_GPU_GET_ID_INFO_V2: rmControlSimple,
|
||||
nvgpu.NV0000_CTRL_CMD_GPU_GET_PROBED_IDS: rmControlSimple,
|
||||
nvgpu.NV0000_CTRL_CMD_GPU_ATTACH_IDS: rmControlSimple,
|
||||
nvgpu.NV0000_CTRL_CMD_GPU_DETACH_IDS: rmControlSimple,
|
||||
nvgpu.NV0000_CTRL_CMD_GPU_GET_PCI_INFO: rmControlSimple,
|
||||
nvgpu.NV0000_CTRL_CMD_GPU_QUERY_DRAIN_STATE: rmControlSimple,
|
||||
nvgpu.NV0000_CTRL_CMD_GPU_GET_MEMOP_ENABLE: rmControlSimple,
|
||||
nvgpu.NV0000_CTRL_CMD_SYNC_GPU_BOOST_GROUP_INFO: rmControlSimple,
|
||||
nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS: rmControlSimple,
|
||||
nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_FABRIC_STATUS: rmControlSimple,
|
||||
nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS_MATRIX: rmControlSimple,
|
||||
nvgpu.NV0080_CTRL_CMD_FB_GET_CAPS_V2: rmControlSimple,
|
||||
nvgpu.NV0080_CTRL_CMD_GPU_GET_NUM_SUBDEVICES: rmControlSimple,
|
||||
nvgpu.NV0080_CTRL_CMD_GPU_QUERY_SW_STATE_PERSISTENCE: rmControlSimple,
|
||||
nvgpu.NV0080_CTRL_CMD_GPU_GET_VIRTUALIZATION_MODE: rmControlSimple,
|
||||
0x80028b: rmControlSimple, // unknown, paramsSize == 1
|
||||
nvgpu.NV0080_CTRL_CMD_GPU_GET_CLASSLIST_V2: rmControlSimple,
|
||||
nvgpu.NV0080_CTRL_CMD_HOST_GET_CAPS_V2: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_BUS_GET_PCI_INFO: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_BUS_GET_PCI_BAR_INFO: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_BUS_GET_INFO_V2: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_CE_GET_ALL_CAPS: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_FB_GET_INFO_V2: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GPU_GET_INFO_V2: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GPU_GET_NAME_STRING: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GPU_GET_SHORT_NAME_STRING: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GPU_GET_SIMULATION_INFO: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GPU_QUERY_ECC_STATUS: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GPU_QUERY_COMPUTE_MODE_RULES: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GPU_ACQUIRE_COMPUTE_MODE_RESERVATION: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GPU_RELEASE_COMPUTE_MODE_RESERVATION: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GPU_GET_GID_INFO: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GPU_GET_ENGINES_V2: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GPU_GET_ACTIVE_PARTITION_IDS: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GPU_GET_COMPUTE_POLICY_CONFIG: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GR_SET_CTXSW_PREEMPTION_MODE: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GR_GET_CTX_BUFFER_SIZE: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GR_GET_GLOBAL_SM_ORDER: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GR_GET_CAPS_V2: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GR_GET_GPC_MASK: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GR_GET_TPC_MASK: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_GSP_GET_FEATURES: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_MC_GET_ARCH_INFO: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_MC_SERVICE_INTERRUPTS: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_PERF_BOOST: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_RC_GET_WATCHDOG_INFO: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_RC_RELEASE_WATCHDOG_REQUESTS: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_RC_SOFT_DISABLE_WATCHDOG: rmControlSimple,
|
||||
nvgpu.NV2080_CTRL_CMD_TIMER_GET_GPU_CPU_TIME_CORRELATION_INFO: rmControlSimple,
|
||||
nvgpu.NV503C_CTRL_CMD_REGISTER_VA_SPACE: rmControlSimple,
|
||||
nvgpu.NV503C_CTRL_CMD_REGISTER_VIDMEM: rmControlSimple,
|
||||
nvgpu.NV503C_CTRL_CMD_UNREGISTER_VIDMEM: rmControlSimple,
|
||||
nvgpu.NV83DE_CTRL_CMD_DEBUG_SET_EXCEPTION_MASK: rmControlSimple,
|
||||
nvgpu.NV83DE_CTRL_CMD_DEBUG_READ_ALL_SM_ERROR_STATES: rmControlSimple,
|
||||
nvgpu.NV83DE_CTRL_CMD_DEBUG_CLEAR_ALL_SM_ERROR_STATES: rmControlSimple,
|
||||
nvgpu.NV906F_CTRL_CMD_RESET_CHANNEL: rmControlSimple,
|
||||
nvgpu.NV90E6_CTRL_CMD_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK: rmControlSimple,
|
||||
nvgpu.NVC36F_CTRL_GET_CLASS_ENGINEID: rmControlSimple,
|
||||
nvgpu.NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN: rmControlSimple,
|
||||
nvgpu.NVA06C_CTRL_CMD_GPFIFO_SCHEDULE: rmControlSimple,
|
||||
nvgpu.NVA06C_CTRL_CMD_SET_TIMESLICE: rmControlSimple,
|
||||
nvgpu.NVA06C_CTRL_CMD_PREEMPT: rmControlSimple,
|
||||
nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_BUILD_VERSION: ctrlClientSystemGetBuildVersion,
|
||||
nvgpu.NV0080_CTRL_CMD_FIFO_GET_CHANNELLIST: ctrlDevFIFOGetChannelList,
|
||||
nvgpu.NV2080_CTRL_CMD_FIFO_DISABLE_CHANNELS: ctrlSubdevFIFODisableChannels,
|
||||
nvgpu.NV2080_CTRL_CMD_GR_GET_INFO: ctrlSubdevGRGetInfo,
|
||||
},
|
||||
allocationClass: map[uint32]allocationClassHandler{
|
||||
nvgpu.NV01_ROOT: rmAllocSimple[nvgpu.Handle],
|
||||
nvgpu.NV01_ROOT_NON_PRIV: rmAllocSimple[nvgpu.Handle],
|
||||
nvgpu.NV01_ROOT_CLIENT: rmAllocSimple[nvgpu.Handle],
|
||||
nvgpu.NV01_EVENT_OS_EVENT: rmAllocEventOSEvent,
|
||||
nvgpu.NV01_DEVICE_0: rmAllocSimple[nvgpu.NV0080_ALLOC_PARAMETERS],
|
||||
nvgpu.NV20_SUBDEVICE_0: rmAllocSimple[nvgpu.NV2080_ALLOC_PARAMETERS],
|
||||
nvgpu.NV50_THIRD_PARTY_P2P: rmAllocSimple[nvgpu.NV503C_ALLOC_PARAMETERS],
|
||||
nvgpu.GT200_DEBUGGER: rmAllocSimple[nvgpu.NV83DE_ALLOC_PARAMETERS],
|
||||
nvgpu.FERMI_CONTEXT_SHARE_A: rmAllocSimple[nvgpu.NV_CTXSHARE_ALLOCATION_PARAMETERS],
|
||||
nvgpu.FERMI_VASPACE_A: rmAllocSimple[nvgpu.NV_VASPACE_ALLOCATION_PARAMETERS],
|
||||
nvgpu.KEPLER_CHANNEL_GROUP_A: rmAllocSimple[nvgpu.NV_CHANNEL_GROUP_ALLOCATION_PARAMETERS],
|
||||
nvgpu.TURING_CHANNEL_GPFIFO_A: rmAllocSimple[nvgpu.NV_CHANNEL_ALLOC_PARAMS],
|
||||
nvgpu.AMPERE_CHANNEL_GPFIFO_A: rmAllocSimple[nvgpu.NV_CHANNEL_ALLOC_PARAMS],
|
||||
nvgpu.TURING_DMA_COPY_A: rmAllocSimple[nvgpu.NVB0B5_ALLOCATION_PARAMETERS],
|
||||
nvgpu.AMPERE_DMA_COPY_A: rmAllocSimple[nvgpu.NVB0B5_ALLOCATION_PARAMETERS],
|
||||
nvgpu.AMPERE_DMA_COPY_B: rmAllocSimple[nvgpu.NVB0B5_ALLOCATION_PARAMETERS],
|
||||
nvgpu.HOPPER_DMA_COPY_A: rmAllocSimple[nvgpu.NVB0B5_ALLOCATION_PARAMETERS],
|
||||
nvgpu.TURING_COMPUTE_A: rmAllocSimple[nvgpu.NV_GR_ALLOCATION_PARAMETERS],
|
||||
nvgpu.AMPERE_COMPUTE_A: rmAllocSimple[nvgpu.NV_GR_ALLOCATION_PARAMETERS],
|
||||
nvgpu.AMPERE_COMPUTE_B: rmAllocSimple[nvgpu.NV_GR_ALLOCATION_PARAMETERS],
|
||||
nvgpu.ADA_COMPUTE_A: rmAllocSimple[nvgpu.NV_GR_ALLOCATION_PARAMETERS],
|
||||
nvgpu.HOPPER_COMPUTE_A: rmAllocSimple[nvgpu.NV_GR_ALLOCATION_PARAMETERS],
|
||||
nvgpu.HOPPER_USERMODE_A: rmAllocSimple[nvgpu.NV_HOPPER_USERMODE_A_PARAMS],
|
||||
nvgpu.GF100_SUBDEVICE_MASTER: rmAllocNoParams,
|
||||
nvgpu.TURING_USERMODE_A: rmAllocNoParams,
|
||||
nvgpu.NV_MEMORY_FABRIC: rmAllocSimple[nvgpu.NV00F8_ALLOCATION_PARAMETERS],
|
||||
},
|
||||
}
|
||||
})
|
||||
|
||||
v525_105_17 := addDriverABI(525, 105, 17, v525_60_13)
|
||||
|
||||
_ = addDriverABI(525, 125, 06, v525_105_17)
|
||||
})
|
||||
}
|
||||
@@ -38,6 +38,7 @@ import (
|
||||
"gvisor.dev/gvisor/pkg/rand"
|
||||
"gvisor.dev/gvisor/pkg/refs"
|
||||
"gvisor.dev/gvisor/pkg/sentry/control"
|
||||
"gvisor.dev/gvisor/pkg/sentry/devices/nvproxy"
|
||||
"gvisor.dev/gvisor/pkg/sentry/fdimport"
|
||||
"gvisor.dev/gvisor/pkg/sentry/fsimpl/host"
|
||||
"gvisor.dev/gvisor/pkg/sentry/fsimpl/tmpfs"
|
||||
@@ -304,6 +305,10 @@ func New(args Args) (*Loader, error) {
|
||||
return nil, fmt.Errorf("setting up memory usage: %w", err)
|
||||
}
|
||||
|
||||
if args.Conf.NVProxy {
|
||||
nvproxy.Init()
|
||||
}
|
||||
|
||||
kernel.IOUringEnabled = args.Conf.IOUring
|
||||
|
||||
info := containerInfo{
|
||||
|
||||
Reference in New Issue
Block a user